SLVU EPD TVS Diode Array For ESD and Latch-Up Protection PRELIMINARY. PROTECTION PRODUCTS Description. Features. Mechanical Characteristics

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Description The SL series of transient voltage suppressors are designed to protect low voltage, state-of-the-art CMOS semiconductors from transients caused by electrostatic discharge (ESD), cable discharge events (CDE), lightning and other induced voltage surges. The devices are constructed using Semtech s proprietary EPD process technology. The EPD process provides low standoff voltages with significant reductions in leakage currents and capacitance over siliconavalanche diode processes. The SLU2.- features integrated low capacitance compensation diodes that reduce the maximum capacitance to pf per line. This, combined with low leakage current, means signal integrity is preserved in high-speed applications such as 1/1 Ethernet. The SLU2.- is in an SO- package and may be used to protect four high-speed line pairs. The layout of the device minimizes trace inductance and reduces voltage overshoot associated with ESD events. The low clamping voltage of the SLU2.- minimizes the stress on the protected IC. The SL series TS diodes will meet the surge requirements of IEC 61-4-2 (ESD), IEC61-4-5 (Lightning), and ETSI ETS 3 36. Circuit Diagram SLU2.- EPD TS Diode Array For ESD and Latch-Up Protection Features Applications 1/1 Ethernet WAN/LAN Equipment Switching Systems DSLAMs Desktops, Servers, & Notebooks Instrumentation Base Stations Analog Inputs Schematic & PIN Configuration 6 Watts peak pulse power (tp = /2µs) Transient protection for high speed data lines to IEC 61-4-2 (ESD) 15k (air), k (contact) IEC 61-4-4 (EFT) 4A (tp = 5/5ns) IEC 61-4-5 (Lightning) 24A (tp = /2µs) Protects four line pairs (eight lines) Comprehensive pin out for easy board layout Low capacitance High peak pulse current (3A, /2µs) Low leakage current Low operating and clamping voltages Solid-state EPD TS process technology Mechanical Characteristics JEDEC SO- package Molding compound flammability rating: UL 94- Marking : Part number, date code, logo Packaging : Tape and Reel per EIA 41 SO- (Top iew) Revision 1/1/2 1

Absolute Maximum Rating Rating Symbol alue Units Peak Pulse Power (t = /2µs) P p k Peak Pulse Current (t = /2µs) I p P p P 6 Watts 3 A ESD Per IEC 61-4-2 (Air) ESD Per IEC 61-4-2 (Contact) ESD 3 25 k Operating Temperature T J -55 to +125 C Storage Temperature T STG 55 to +15 - C Electrical Characteristics (T=25 o C) SLU2.- Parameter Symbol Conditions Minimum Typical Maximum Units Reverse Stand-Off WM R. 2 Punch-Through Snap-Back PT SB I PT I SB = 2µ A 3. = 5mA 2. Reverse Leakage Current I R RWM = 2., T=25 C Clamping C I PP = 1A, tp = /2µ s Clamping C I PP = 24A, tp = /2µ s Clamping C I PP = 3A, tp = /2µ s Junction Capacitance C j R =, f = 1MHz. 1 1 µ A 4.6 15 17 pf 2 Semtech Corp. 2

Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time Power Derating Curve Peak Pulse Power - P PP (kw) 1 1.1.1.1 1 1 1 1 Pulse Duration - tp (µs) % of Rated Power or I PP 11 1 9 7 6 5 4 3 2 1 25 5 75 1 125 15 Ambient Temperature - T A ( o C) Pulse Waveform Clamping vs. Peak Pulse Current Percent of I PP 11 1 9 7 6 5 4 3 2 1 e -t td = I PP/2 Waveform Parameters: tr = µs td = 2µs 5 1 15 2 25 3 Time (µs) Clamping c - () 16 12 4 Waveform Parameters: tr = µs td = 2µs 5 1 15 2 25 3 35 Peak Pulse Current Ipp - (A) 1.4 Normalized Capacitance vs. Reverse Insertion Loss S21 CH1 S21 LOG 1 db/ REF db 1.2 C J ( R ) / C J ( R =) 1..6.4.2 f = 1 MHz.5 1 1.5 2 2.5 3 Reverse - R () START.3 MHz STOP 3. MHz 2 Semtech Corp. 3

Applications Information Device Connection for Protection of Eight Data Lines SLU2.- Circuit Diagram Electronic equipment is susceptible to transient disturbances from a variety of sources including: ESD to an open connector or interface, direct or nearby lightning strikes to cables and wires, and charged cables hot plugged into I/O ports. The SLU2.- is designed to protect sensitive components from damage and latchup which may result from such transient events. The SLU2.- can be configured to protect four highspeed line pairs differentially, or four lines to ground (common mode). The device is connected as follows: 1. Differential Protection of four line pairs: Line pairs are connected at pins 1 and 2, 3 and 4, 5 and 6, and 7 and. Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: Place the device near the input terminals or connectors to restrict transient coupling. Minimize the path length between the TS and the protected line. Minimize all conductive loops including power and ground loops. The ESD transient return path to ground should be kept as short as possible. Never run critical signals near board edges. Use ground planes whenever possible. Differential Protection of Four Line Pairs From Connector 1 2 7 3 6 4 5 2 Semtech Corp. 4

Typical Applications One SLU2.. Protecting Two 1/1 Ethernet Port 2 Semtech Corp. 5

Applications Information (continued) EPD TS Characteristics The SLU2.- is constructed using Semtech s proprietary EPD technology. The structure of the EPD TS is vastly different from the traditional pn-junction devices. At voltages below 5, high leakage current and junction capacitance render conventional avalanche technology impractical for most applications. However, by utilizing the EPD technology, the SLU2.- can effectively operate at 2. while maintaining excellent electrical characteristics. BRR IPP I SB I PT I R RWM SB PT C The EPD TS employs a complex nppn structure in contrast to the pn structure normally found in traditional silicon-avalanche TS diodes. The EPD mechanism is achieved by engineering the center region of the device such that the reverse biased junction does not avalanche, but will punch-through to a conducting state. This structure results in a device with superior dc electrical parameters at low voltages while maintaining the capability to absorb high transient currents. I BRR EPD TS I Characteristic Curve The I characteristic curve of the EPD device is shown in Figure 1. The device represents a high impedance to the circuit up to the working voltage ( RWM ). During a transient event, the device will begin to conduct as it is biased in the reverse direction. When the punchthrough voltage ( PT ) is exceeded, the device enters a low impedance state, diverting the transient current away from the protected circuit. When the device is conducting current, it will exhibit a slight snap-back or negative resistance characteristic due to its structure. This must be considered when connecting the device to a power supply rail. To return to a non-conducting state, the current through the device must fall below the snap-back current (approximately < 5mA). 2 Semtech Corp. 6

Applications Information - SPICE Model. nh SLU2.- Spice Model SLU2.- Spice Parameters Parameter IS B J RS IB CJO TT U nit D 1 (TS) D2 (LCRD) olt 3. 4 42 olt 13..62 Ohm.39.15 Farad 24.75E-1 2 3.15E-1 2 Amp 6.9E-14.57E- 9 Amp 1E-3 1E-3 sec 2.541E- 9 2.541E- 9 M --.14 5.113 N -- 1. 1 1. 1 EG e 1.11 1.11 2 Semtech Corp. 7

Outline Drawing - SO- 2X E/2 ccc C 2X N/2 TIPS aaa C SEATING PLANE C N A 1 2 D e D E1 E e/2 B A2 A A1 bxn bbb C A-B D GAGE PLANE.25 H SIDE IEW h L (L1) DETAIL A h c 1 SEE DETAIL A DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX A.53 -.69 1.35-1.75 A1 A2.4.49 - -.1.65.1 1.25 - -.25 1.65 b.12 -.2.31 -.51 c.7 -.1.17 -.25 D.19.193.197 4. 4.9 5. E1.15.154.157 3. 3.9 4. E.236 BSC 6. BSC e.5 BSC 1.27 BSC h.1 -.2.25 -.5 L.16.2.41.4.72 1.4 L1 N 1 (.41) - (1.4) - aaa bbb.4.1.1.25 ccc..2 NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H- 3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MS-12, ARIATION AA. Land Pattern - SO- X DIMENSIONS DIM INCHES MILLIMETERS C (.25) (5.2) (C) G Z G.11 3. P.5 1.27 X.24.6 Y Y.7 2.2 Z.291 7.4 P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 2. REFERENCE IPC-SM-72A, RLP NO. 3A. 2 Semtech Corp.

Marking SC YYWW SLU2. - 1 Top iew Note: (1) yyww = Date Code Ordering Information Part Number Working Qty/Pkg Reel Size SLU2.-.TB 2. 5/Reel 7 Inch 1) S LU2.-.TBT (. 2 5/Reel 7 Inch SLU2.- 2. 9/Tub e N/ A 1) S LU2.-.T (. 2 9/Tub e N/ A Note: (1) Lead-Free Product Contact Information Semtech Corporation Protection Products Division 2 Flynn Road, Camarillo, CA 9312 Phone: (5)49-2111 FAX (5)49-34 2 Semtech Corp. 9