Nchannel 30 V, 0.02 Ω typ., 6 A STripFET H6 Power MOSFET in a PowerFLAT 2x2 package Features Datasheet production data Order code V DS R DS(on) max I D P TOT 2 3 STL6N3LLH6 30 V 0.025Ω (V GS= 0 V) 0.04Ω (V GS= 4.5 V) 6 A 2.4 W 2 3 6 5 4 PowerFLAT 2x2 Very low onresistance Very low gate charge High avalanche ruggedness Low gate drive power loss Applications Figure. Internal schematic diagram (D) 2(D) 3(G) D S Switching applications Description This device is an Nchannel Power MOSFET developed using the STripFET H6 technology, with a new trench gate structure. The resulting Power MOSFET exhibits very low R DS(on) in all packages. 6(D) 5(D) 4(S) AM269v Table. Device summary Order code Marking Package Packaging STL6N3LLH6 STG PowerFLAT 2x2 Tape and reel October 205 DocID02323 Rev 3 /3 This is information on a product in full production. www.st.com
Contents STL6N3LLH6 Contents Electrical ratings............................................ 3 2 Electrical characteristics..................................... 4 2. Electrical characteristics (curves)............................. 6 3 Test circuits.............................................. 8 4 Package information......................................... 9 5 Revision history........................................... 2 2/3 DocID02323 Rev 3
Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V DS Drainsource voltage 30 V V GS Gatesource voltage ± 20 V I D () Drain current (continuous) at T C = 25 C 3 A I () D Drain current (continuous) at T C = 00 C 8.2 A ()(2) I DM Drain current (pulsed) 52 A (3) I D Drain current (continuous) at T pcb = 25 C 6 A I (3) D Drain current (continuous) at T pcb = 00 C 3.75 A (2)(3) I DM Drain current (pulsed) 24 A () P TOT Total dissipation at T c = 25 C 7.8 (3) P TOT Total dissipation at T pcb = 25 C 2.4 W T J T stg Operating junction temperature Storage temperature 55 to 50 C. This value is rated according to R thjcase 2. Pulse width limited by safe operating area 3. This value is rated according to R thjpcb Table 3. Thermal resistance Symbol Parameter Value Unit R thjpcb () Thermal resistance junctionpcb 52 ºC/W R thjcase Thermal resistance junctioncase max 6 ºC/W. When mounted on FR4 board of inch², 2oz Cu, t < 0 sec DocID02323 Rev 3 3/3 3
Electrical characteristics STL6N3LLH6 2 Electrical characteristics (T CASE = 25 C unless otherwise specified). Table 4. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS Drainsource breakdown voltage Zero gate voltage drain current I D = 250 µa, V GS = 0 V 30 V V DS = 30 V, V GS = 0 µa V DS = 30 V, T C = 25 C (V GS = 0) 0 µa I GSS Gate body leakage current V GS = ±20 V, (V DS = 0) ±00 na V GS(th) Gate threshold voltage V DS = V GS, I D = 250 µa V R DS(on) Static drainsource onresistance V GS = 0 V, I D = 3 A 0.02 0.025 Ω V GS = 4.5 V, I D = 3 A 0.032 0.04 Ω Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance 283 C oss Output capacitance V DS = 24 V, f= MHz, 6 C rss (V GS = 0) Reverse transfer capacitance 3 Q g Total gate charge V DD = 5 V, I D = 6 A 3.6 Q gs Gatesource charge V GS = 4.5 V (see Figure 4.: Gate.5 Q gd Gatedrain charge charge test circuit). pf nc Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) t r t d(off) t f Turnon delay time Rise time Turnoff delay time Fall time V DD = 0 V, I D = 6 A, R G = 4.7 Ω, V GS = 4.5 V (see Figure 3.: Switching times test circuit for resistive load) 4.8.2 9.4 5.4 ns 4/3 DocID02323 Rev 3
Electrical characteristics Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit () V SD Forward on voltage I SD = 6 A, V GS = 0 V. V t rr Reverse recovery time I SD = 6 A, 0.6 ns Q rr Reverse recovery charge di/dt = 00 A/µs, 2.8 nc I RRM Reverse recovery current V DD = 6 V, T J = 50 C 0.5 A. Pulsed: pulse duration=300µs, duty cycle.5% DocID02323 Rev 3 5/3 3
Electrical characteristics STL6N3LLH6 2. Electrical characteristics (curves) ID (A) 0 Figure 2. Safe operating area Operation in this area is Limited by max RDS(on) AM5374v ms Tj=50 C Tc=25 C 0ms Single s pulse 0. 0. 0 VDS(V) K 0 0 2 0 5 Figure 3. Thermal impedance δ=0.5 0.2 0. 0.05 0.02 0.0 Single pulse Zthjpcb=K*Rthjc 0 4 0 3 0 2 0 t (s) p AM5375v Figure 4. Output characteristics ID (A) VGS=6, 7, 8, 9, 0V AM536v 30 5V 25 4V 20 5 0 3V 5 2V 0 0 2 3 4 VDS(V) Figure 6. Gate charge vs gatesource voltage Figure 5. Transfer characteristics ID (A) AM5369v VDS=2V 30 20 0 0 0 2 3 4 5 6 7 VGS(V) Figure 7. Static drainsource onresistance VGS (V) 0 VDD=5V ID=6A AM5358v RDS(on) (mω) 40 VGS= 0 V AM5372v 8 35 30 6 25 4 20 5 2 0 5 0 0 2 4 6 Qg(nC) 0 0 2 4 6 8 0 ID(A) 6/3 DocID02323 Rev 3
Electrical characteristics Figure 8. Capacitance variations C (pf) 00 0 f= MHz AM5370v 0 0 20 VDS(V) Ciss Coss Crss Figure 0. Normalized gate threshold voltage vs temperature Figure 9. Normalized onresistance vs temperature RDS(on) (norm).8.6.4.2 0.8 0.6 0.4 0.2 ID= 3 A VGS= 0 V AM5360v 00 55 30 5 20 45 70 95 20 45 TJ( C) Figure. Normalized V (BR)DSS vs temperature VGS(th) (norm).2 ID =250 µa AM5368v V(BR)DSS.5 ID = 250 μa AM5364v. 0.8 0.6 0.4.05 0.95 0.9 0.2 0.85 0 55 30 5 20 45 70 95 20 45 TJ( C) 0.8 55 30 5 20 45 70 95 20 TJ( C) Figure 2. Sourcedrain diode forward characteristics VSD (V) AM5365v TJ=55 C 0.9 0.8 0.7 TJ=25 C 0.6 TJ=50 C 0.5 0.4 0.3 0.2 0 2 4 6 8 0 ISD(A) DocID02323 Rev 3 7/3 3
Test circuits STL6N3LLH6 3 Test circuits Figure 3. Switching times test circuit for resistive load Figure 4. Gate charge test circuit V DD VGS VD RG RL D.U.T. 2200 μf 3.3 μf VDD V i =20V=V GMAX 2200 mf 2V I G =CONST 2.7kΩ 47kΩ 00Ω 00nF kω D.U.T. V G PW 47kΩ AM0468v PW kω AM0469v Figure 5. Test circuit for inductive load switching and diode recovery times Figure 6. Unclamped inductive load test circuit G 25 Ω D S A D.U.T. B A FAST DIODE B A B D L=00μH 3.3 000 μf μf VDD VD ID L 2200 μf 3.3 μf VDD G RG S Vi D.U.T. AM0470v Pw AM047v Figure 7. Unclamped inductive waveform Figure 8. Switching time waveform VD V(BR)DSS t d(on) t on tr toff tdoff tf ID IDM 0 90% 0% VDS 0% 90% VDD VDD VGS 90% AM0472v 0 0% AM0473v 8/3 DocID02323 Rev 3
Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DocID02323 Rev 3 9/3 3
Package information STL6N3LLH6 Figure 9. PowerFLAT 2 x 2 package outline 8368575_REV_C 0/3 DocID02323 Rev 3
Package information Table 8. PowerFLAT 2 x 2 package mechanical data Dim. mm. Min. Typ. Max. A 0.70 0.75 0.80 A 0.00 0.02 0.05 A3 0.20 b 0.25 0.30 0.35 D.90 2.00 2.0 E.90 2.00 2.0 D2 0.90.00.0 E2 0.80 0.90.00 e 0.55 0.65 0.75 K 0.5 0.25 0.35 K 0.20 0.30 0.40 K2 0.25 0.35 0.45 L 0.20 0.25 0.30 L 0.65 0.75 0.85 Table 9. PowerFLAT 2 x 2 recommended footprint (dimensions in millimeters) Footprint DocID02323 Rev 3 /3 3
Revision history STL6N3LLH6 5 Revision history Table 0. Document revision history Date Revision Changes 25May202 First release Oct202 2 2Oct205 3 Added Section 2.: Electrical characteristics (curves). R DS(on) values (typ. and max.) updated Typical values updated in Table 5, 6 and 7 Minor text changes. Updated title and description in cover page. Datasheet promoted from preliminary data to production data. Updated Table 2, Table 4, Table 5 and Table 7. Updated Figure 6 and Figure 7. Minor text changes. 2/3 DocID02323 Rev 3
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