Digital joint phase and sampling instant synchronisation for UMTS standard

Similar documents
Frequency Calibration of A/D Converter in Software GPS Receivers

REAL-TIME IMPLEMENTATION OF A NEURO-AVR FOR SYNCHRONOUS GENERATOR. M. M. Salem** A. M. Zaki** O. P. Malik*

MIMO Systems: Multiple Antenna Techniques

Comm 502: Communication Theory. Lecture 5. Intersymbol Interference FDM TDM

AN EVALUATION OF DIGILTAL ANTI-ALIASING FILTER FOR SPACE TELEMETRY SYSTEMS

NAVAL POSTGRADUATE SCHOOL THESIS

ECS455: Chapter 5 OFDM

Asymptotic Diversity Analysis of Alamouti Transmit Diversity with Quasi-ML Decoding Algorithm in Time-Selective Fading Channels

Flux estimation algorithms for electric drives: a comparative study

UNIVERSITY OF SASKATCHEWAN EE456: Digital Communications FINAL EXAM, 9:00AM 12:00PM, December 9, 2010 (open-book) Examiner: Ha H.

Instantaneous Cycle-Slip Detection and Repair of GPS Data Based on Doppler Measurement

RESEARCH ON NEAR FIELD PASSIVE LOCALIZATION BASED ON PHASE MEASUREMENT TECHNOLOGY BY TWO TIMES FREQUENCY DIFFERENCE

International Journal of Engineering Research & Technology (IJERT) ISSN: Vol. 1 Issue 6, August

Mobile Communications TCS 455

Active vibration isolation for a 6 degree of freedom scale model of a high precision machine

Identification of Image Noise Sources in Digital Scanner Evaluation

The Performance Analysis of MIMO OFDM System with Different M-QAM Modulation and Convolution Channel Coding

Basic Study of Radial Distributions of Electromagnetic Vibration and Noise in Three-Phase Squirrel-Cage Induction Motor under Load Conditions

HIGH VOLTAGE DC-DC CONVERTER USING A SERIES STACKED TOPOLOGY

California State University, Bakersfield Computer & Electrical Engineering & Computer Science ECE 3220: Digital Design with VHDL Laboratory 6

A Real-Time Wireless Channel Emulator For MIMO Systems

Active Harmonic Elimination in Multilevel Converters Using FPGA Control

Pre- and Post-DFT Combining Space Diversity Receiver for Wideband Multi-Carrier Systems

MAX3610 Synthesizer-Based Crystal Oscillator Enables Low-Cost, High-Performance Clock Sources

A moving sound source localization method based on TDOA

Comparative Study of PLL, DDS and DDS-based PLL Synthesis Techniques for Communication System

A Proportional Fair Resource Allocation Algorithm for Hybrid Hierarchical Backhaul Networks

Adaptive Space/Frequency Processing for Distributed Aperture Radars

Protection scheme for transmission lines based on correlation coefficients

Multi-user cross-layer allocation design for LP-OFDM high-rate UWB

A simple low rate turbo-like code design for spread spectrum systems

SCK LAB MANUAL SAMPLE

Hybrid Cascaded H-Bridge Multilevel Inverter Motor Drive DTC Control for Electric Vehicles.

Design, Realization, and Analysis of PIFA for an RFID Mini-Reader

Pilot Symbol Assisted Modulation using 16-Level QAM for a Wireless System

An FM signal in the region of 4.2 to 4.6

Adaptive Space-time Block Coded Transmit Diversity in a High Mobility Environment

MODAL ANALYSIS OF A BEAM WITH CLOSELY SPACED MODE SHAPES

University of Bristol - Explore Bristol Research. Peer reviewed version. Link to published version (if available): /VETECS.2009.

Method to Improve Range and Velocity Error Using De-interleaving and Frequency Interpolation for Automotive FMCW Radars

Field Test Results of Space-Time Equalizers and Delayed Diversity Transmission in Central Tokyo Area

Integral Control AGC of Interconnected Power Systems Using Area Control Errors Based On Tie Line Power Biasing

Synthetic aperture radar raw signal simulator for both pulsed and FM-CW modes

A New Technique to TEC Regional Modeling using a Neural Network.

Studies on Novel Anti-jamming Technique of Unmanned Aerial Vehicle Data Link

Produced in cooperation with. Revision: May 26, Overview

A Simple DSP Laboratory Project for Teaching Real-Time Signal Sampling Rate Conversions

Chapter Introduction

A Faster and Accurate Method for Spectral Testing Applicable to Noncoherent Data

Adaptive Code Allocation for Interference Exploitation on the Downlink of MC-CDMA Systems

Improving the Regulatory Response of PID Controller Using Internal Model Control Principles

Bandwidth-Efficient MIMO Underwater Acoustic Communications with Frequency-Domain Equalization

SINGLE-PHASE ACTIVE FILTER FOR HIGH ORDER HARMONICS COMPENSATION

Control of Electromechanical Systems using Sliding Mode Techniques

DIGITAL COMMUNICATION

GPS signal Rician fading model for precise navigation in urban environment

Subcarrier exclusion techniques

Two Novel Handover Algorithms with Load Balancing for Heterogeneous Network

CHAPTER 2 WOUND ROTOR INDUCTION MOTOR WITH PID CONTROLLER

Analysis. Control of a dierential-wheeled robot. Part I. 1 Dierential Wheeled Robots. Ond ej Stan k

MIMO Enabled Efficient Mapping of Data in WiMAX Networks

Lab 7 Rev. 2 Open Lab Due COB Friday April 27, 2018

Control Method for DC-DC Boost Converter Based on Inductor Current

ECE451/551 Matlab and Simulink Controller Design Project

TECHNICAL RESEARCH REPORT

ISSN: ISO 9001:2008 Certified International Journal of Engineering and Innovative Technology (IJEIT)

A Flexible OFDM System Simulation Model. with BER Performance Test

Research on Control Technology of Permanent Magnet Synchronous Motor Based on Iterative Algorithm Liu Yangyang 1c, Yang Guang 2b, Zou Qi 1c,

A SiGe BiCMOS double-balanced mixer with active balun for X-band Doppler radar

Self-Programmable PID Compensator for Digitally Controlled SMPS

FAST PATH LOSS PREDICTION BY USING VIRTUAL SOURCE TECHNIQUE FOR URBAN MICROCELLS

Formatting and Baseband. Formatting & Baseband. Page 1. Formatting and Baseband Modulation. CSE4214 Digital Communications

Non-Linear UWB Receivers With MLSE Post-Detection

Optimal Control for Single-Phase Brushless DC Motor with Hall Sensor

Published in: Proceedings of the 26th European Solid-State Circuits Conference, 2000, ESSCIRC '00, September 2000, Stockholm, Sweden

Improvement in Image Reconstruction of Biological Object by EXACT SIRT cell Scanning Technique from Two Opposite sides of the Target

IJSRD - International Journal for Scientific Research & Development Vol. 3, Issue 11, 2016 ISSN (online):

Previous lecture. Lecture 5 Control of DVD reader. TheDVD-reader tracking problem. Can you see the laser spot?

Constant Switching Frequency Self-Oscillating Controlled Class-D Amplifiers

Typical wireless DSP system. Lecture 2 Data Conversion. Typical hard disk DSP system. Typical PCM voiceband DSP system.

A Programmable Compensation Circuit for System-on- Chip Application

Digital Control of Boost PFC AC-DC Converters with Predictive Control

DESIGN OF SECOND ORDER SIGMA-DELTA MODULATOR FOR AUDIO APPLICATIONS

Fast & Accurate Algorithm for Jitter Test with a Single Frequency Test Signal

A COMPARISON OF METHODS FOR EVALUATING THE TEST ZONE PERFORMANCE OF ANECHOIC CHAMBERS DESIGNED FOR TESTING WIRELESS DEVICES

Communication Systems, 5e

APPLICATION OF PHASOR MEASUREMENT UNIT IN SMART GRID

Comparison Study in Various Controllers in Single-Phase Inverters

Performance evaluation of a DPSK/SCM combined modulation scheme for optical label switching

Phase-Locked Loops (PLL)

Available online at ScienceDirect. Procedia Technology 21 (2015 ) SMART GRID Technologies, August 6-8, 2015

DSP-Based Control of Boost PFC AC-DC Converters Using Predictive Control

STRUCTURAL SEMI-ACTIVE CONTROL DEVICE

AC : TEACHING DIGITAL FILTER IMPLEMENTATIONS US- ING THE 68HC12 MICROCONTROLLER

IMPROVED SPATIAL MODULATION FOR HIGH SPECTRAL EFFICIENCY

A Feasibility Study on Frequency Domain ADC for Impulse-UWB Receivers

Sloppy Addition and Multiplication

The Cascode and Cascaded Techniques LNA at 5.8GHz Using T-Matching Network for WiMAX Applications

Uplink Admission Control in WCDMA Systems

Optimized BER Performance of Asymmetric Turbo Codes over AWGN Channel

Transcription:

Digital joint phae and ampling intant ynchroniation for UMTS tandard Youef Serretou, Koai Raoof, Joël Lienard To cite thi verion: Youef Serretou, Koai Raoof, Joël Lienard. Digital joint phae and ampling intant ynchroniation for UMTS tandard. IEEE/ACES International Conference on Wirele Communication and Applied Computational Electromagnetic, 005., Apr 005, United State. pp.037-040, 005, 0-7803-9068-7. <0.09/WCACEM.005.469760>. <hal-0050678> HAL Id: hal-0050678 http://hal.archive-ouverte.fr/hal-0050678 Submitted on Feb 008 HAL i a multi-diciplinary open acce archive for the depoit and diemination of cientific reearch document, whether they are publihed or not. The document may come from teaching and reearch intitution in France or abroad, or from public or private reearch center. L archive ouverte pluridiciplinaire HAL, et detinée au dépôt et à la diffuion de document cientifique de niveau recherche, publié ou non, émanant de établiement d eneignement et de recherche françai ou étranger, de laboratoire public ou privé.

Digital joint phae and ampling intant ynchroniation for UMTS tandard Youef SERRESTOU, Koai RAOOF, Joёl LIENARD Laboratoire de Image et de Signaux (LIS) koai.raoof@li.inpg.fr ABSTRACT In aynchronou Direct-Sequence Code Diviion Multiple Acce (DS-CDMA) receiver, one of the major function i timing and phae ynchroniation. Many propoed olution treat thee function eparately. In thi paper we preent a new joint ynchroniation olution for UMTS tandard. Thi olution i baed on a digital delay and phae looked loop. In addition thi implementation i programmable for the two mode of UMTS (FDD and TDD) with variable over-ampling factor. It ha teted in real time on TigerSHARC DSP. INTRODUCTION In UMTS the communication ytem i aynchronou between mobile and bae tation. In addition the channel propagation effect, ocillator imperfection and other effect caue perturbation in received ignal, which require ynchroniation between bae tation and mobile. In UMTS tandard ynchroniation channel are tranmitted to allow mobile to find bae tation location, cell parameter and the beginning of the frame. Thi phae i named acquiition, it the firt tep that the mobile doe, but thi tep give an approximate ynchroniation and it mut be completed by a tracking ynchroniation. Thi tep tracking correct the phae and the ampling intant continuouly in time. Thi paper preent an implementation of digital joint tracking algorithm [] for UMTS tandard in real time. UMTS The acce cheme i Direct-Sequence Code Diviion Multiple Acce (DS-CDMA). And for radio acce there two mode, FDD (Frequency Diviion Duplex) and TDD (Time Diviion Duplex). In UMTS, a 0 m radio frame i divided into 5 lot (560 chip/lot at chip rate of 3.84 Mcp). A phyical channel i therefore defined a a code (or number of a code ued to pread thi channel) and additionally in TDD mode the equence of time lot i needed for the definition of a phyical channel. The information rate of the channel varie with the ymbol rate being derived from the 3.84 Mcp and the preading factor (number of chip per ymbol). Spreading factor (noted SF) are from 56 to 4 for FDD uplink, and from 5 to 4 for FDD downlink, and from 6 to for TDD uplink and downlink. Thu the repective modulation ymbol rate vary from 960 k ymbol/ to 5 k ymbol/ for FDD uplink (7.5 k ymbol/ for downlink), and for TDD the momentary modulation ymbol rate hall vary from 3.84 M ymbol/ to 40 k ymbol/. The ued modulation cheme i QPSK with CDMA, the preading (and crambling) proce i cloely aociated with modulation. So different familie of preading code are ued to pread the ignal. In order to eparate channel, code derived from code tree tructure are ued. Thee code are OVSF (orthogonal variable preading factor). And for eparating different cell in FDD mode Gold code with 0 m period (38400 chip at 3.84 Mcp) are ued and for TDD mode we ue code with period of 6 chip and midamble equence of different length depending on the environment. In FDD mode a downlink fixed rate channel with predefined ymbol (+j) equence i tranmitted within each frame, thi channel, named CPICH common pilot channel, ue the firt preading code in tree with preading factor equal to 56. The proprietie of thi channel allow the receiver to identify cell location. In our work we have ued thi channel to carry out joint ynchronization. In TDD mode each uer lot ha two data carrying part eparated by a midamble code bloc. We ue thi midamble code to carry out the etimation proce. DIJITAL JOINT SYNCHRONISATION ALGORITHM The developed algorithm conit of four tep, a hown on figure (), auming that the baeband ignal i obtained by radio frequency linear down converion followed by a linear filtering ytem, and the acquiition i done correctly. The algorithm i compoed of the following tep: 0-7803-9068-7/05/$0.00 005 IEEE

Output Input Interpolation Phae correction Etimation TLF PLF Figure : Tracking algorithm chema.timing correction: We look to extract from the received ample the correct ample timing. To carry out thi operation we interpolate the received ignal by an adaptive linear FIR filter []..Phae correction: The econd tep i to correct the phae hift. The interpolated complex ample (I and Q) are multiplied by complex exponential of the etimated phae. 3. Joint etimation: The correction of the ampling intant and the phae require knowing time delay and phae hift. We developed an algorithm to etimate jointly and efficiently thee parameter. Loop filter update the meaurement. Etimation for UMTS-FDD mode The ampling intant delay and the phae hift are etimated over one ymbol duration (56 chip). Thi etimation i ued to correct the next ymbol. We calculate the correlation in three point between corrected ymbol and the equence of crambling code. From thi calculation we obtain two parameter, which give u information about ampling intant delay and phae hift. Thee parameter are filtered in order to eliminate noie and to update them by uing loop filter. The expreion for thee parameter are: ( ) α ( ) G 4α ( ) G ( ) OSF cpich cpich [ ( ) ˆ( ) ] + η(, ) ˆ( ) ( ) + η(, ) T Where α() i the fading of propagation channel, ( ) i the etimation of the ampling intant delay, ˆ ( ) i the etimation of phae hift, denote ymbol number, η and η are noie and G CPICH i the gain of CPICH channel. Etimation for UMTS-TDD In thi mode we proce the received ignal in a lot by lot manner (560 chip). We have choen thi way becaue in the TDD mode we don t have a permanent channel with a known preading code. In addition the TDD mode will be ued in cae of a good propagation channel condition, that mean we can conider the delay time and the phae hift are contant over lot duration. We ue midamble code for etimation, o we calculate correlation function between the received midamble and the tranmitted midamble in three point (aligned code, and with hifted code by +/-T c /). Thee meaurement are filtered to etimate delay time and phae hift. Etimation of the ampling intant delay and the phae hift over actual lot i ued to correct the next lot. ˆ ( ( ) ˆ( ) ) ( ) α( ) + η(, ) α ( ) ˆ( ) ( ) ( ) + η (, ) OSF Thee parameter are filtered and updated by a econd order filter. The tructure of thee filter i the ame a in the FDD mode. But the filter coefficient are different due to gain, ampling frequency and updating time period. We tudy in the following ection thee loop filter. 4.Early-late loop filter: the error () i filtered by a econd order filter with λ and λ a coefficient. T e µ i ued to determine the interpolator impule repone : h i) = in c( ( i + ) T ) e ( µ. e

The updated interpolation filter i ued to correct the ampling intant error for the next ymbol (in FDD) or next lot (in TDD). The time delay loop filter i adapted by the following equation: µ ε + + = = µ ε + ε + λ + λ ( ) ( ) We look for atifying three condition: ytem tability, peed repone ytem and minimal variance (the reidual error after convergence mut be minimal). The cloe loop equation concluded to determine the tability region and the optimized filter coefficient : For FDD mode: For TDD mode: 5 OSF = 0. λ and G CPICH 05 OSF λ = 0. G CPICH λ = 0. 3 OSF and λ = 0. OSF 5. Phae loop filter : The error ( ) i filtered by a econd order filter with γ and γ a coefficient. The output of the filter i ued to correct the phae by complex multiplication. The phae i updated and corrected with the ame proceeding a interpolation. The following equation how how a phae loop filter update the phae: φ δ + + = φ + δ + γ = δ + γ ( ) ( ) 0.3 0. For FDD mode: δ = G and δ = CPICH GCPICH For TDD mode: δ = 0. 6 and δ = 0. COMPLEXITY STUDY We have obtained the number of cycle required for every function and the global number of cycle required for tracking. Interpolation Phae correction Correlation Etimation Total cycle Time duration OSF= 540 cycle 0480 cycle 3030 cycle 47 cycle 93077 cycle 37.3 µ FDD OSF=4 5460 cycle 0740 cycle 3030 cycle 69 cycle 03399 cycle 43.60 µ mode OSF=8 060 cycle 440 cycle 5660 cycle 69 cycle 59589 cycle 638.36 µ OSF= 54 cycle 065 cycle 686 cycle 3 cycle 67807 cycle 7.3 µ TDD OSF=4 56 cycle 0505 cycle 5390 cycle 3 cycle 8753 cycle 349.0 µ mode OSF=8 0450 cycle 400 cycle 5390 cycle 3 cycle 5898 cycle 635.93 µs The criteria are to aure real time proceing. All the parameter are hown in table (), where we proce the incoming ignal in a lot by lot manner. The time duration of one lot i T lot =666.667 µ. The DSP clock period i T cycle =4 n..the reult are obtained for the two mode (TDD and FDD) and for different value of over ampling factor. A a concluion, the real time proceing i aured for all over ampling factor, but for OSF=8 the time i till critical. IMPLEMENTATION RESULTS The following figure how contellation of received CPICH channel and data channel in FDD mode and data channel in TDD mode. Simulation condition are : Delay function i linear with 00 ppm (0-4 T e of drift per ample duration). Phae hift: 94 radium/. Doppler frequency 0 Hz which correpond to 0 km/h. 3

Figure : Contellation of CPICH and data in FDD mode Figure 3: Contellation of received data in TDD mode CONCLUSION In thi paper, joint chip timing and phae ynchronization for reconfigurable tandard UMTS wa introduced. Thi algorithm wa validated by imulation and implemented on 6-bit fixed-point arithmetic on DSP TigerSHARC. Simulation wa carried out in many configuration to aure real time proceing and to aure alo the reconfigurability of the ytem. Implementation reult alo are preented. REFERENCES [] F.M. Gardner "interpolation in digital modem". IEEE. Tran on comm.vol.4, No.3, March999. [] Koai Raoof, Mathieu Marchand and Jean marc Broier " digital joint chip timing recovery and phae ynchronization for DS pread pectrum communication", LIS laboratory report, june 000. [3] M. Pätzold, Q. Yao "Perfect modelling and imulation of meaured patio-temporal wirele channel". [4] K. Lang, G. Blanke and R. Rifaat "A oftware olution for chip rate proceing in CDMA wirele infratructure". IEEE. Communication magazine, Feb. 00. [5] M. Mjögeman and R. Thomaon "Performance imulation of the UMTS common packet channel". Mater thei, EMW/TB/XH, 000. [6] Y. Kyoon, O. Shin and K. Bok "Fat lot ynchronization for intercell aynchronou DS/CDMA ytem". IEEE. Tran on wirele communication. Vol., No., Apr. 00. [7] D. Fu and A.N. Wilon "interpolation in timing recovery a trigonometric polynomial and it implementation". IEEE Globel 998 communication mini conference record, Sydney, Autralia, Nov. 998. [8] L. Schumacher and L. Vandendorpe "Maximum likelihood data aided phae etimation in CDMA communication ytem with QPSQ modulation". IEEE Globel 996 communication. [9] P. J. Huted "deign and implementation of digital timing recovery and carrier ynchronization for high peed wirele communication". Mater of cience. Univerity of California in Berkeley. [0] Technical Specification of the 3 rd Generation Partnerhip Project. http://www.3gpp.org/ftp/spec 4