IRL1404SPbF IRL1404LPbF

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l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175 C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free Description Seventh Generation HEXFET power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. G IRL1404SPbF IRL1404LPbF HEXFET Power MOSFET D S PD - 95148 V DSS = 40V R DS(on) = 0.004Ω I D = 160A The D 2 Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D 2 Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL1404L) is available for low- Absolute Maximum Ratings D 2 Pak IRL1404S TO-262 IRL1404L Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ 10V 160 I D @ T C = 100 C Continuous Drain Current, V GS @ 10V 110 A I DM Pulsed Drain Current 640 P D @T A = 25 C Power Dissipation 3.8 W P D @T C = 25 C Power Dissipation 200 W Linear Derating Factor 1.3 W/ C V GS Gate-to-Source Voltage ± 20 V E AS Single Pulse Avalanche Energy 520 mj I AR Avalanche Current 95 A E AR Repetitive Avalanche Energy 20 mj dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns T J Operating Junction and -55 to 175 T STG Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case) C Thermal Resistance Parameter Typ. Max. Units R θjc Junction-to-Case 0.75 R θcs Case-to-Sink, Flat, Greased Surface 0.50 C/W R θja Junction-to-Ambient (PCB Mounted) 40 www.irf.com 1 04/19/04

Electrical Characteristics @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 40 V V GS = 0V, I D = 250µA V (BR)DSS/ T J Breakdown Voltage Temp. Coefficient 0.038 V/ C Reference to 25 C, D = 1mA R DS(on) Static Drain-to-Source On-Resistance 0.004 Ω V GS = 10V, I D = 95A 0.0059 V GS = 4.3V, I D = 40A V GS(th) Gate Threshold Voltage 1.0 3.0 V V DS = V GS, I D = 250µA g fs Forward Transconductance 93 S V DS = 25V, I D = 95A I 20 V µa DS = 40V, V GS = 0V DSS Drain-to-Source Leakage Current 250 V DS = 32V, V GS = 0V, T J = 150 C I GSS Gate-to-Source Forward Leakage 200 V GS = 20V na Gate-to-Source Reverse Leakage -200 V GS = -20V Q g Total Gate Charge 140 I D = 95A Q gs Gate-to-Source Charge 48 nc V DS = 32V Q gd Gate-to-Drain ("Miller") Charge 60 V GS = 5.0V, See Fig. 6 t d(on) Turn-On Delay Time 18 V DD = 20V ns t r Rise Time 270 I D = 95A t d(off) Turn-Off Delay Time 38 R G = 2.5Ω V GS = 4.5V t f Fall Time 130 R D = 0.25Ω Between lead, D L D Internal Drain Inductance 4.5 nh 6mm (0.25in.) L S Internal Source Inductance 7.5 from package G and center of die contact S C iss Input Capacitance 6600 V GS = 0V C oss Output Capacitance 1700 pf V DS = 25V C rss Reverse Transfer Capacitance 350 ƒ = 1.0MHz, See Fig. 5 C oss Output Capacitance 6700 V GS = 0V, V DS = 1.0V, ƒ = 1.0MHz C oss Output Capacitance 1500 V GS = 0V, V DS = 32V, ƒ = 1.0MHz C oss eff. Effective Output Capacitance 1500 V GS = 0V, V DS = 0V to 32V Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol 160 (Body Diode) showing the A G I SM Pulsed Source Current integral reverse 640 (Body Diode) p-n junction diode. S V SD Diode Forward Voltage 1.3 V T J = 25 C, I S = 95A, V GS = 0V t rr Reverse Recovery Time 63 94 ns T J = 25 C, I F = 95A Q rr Reverse RecoveryCharge 170 250 nc di/dt = 100A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S L D ) 2 www.irf.com

I D, Drain-to-Source Current (A) 100 VGS TOP 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.3V 4.3V I D, Drain-to-Source Current (A) 100 VGS TOP 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.3V 4.3V 20µs PULSE WIDTH T J = 25 C 10 0.1 1 10 100 V DS, Drain-to-Source Voltage (V) 20µs PULSE WIDTH T J = 175 C 10 0.1 1 10 100 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, Drain-to-Source Current (A) T J = 25 C T J = 175 C V DS= 15V 20µs PULSE WIDTH 100 4.0 5.0 6.0 7.0 8.0 V GS, Gate-to-Source Voltage (V) R DS(on), Drain-to-Source On Resistance (Normalized) 2.5 I D = 160A 2.0 1.5 1.0 0.5 V GS = 10V 0.0-60 -40-20 0 20 40 60 80 100 120 140 160 180 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3

C, Capacitance (pf) 0 VGS = 0V, f = 1MHz Ciss = Cgs Cgd, C ds SHORTED Crss = Cgd 8000 Coss = Cds Cgd C iss 6000 4000 2000 C oss C rss 0 1 10 100 V DS, Drain-to-Source Voltage (V) V GS, Gate-to-Source Voltage (V) 20 16 12 8 4 I = D 95A V DS = 32V V DS = 20V FOR TEST CIRCUIT SEE FIGURE 13 0 0 100 200 300 400 500 Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 0 OPERATION IN THIS AREA LIMITED BY R DS(on) I SD, Reverse Drain Current (A) 100 10 T J = 175 C T J = 25 C V GS = 0 V 1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 V SD,Source-to-Drain Voltage (V) I D, Drain Current (A) 100 10us 100us 1ms TC = 25 C TJ = 175 C Single Pulse 10 10ms 1 10 100 V DS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com

160 LIMITED BY PACKAGE V DS R D I D, Drain Current (A) 120 80 40 R G V GS 10V Pulse Width 1 µs Duty Factor 0.1 % D.U.T. - V DD 0 25 50 75 100 125 150 175 T, Case Temperature ( C C) Fig 9. Maximum Drain Current Vs. Case Temperature V DS 90% 10% V GS t d(on) t r t d(off) t f 1 Thermal Response (Z thjc ) 0.1 0.01 D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thjc TC 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t 1, Rectangular Pulse Duration (sec) PDM t1 t2 Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5

Fig 12a. Unclamped Inductive Test Circuit I AS R G V DS 20V tp tp L D.U.T I AS 0.01Ω V (BR)DSS 15V DRIVER Fig 12b. Unclamped Inductive Waveforms - V DD A E AS, Single Pulse Avalanche Energy (mj) 1200 800 600 400 200 TOP BOTTOM I D 39A 67A 95A 0 25 50 75 100 125 150 175 Starting T, Junction Temperature( J C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current 10 V Q G Current Regulator Same Type as D.U.T. 50KΩ V G Q GS Q GD 12V V GS.2µF.3µF D.U.T. V - DS 3mA Charge Fig 13a. Basic Gate Charge Waveform I G I D Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 www.irf.com

Peak Diode Recovery dv/dt Test Circuit D.U.T* ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - - V GS R G dv/dt controlled by R G I SD controlled by Duty Factor "D" D.U.T. - Device Under Test - V DD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive Period P.W. D = P.W. Period [ V GS =10V ] *** D.U.T. I SD Waveform Reverse Recovery Current Re-Applied Voltage Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt Inductor Curent Body Diode Ripple 5% Forward Drop [ V DD ] [ ] I SD *** V GS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET power MOSFETs www.irf.com 7

D 2 Pak Package Outline Dimensions are shown in millimeters (inches) D 2 Pak Part Marking Information (Lead-Free) THIS IS AN IRF530S WITH LOT CODE 8024 AS S EMB L ED ON WW 02, 2000 IN T HE AS S E MB LY L INE "L" Note: "P" in as s embly line pos ition indicates "Lead-Free" OR INT ER NAT IONAL R ECT IF IER LOGO AS S E MB L Y LOT CODE F530S PART NUMBER DAT E CODE YEAR 0 = 2000 WEE K 02 LINE L INT ERNAT IONAL RECT IFIER LOGO ASSEMBLY LOT CODE F530S PART NUMBER DAT E CODE P = DES IGNATES LEAD -FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = ASSEMBLY SITE CODE 8 www.irf.com

TO-262 Package Outline TO-262 Part Marking Information EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS S EMB LED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" Note: "P" in assembly line pos ition indicates "Lead-Free" OR INT ERNAT IONAL RECTIFIER LOGO AS S E MB L Y LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEE K 19 LINE C INT ERNAT IONAL RECTIFIER LOGO AS S E MB L Y LOT CODE PART NUMBER DAT E CODE P = DES IGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEE K 19 A = ASSEMBLY SITE CODE www.irf.com 9

D 2 Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION TRL 1.85 (.073) 1.65 (.065) 10.90 (.429) 10.70 (.421) 11.60 (.457) 11.40 (.449) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) M IN. Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting T J = 25 C, L = 0.35mH R G = 25Ω, I AS = 95A. (See Figure 12) ƒ I SD 95A, di/dt 160A/µs, V DD V (BR)DSS, T J 175 C Pulse width 300µs; duty cycle 2%. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. IN CLU DE S F LANG E D IST OR TIO N @ OU TER ED GE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) M A X. 4 Calculated continuous current based on maximum allowable junction temperature; for recommended current-handing of the package refer to Design Tip # 93-4. This is applied to D 2 Pak, When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.04/04 10 www.irf.com

Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/