U/ Matched N-Channel JFET Pairs Part Number V GS(off) (V) V (BR)GSS Min (V) Min I G Typ (pa) V GS V GS Max (mv) U to 5.5 U to 5.5 Two-Chip Design High Slew Rate Low Offset/Drift Voltage Low Gate Leakage: pa Low Noise High CMRR: 5 db. Minimum Parasitics Ensuring Maximum High-Frequency Performance Improved Op Amp Speed, Settling Time Accuracy Minimum Input Error/Trimming Requirement Insignificant Signal Loss/Error Voltage High System Sensitivity Minimum Error with Large Input Signal Wideband Differential Amps High-Speed, Temp-Compensated, Single-Ended Input Amps High-Speed Comparators Impedance Converters The U/ are matched pairs of JFETs mounted in a single TO-7 package. This two-chip design reduces parasitics and gives better performance at very high frequencies while ensuring extremely tight matching. These devices are an excellent choice for use as wideband differential amplifiers in demanding test and measurement applications. The hermetically-sealed TO-7 package is available with full military screening per MIL-S-95 (see Military Information). For similar products in SO- packaging see the SST/SST data sheet. For low-noise options, see the SST/U series data sheet. For low-leakage alternatives, see the U/ data sheet. TO-7 S G D 5 D G S Top View Gate-Drain, Gate-Source Voltage............................... 5 V Gate-Gate Voltage............................................ 5 V Gate Current................................................. 5 ma Lead Temperature ( / from case for sec.)................... C Storage Temperature................................... 5 to C Document Number: 75 S- Rev. D, -Jun- Operating Junction Temperature.......................... 55 to 5 C Power Dissipation : Per Side a........................ 5 mw Total b........................... 5 mw Notes a. Derate mw/ C above 5 C b. Derate mw/ C above 5 C -
U/ U Limits U Parameter Symbol Test Conditions Typ a Min Max Min Max Unit Static Gate-Source Breakdown Voltage V (BR)GSS I G = A, V DS = V 5 5 5 Gate-Source Cutoff Voltage V GS(off) V DS = V, = na.5 Saturation Drain Current b SS V DS = V, V GS = V 5 ma V GS = 5 V, V DS = V 5 5 pa Gate Reverse Current I GSS T A = 5 C na V DG = V, = 5 ma 5 5 pa Gate Operating Current I G T A = 5 C. na Gate-Source Forward Voltage V GS(F) I G = ma, V DS = V.7 V Dynamic V Common-Source Forward Transconductance Common-Source Output Conductance g os V DS = V, = 5 ma.5 9.5 9 ms 7 S Common-Source Input Capacitance Common-Source Reverse Transfer Capacitance C iss C rss V DS = V, = 5 ma f = MHz pf Equivalent Input Noise Voltage e n V DS = V, = 5 ma nv Hz Matching Differential Gate-Source Voltage V GS V GS V DG = V, = 5 ma mv Gate-Source Voltage Differential Change with Temperature V GS V GS T V DG = V, = 5 ma T A = 55 to 5 C V/ C Saturation Drain Current Ratio c SS SS V DS = V, V GS = V.97 Transconductance Ratio c V DS = V, = 5 ma.97 Common Mode Rejection Ratio CMRR V DG = 5 to V, = 5 ma 5 db Notes a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. NZFD b. Pulse test: PW s duty cycle %. c. Assumes smaller value in the numerator. - Document Number: 75 S- Rev. D, -Jun-
U/ 5 Drain Current and Transconductance vs. Gate-Source Cutoff Voltage na Gate Leakage Current SS Saturation Drain Current (ma) SS @ V DS = V, V GS = V @ V DS = V, V GS = V SS gfs Forward Transconductance I G Gate Leakage na na pa pa pa I G(on) @ T A = 5 C I GSS @ 5 C T A = 5 C = ma ma ma ma I GSS @ 5 C. pa V GS(off) Gate-Source Cutoff Voltage (V) V DG Drain-Gate Voltage (V) V GS(off) = V V GS = V.5 V V GS = V. V. V. V. V. V. V.5 V. V.5 V. V.5 V. V 5 5 V GS(off) = V V GS = V. V V GS = V. V. V. V. V. V 9. V. V.5 V.5 V.5 V. V.5 V........ Document Number: 75 S- Rev. D, -Jun- -
U/ Transfer Characteristics Transfer Characteristics V GS(off) = V V DS = V V DS = V 5 C 5 C 5 C 5 C.... 5 Transconductance vs. Gate-Source Voltage Transconductance vs. Gate-Source Voltage Forward Transconductance V GS(off) = V 5 C 5 C V DS = V Forward Transconductance 5 C V DS = V 5 C.... 5 5 Circuit Voltage Gain vs. Drain Current On-Resistance vs. Drain Current A V Voltage Gain. R L A V R L g os Assume V DD = 5 V, V DS = 5 V R L V V GS(off) = V r DS(on) Drain-Source On-Resistance ( Ω ) V GS(off) = V T A = 5 C - Document Number: 75 S- Rev. D, -Jun-
U/ Ciss Input Capacitance (pf) Common-Source Input Capacitance vs. Gate-Source Voltage f = MHz V DS = 5 V V DS = V V DS = V Crss Reverse Feedback Capacitance (pf) 5 Common-Source Reverse Feedback Capacitance vs. Gate-Source Voltage f = MHz V DS = 5 V V DS = V V DS = V T A = 5 C V DS = V = ma Input Admittance T A = 5 C V DS = V = ma Forward Admittance g ig b is b fs g fg b ig b fg g is.. 5 5 T A = 5 C V DS = V = ma Reverse Admittance T A = 5 C V DS = V = ma Output Admittance b rs b rg b og, b os. g rs g rg g rg g og, g os.. 5 5 Document Number: 75 S- Rev. D, -Jun- -5
U/ en Noise Voltage nv / Hz 5 Equivalent Input Noise Voltage vs. Frequency V DS = V = ma = ma g os Output Conductance (µs) 5 9 Output Conductance vs. Drain Current 5 C 5 C V DS = V k k k. f Frequency (Hz) r DS(on) Drain-Source On-Resistance ( Ω ) r DS On-Resistance and Output Conductance vs. Gate-Source Cutoff Voltage g os r DS @ = ma, V GS = V g os @ V DS = V, V GS = V g os Output Conductance (µs) Forward Transconductance Common-Source Forward Transconductance vs. Drain Current 5 C V DS = V 5 C. V GS(off) Gate-Source Cutoff Voltage (V) - Document Number: 75 S- Rev. D, -Jun-