Analog Integrated Circuits Lecture 4: Differential Amplifiers ELC 601 Fall 2013 Dr. Ahmed Nader Dr. Mohamed M. Aboudina anader@ieee.org maboudina@gmail.com Department of Electronics and Communications Engineering Faculty of Engineering Cairo University
2 Contents Bipolar-based Differential Pair MOSFET-based Differential Pair Differential Difference Amplifier Gilbert Cell Fully Differential Amplifier Common-mode Feedback
3 Differential Pair Differential vs. Single-ended Operation A single-ended signal is measured with respect to a fixed reference (usually GND). A differential signal is taken between two nodes that have equal and opposite signals with respect to a common mode voltage.
4 Differential Pair Advantages of Differential vs. Single-ended Operation Higher linearity (removal of even order harmonics) Double output voltage swing (3dB improvement in SNR) Immunity to environmental noise Double area / current consumption
5 Differential Pair Bipolar Transistor Based
6 Differential Pair Bipolar Transistor Based - Degenerated
7 Differential Pair Fundamentals v v = v + id 1 ic 2 v = 2 v ic v id 2 Common mode: Both inputs are equal to V ICM (for example Bias point) Differential mode: Each input carries a signal with equal value and opposite signs.
Differential Pair Small-Signal Analysis 8 Circuit analysis is done by superposition of differential-mode and common-mode signal portions. 1 v v + v = v od o o2 v o1 v o2 oc = v v od oc = A A dd dc A A cd cc v v id ic 2 A dd = differential-mode gain A cd = common-mode to differential-mode conversion gain A cc = common-mode gain A dc = differential mode to common-mode conversion gain For ideal symmetrical amplifier, A cd = A dc = 0. v A = dd v od 0 A oc 0 cc Purely differential-mode input gives purely differential-mode output and vice versa. v v id ic
9 Differential Pair Bipolar Transistor Based Small Signal (Differential Mode) v v v = id v e v = id v 3 2 4 e 2 ( g m + gπ)(v + v ) = G v 3 4 EE e v e ( G + 2g + 2g m ) = 0 v e = 0 EE π Emitter node in differential amplifier represents virtual ground for differential-mode input signals. v v v = id v = id 3 2 4 2 Output signal voltages are: v v = g id c1 m R v =+g C c2 m R C 2 v od = g m R C v id v id 2
10 Differential Pair Bipolar Transistor Based Small Signal (Differential Mode) Differential-mode gain for balanced output, v = v v od c1 c2 is: v A = od = g m R dd v C id v = 0 ic If either v c1 or v c2 is used alone as output, output is said to be single-ended. v g c1 m R A v g R A A = = C = dd A = c2 = m C = dd dd1 v 2 2 dd2 v 2 2 idv = 0 idv = 0 ic ic Differential-mode input resistance is small-signal resistance presented to differential-mode input voltage between the two transistor bases. (v /2) i = id R =v /i = 2r b1 id id b1 π r π If v id =0, R = 2( R r o ) 2R od C C. For single-ended outputs, R out R C
11 Differential Pair Bipolar Transistor Based Small Signal (Common Mode) Both arms of differential amplifier are symmetrical. So terminal currents and collector voltages are equal. Characteristics of differential pair with commonmode input are similar to those of a C-E (or C-S) amplifier with large emitter (or source) resistor. v i = ic b r π + 2( β o + 1) R EE Output voltages are: β R v = v = β i o C c1 c2 o R = b C r π + 2( β o + 1) R EE v e =2(β o +1)i R b EE = 2(β o +1)R EE r π +2(β o +1)R EE v ic v ic v ic
12 Differential Pair Bipolar Transistor Based Small Signal (Common Mode) Common-mode gain is given by: v β o R R A C C cc = oc = v r + 2( o + 1) R 2R ic v = 0 π β EE EE id Thus, common-mode output voltage and A cc is 0 if R EE is infinite. This result is obtained since output resistances of transistors are neglected. A more accurate expression is: 1 1 A cc R C β o r o 2R EE v = v v = 0 Therefore, common-mode conversion gain is found to be 0. od c1 c2 v r + 2( o + 1) R EE r R = ic= π β = π + ( βo+ 1) R ic 2i 2 2 EE b
13 Differential Pair Common Mode Rejection Ratio (CMRR) due to Random Mismatch
14 Differential Pair Common Mode Rejection Ratio Represents ability of amplifier to amplify desired differential-mode input signal and reject undesired common-mode input signal. For differential output, common-mode gain of balanced amplifier is zero, CMRR is infinite. For single-ended output, CMRR If term containing R EE is dominant, = A A dm cm = A dd / 2 Acc = 2 gm β 1 oro 2R 1 EE CMRR gm R = 40 EE I R EE EE Thus for differential pair biased by resistor R EE, CMRR is limited by voltage drop across R EE Capacitance at common node deteriorates CMRR at high frequency
15 Differential Pair Bipolar Transistor Based Small Signal (Half Circuit Concept) Half-circuits are constructed by first drawing the differential amplifier in a fully symmetrical form-power supplies are split into two equal halves in parallel, emitter resistor is separated into two equal resistors in parallel. None of the currents or voltages in the circuit are changed. For differential mode signals, points on the line of symmetry are virtual grounds connected to ground for ac analysis For common-mode signals, points on line of symmetry are replaced by open circuits.
16 Differential Pair Bipolar Transistor Based Small Signal (Half Circuit Concept) Half-circuits are constructed by first drawing the differential amplifier in a fully symmetrical form-power supplies are split into two equal halves in parallel, emitter resistor is separated into two equal resistors in parallel. None of the currents or voltages in the circuit are changed. For differential mode signals, points on the line of symmetry are virtual grounds connected to ground for ac analysis For common-mode signals, points on line of symmetry are replaced by open circuits.
17 Differential Pair Bipolar Transistor Based Small Signal (Differential Mode) Direct analysis of the half-circuits yield: v c1 v c2 = g m R C =+g m R C v o =v c1 v c2 v id 2 v id 2 Applying rules for drawing halfcircuits, the two power supply lines and emitter become ac grounds. The half-circuit represents a C-E amplifier stage. = g m R C v id R =v /i = 2r id id b1 π R = 2( R od C r o )
18 Differential Pair Bipolar Transistor Based Small Signal (Common Mode) All points on line of symmetry become open circuits. DC circuit with V IC set to zero is used to find amplifier s Q-point. Last circuit is used for for common-mode signal analysis and represents the C-E amplifier with emitter resistor 2R EE.
19 Half Circuit Examples
20 Half Circuit Examples: 2
21 Half Circuit Examples: 3 DM CM?
22 Differential Pair MOSFET-Based
23 Differential Pair MOSFET-Based : Large Signal
24 Differential Pair MOSFET-Based : Large Signal Assignment 3A: Prove Expressions for i od, V in1, and HD3
Differential Amplifiers Single-Ended : Common-mode range 25 Input Common Mode Range Output Swing
Differential Amplifiers Single-Ended : Differential DC-gain 26 = = = + + R down = // = 1+. = // =2 = ( // )
Differential Amplifiers Single-Ended : Common-mode DC-gain 27 By symmetry, and are equal. KCL @ V o3 : = = = Common-mode Rejection Ratio (CMRR) = = ( // )2 =
28 Differential Difference Amplifier (DDA)
29 DDA Applications Single Ended (SE) Fully Differential (FD)
30 Gilbert Cell Can act as a VGA (one Differential pair with controlled current) Can act as a 4-quadrant analog multiplier (what are the conditions?) Can act as a modulator if one of the inputs is large Can act as a phase detector if the 2 inputs are large
31 Assignment 3B Simulate a Gilbert Cell Circuit in TSMC 0.13µm with 1.2V supply: 1. Show Schematics with clear value of dimensions & biasing conditions 2. Include Design Procedure 3. Show Simulated DC Transfer Characteristics (Sweep V i1d & V i2d from -1.2V to 1.2V) 4. Show Transient Simulations of 2 AC signals 5. Discussion and Conclusions
Fully Differential Introduction 32
Fully Differential Output Common-Mode Level 33 Two fighting sets of current sources. Outputs are floating points DC level is not defined in this circuit. We must adaptively adjust either the pullup or the pull-down currents until both match Output level in the middle. Feedback is used to detect the output CM level and adjust one of the two current sources. This Feedback must not corrupt the differential signal.
Fully Differential How to define the output s common mode? 34 CMFB Loop
Fully Differential Common-Mode Feedback Circuit Conceptual 35 CM can be sensed using capacitors in SC circuits Extra source follower: Add parasitic capacitance Limit differential output voltage swing
Fully Differential Common-Mode Feedback Circuit Example 1 36 SS
Fully Differential Common-Mode Feedback Circuit Example 2 37
Fully Differential Common-Mode Feedback Circuit Example 2 (continued) 38
Fully Differential Common-Mode Feedback Circuit Example 3: Preferred Solution 39
Fully Differential Common-Mode Feedback Circuit Characteristics 40
Fully Differential Common-Mode Feedback Circuit Characteristics 41 [41] J.F. Duque-Carrillo, Continuous-time common-mode feedback networks for fullydifferential amplifiers: a comparative study, IEEE International Symp. on Circuits and Systems, vol.2, pp.1267-1270, May 1993.