Department of Electrical and Electronics Engineering Logic Circuits Laboratory EXPERIMENT-1 BASIC GATE CIRCUITS

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1.1 Preliminary Study Simulate experiment using an available tool and prepare the preliminary report. 1.2 Aim of the Experiment Implementation and examination of logic gate circuits and their basic operations. 1.3 Basic Theory As is well known, numeric (digital) electronic systems are the systems working in accordance with basic logic rules. In such systems, input and output can have two different conditions (0 or 1), and this kind of systems are named as binary number systems. This number system is used in all logic circuits from the simplest to the most complex. There are basically three logic gates. These are OR, AND, NOT (INVERTER) gates. Other derivatives of the logic gates can be produced using these three gates. NOT-AND NOT-OR NAND NOR EX-OR EX-NOR (Exlusive OR gate) (Exlusive NOR gate) In this experiment, the logic gates will be created with various circuits established using diodes and transistors. As known, transistors have wide application area as amplifier. In general, transistors have three types of operating states. Cut-off state Active state Saturation state Cut-off and saturation states of the transistor are used in digital electronics applications. The transistor is in cut-off state if base current of the transistor is zero. Collector-emitter is behaves like open circuit if the transistor is in cut-off state. Else if the transistor is in saturation state collector-emitter is behaves as short circuit. This working state is named as transistor s switching state. 1.3.4 OR gate Truth table and circuit symbol of OR gate is respectively given in Table 1.1 and Figure 1.1. Various OR gate circuits can be created to verify the truth table. In this experiment two different examples will be given and discussed. 1

Table 1.1 OR gate truth table Figure 1.1 OR gate symbol Inputs Output A B F 0 0 0 0 1 1 1 0 1 1 1 1 1.3.4.1 OR gate circuit with Diode OR gate with two-inputs which is created using diodes, is given in Figure 1.2. If logic 0 (0 Volt in positive logic) is applied to the two-inputs, DA and DB diodes are both in cut-off state. Because diodes do not begin conducting electricity until a certain threshold voltage applied in the forward direction. The potential difference (VAK) between anode and cathode of the diode must be over 0.6 V for silicon diode and 0.2 V for germanium diode, with the provotion of anode is more positive than cathode, this situation can be seen in Figure 1.3. When 0 V is applied to the both inputs of diode, diode will be in cut-off state and the output of the OR gate will have logic value 0. If logic value 1 (+5V) is applied to one of the inputs of the diode, this diode will be forward biased and the logic value 1 is transferred to the output F. In meantime there is 0.6 V (for silicon diode) voltage drop on the forward-biased diode. Consequently, if one or more of its inputs are logic value 1 then the output F is logical 1, else if both of its inputs are logical 0 then the output F is logical 0. Figure 1.2 OR gate circuit with diodes Figure 1.3 VAK 1.3.4.2 OR gate circuit with Transistors An OR gate circuit which consists of transistors and with two inputs, is shown in Figure 1.4. In this circuit if the both inputs are logical 0 the transistors TA and TB are in cut-off state. Because of the transistors are in cut-off state, there is no current over resistor R so the output F is logical 0. If one of the inputs is logical 1 then the related transistor starts conducting (transistors saturation state). In this situation current I completes its circuit over resistor R and causes a voltage drop on the F output.this means that the F output is logical 1. 2

1.3.5 AND Gate Figure 1.4 Or gate circuit with transistors Truth table and circuit symbol of AND gate is respectively given in Table 1.2 and Figure 1.5. Output of the AND gate is logical 1 if the both inputs are logical 1, otherwise the output is logical 0. There is two sample circuits for AND gate as the OR gate. Table 1.2 Truth Table of AND gate Figure 1.5 AND gate 1.3.5.1 AND gate circuit with Diode Inputs Output A B F 0 0 0 0 1 0 1 0 0 1 1 1 AND gate circuit with diode is shown in Figure 1.6. In this circuit if the both inputs are logical 0 then the diodes DA and DB will be polarized in forward direction so 0.6 V is seen on the F output. This potential difference VAK is considered as logical 0. If one of the inputs is logical 1 and the other one is logical 0 then the output is also logical 0 because one of the diodes is in cut-off state and other one is in active state. Input voltage is logical 0 of the diode which is in active state, so the F output is connected to ground so it is logical 0. If the both inputs are logical 1, the diodes will be polarized reverse direction and the supply voltage (+VCC) is seen on the F output. And this output value is considered as logical 1. 3

1.3.5.2 AND gate circuit with Transistors Figure 1.6 AND gate with Diodes The AND gate circuit with transistors is shown in Figure 1.7. In this circuit when the both inputs are logical 0, the transistors TA ve TB will be in cut-off state. So the voltage VCC is seen on node C1 and with this voltage transistor TF starts conducting. As a result F output will be logical 0. When the both inputs are logical 1, the transistors TA and TB will be conducting and the node C1 appears as ground. In this situation transistor TF is in cut-off state and F output will be logical 1. Figure 1.7 AND gate circuit with transistors 4

1.3.6 NOT gate Truth table and circuit symbol of NOT gate is respectively given in Table 1.3 and Figure 1.8. This gate inverts the input signal. Table 1.3 Truth table of NOT gate Figure 1.8 NOT gate Input Output A F 0 1 1 0 If the input is 0 then the output is logical 1, or the input is logical 1 then the output is logical 0. NOT gate circuit with transistor is shown in figure 1.9. In this circuit if the input is logical 0 the transistor is in cut-off state and VCC voltage appears on F output. This is considered as logical 1. When logical 1 is applied to input then the transistor starts conducting and output node F will be connected to ground. Logical 0 is seen on F output. 1.4 Components Used In This Experiment Cadet Masterlab experiment set Multimeter (1 quantity) 1N400X Diode (2 quantities) LED Diode (4 quantities) BC237 Transistor (3 quantities) 33K ohm Resistance (2 quantities) 270 ohm Resistance (1 quantity) 1K ohm Resistance (4 quantities) 10K ohm Resistance (3 quantities) Figure 1.9 Not gate circuit with transistor 5

56K ohm Resistance (1 quantity) 100K ohm Resistance (1 quantity) Connection Cables 1.5 Experiment Study 1. Setup the circuits shown in Figure 1.2 and Figure 1.4, and build up the truth tables. 2. Setup the circuits shown in Figure 1.6 and Figure 1.7, and build up the truth tables. 3. Setup the circuit shown in Figure 1.9 and build up the truth table. 1.6 Experiment Problems 1. Using the basic gate circuits and truth tables, draw NAND, NOR, EXOR and EXNOR gates and build up the truth tables then explain the working principles. 2. Provide information about the integrated circuit technologies. 3. Provide information about passive and active components used in electronics. 6