CMOS 2.4GHZ ZIGBEE/ISM TRANSMIT/RECEIVE RFeIC

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CMOS 2.4GHZ ZIGBEE/ISM TRANSMIT/RECEIVE RFeIC Description 17 1 2 3 4 TXRX VDD VDD D 16 15 14 13 12 11 10 ANT 9 The is a fully integrated, single-chip, single-die RFeIC (RF Front-end Integrated Circuit) which incorporates all the RF functionality needed for IEEE 802.15.4/ZigBee, wireless sensor network, and any other wireless systems in the 2.4GHz ISM band. The architecture integrates the PA, LNA, Transmit and Receive switching circuitry, the associated matching network, and the harmonic filter all in a CMOS single-chip device. Typical high power applications include home and industrial automation, smart power, and RF4CE among others. Combining superior performance, high sensitivity and efficiency, low noise, small form factor, and low cost, is the perfect solution for applications requiring extended range and bandwidth. has simple and low-voltage CMOS control logic, and requires minimal external components for system implementation. Applications 5 6 7 8 TXEN RXEN ZigBee Extended Range Devices ZigBee Smart Power Wireless Sound and Audio Systems Home and Industrial Automation Wireless Sensor Networks Custom 2.4GHz Radio Systems FEATURES 2.4GHz ZigBee High Power Single-Chip, Single-Die RF Front-End IC Combined TX / RX Transceiver Port and Single Antenna Port 2.4GHz Transmit High Power Amplifier with Low- Pass Harmonic Filter Low Noise Amplifier Transmit / Receive Switch Circuitry High Transmit Signal Linearity Meeting Standards for OQPSK Modulation Integrated Power Detector for Transmit Power Monitor and Control Low Voltage (1.2V) CMOS Control Logic ESD Protection Circuitry on All Ports DC Decoupled RF Ports Internal RF Decoupling on All VDD Bias Pins Low Noise Figure for the Receive Channel Very Low DC Power Consumption Full On-chip Matching and Decoupling Circuitry Minimal External Components Required 50-Ohm Input / Output Matching Market Proven CMOS Technology 3 x 3 x 0.55mm Small Outline QFN-16 Package with Exposed Ground Pad This document and the product are subject to change without notice. 1

PIN ASSIGNMENTS: Pin Number Pin Name Description 1, 7, 12, 15 Not Connected; May be floated or connected to 4 TXRX RF signal to / from the Transceiver: DC shorted to 5 TXEN CMOS Input to Control TX Enable 6 RXEN CMOS Input to Control RX Enable 10 ANT RF Signal from the PA or RF Signal Applied to the LNA; DC Shorted to 2, 3, 8, 9, 11, 17 Ground Must be connected to Ground in the Application Circuit 13 D Reserved Do Not Connect in the Application Circuit 14 VDD Alternative Voltage Supply Pin, internally connected to Pin 16, no connection needed 16 VDD Voltage Supply Connection PIN-OUT DIAGRAM: VDD VDD D 16 15 14 13 1 12 2 17 11 3 10 ANT TXRX 4 9 5 6 7 8 TXEN RXEN (Top View) This document and the product are subject to change without notice. 2

ABSOLUTE MAXIMUM RATINGS: Parameters Units Min Max Conditions DC VDD Voltage Supply V 0 4.0 DC Control Pin Voltage V 0 3.6 Through 1Kohm resistor DC VDD Current Consumption ma 350 Through VDD Pins when TX is ON DC Control Pin Current Consumption μa 1 TX RF Input Power dbm +5 All Operating Modes ANT RF Input Power dbm +5 When RX is ON Junction Temperature C 150 Storage Ambient Temperature o C -50 +150 No RF and DC Voltages Applied Appropriate care required according to JEDEC Standards Note1: Sustained operation at or above the Absolute Maximum Ratings for any one or combinations of the above parameters may result in permanent damage to the device and is not recommended. All Maximum RF Input Power Ratings assume 50-Ohm terminal impedance. RECOMENDED OPERATING CONDITIONS: Parameters Units Min Typ Max Conditions DC VDD Voltage Supply V 2.0 3.3 3.6 All VDD Pins Control Voltage High V 1.2 VDD Through 1Kohm resistor Control Voltage Low V 0 0.3 Operating Ambient Temperature ja o C -40 +125 o C/W 35 See note 2 Note2: For operation above +85 o C, use the ja as guidance for system design to assure the junction temperature will not exceed the maximum of +150 o C. This document and the product are subject to change without notice. 3

TRANSMIT TECHNICAL PARAMETERS (VDD=3.3V; T=+25 o C) Parameters Units Min Typ Max Conditions Operating Frequency Band GHz 2.4 2.525 All RF Pins Terminated by 50 Ohm Saturated Output Power dbm +22 Small-Signal Gain db 25 Second Harmonic dbm/mhz -10 Third Harmonic dbm/mhz -20 Input Return Loss db -10 Output Return Loss db -6 Input / Output Impedance Single-Ended Ohm 50 P OUT = +20dBm, IEEE 802.15.4 OQPSK modulation signal P OUT = +20dBm, IEEE 802.15.4 OQPSK modulation signal TX Quiescent Current ma 17 No RF Applied TX High Power Current ma 90 P OUT = +20dBm Load VSWR for Stability (Pout=+20dBm) N/A 6:1 Load VSWR for Ruggedness (Pout=+20dBm) All Non-Harmonically Related Spurs Less than -43dBm/MHz N/A 10:1 No Damage RECEIVE TECHNICAL PARAMETERS (VDD=3.3V; T=+25 o C) Parameters Units Min Typ Max Conditions Operating Frequency Band GHz 2.4 2.525 All RF Pins Terminated by 50 Ohm Gain db 12 Noise Figure db 2.5 Input Return Loss db -10 Output Return Loss db -12 RF Port Impedance Ohm 50 RX Quiescent Current ma 8 No RF Applied Input P 1dB dbm -8 At ANT Pin This document and the product are subject to change without notice. 4

STANDBY MODE TECHNICAL PARAMTERS: Parameters Units Min Typ Max Conditions DC Shutdown Current μa 1 TXRX-ANT Insertion Loss (S21) db -50 Pin < -20dBm ANT-TXRX Insertion Loss (S21) db -50 Return Loss (S11) db -1.5 From TXRX Port Transmit-Receive Switching Time nsec 800 Shut-Down and ON State Switching Time nsec 800 CONTROL LOGIC TRUTH TABLE TXEN RXEN Operating Conditions 1 X TX Active 0 1 RX Active 0 0 Chip is Shut-down Note: 1 denotes high voltage state (> 1.2V) 0 denotes low voltage stage (<0.3V) at Control Pins X denotes do not care: either 1 or 0 can be applied This document and the product are subject to change without notice. 5

APPLICATION CIRCUIT GUIDELINES Central Ground Pad Use thermal vias to Assure efficient heat dissipation Locate bypass capacitor as Close to the ground pad as Possible. Use 2 ground vias. RF Port is at DC potential! If the Transceiver TXRX port has DC present, use a capacitor to block this voltage from reaching the. 17 3.3V 1 16 15 14 13 VDD VDD D VDD pin 14 Optional VDD pin, internally connected to pin 16 12 Pins 1, 7, 12, and 15 May be left open or connected to 2 11 3 10 50 OHM TXRX Transceiver TXEN. 50 OHM 1K 4 TXRX TXEN RXEN 5 6 7 8 ANT 9 Antenna Port is at DC potential! If the Antenna circuits have DC present, use a capacitor to block this voltage from reaching the. RXEN 1K PCB LAND PATTERN 0.25mm 0.25mm 0.5mm 0.65mm 1.7mm x 1.7mm 3.5mm 3.0mm This document and the product are subject to change without notice. 6

PACKAGE DIMENSIONS: A A1 D2 D b e Dimensions Min A 0.5 A1 0.00 b 0.20 D 2.95 D2 1.65 E 2.95 E2 1.65 e 0.45 L 0.35 (mm) Nom 0.55 0.25 3.00 1.70 3.00 1.70 0.50 0.40 Max 0.6 0.05 0.30 3.05 1.75 3.05 1.75 0.55 0.45 L E E2 Pin 1 Mark Pin 1 PACKAGE MARKING: 2401C LLLL.L UHYYWW Pin 1 Mark First Line: Part Number Second Line: Lot Number Third Line: Date Code This document and the product are subject to change without notice. 7

TAPE AND REEL INFORMATION: This document and the product are subject to change without notice. 8

RECOMMENDED SOLDER REFLOW PROFILE: This document and the product are subject to change without notice. 9

This document and the product are subject to change without notice. 10