Summarize TM80 is a bits LED (light-emitting diode display) drive control circuit, internal integrated with MCU digital interface, latch, LED high voltage driver and so on.through the external MCU control, the chip can achieve separate luminance, And through cascade control can achieve outdoor large-screen color dot-matrix light-emitting control. TM80 have excellent performance and high reliability. Feature Use high-voltage power CMOS process Output voltage is up to V rightness adjustment circuit() Serial-shift and cascade Interface Oscillation mode:uilt-in C oscillator, signal clock synchronization. While accepting the completed data of this module, data can be auto-shaped and transmitted to next chip via data output pin. uilt-in power-on reset circuit PWM control side can achieve adjustment, scan frequency not less than 00hz / s The completion of data reception and decoding by a signal line When the refresh rate of 0 frames/ s, the number of cascade is not less than on low-speed mode. And it is not less than 0 on high-speed mode. SOP8 package Data transmission speed can be 00Kbps and 800Kbps two modes Page of
PIN Configuration (Top View) TM80 OUT OUT OUT ND 8 SET DIN DO PIN identifications: PIN NO. PIN name Description OUT ed PWM Control Output OUT reen PWM Control Output OUT lue PWM Control Output VSS Logical gnd ; system gnd DOUT Data Output DIN Data Input SET Mode setting )SET to:low-speed mode )SET flaoting: High-speed mode 8 Logic Power,V±0% Electrical parameters Limit parameter(ta =, Vss = 0 V) Parameter Symbol ange Unit Logic Supply Voltage -0. ~+.0 V Output voltage VOUT V Logic input voltage VI -0. ~ + 0. V LED Driver Output Current IO 80 ma Power loss PD 00 mw Operating Temperature Topt -0 ~ +80 Storage Temperature Tstg - ~+0 Page of
The normal scope of work(ta = -0 ~ +0,Vss = 0 V) Parameter Symbol Min Typical Max unit Test Conditions Logic Supply Voltage V - 0. Hign-level input voltage VIH - V - Low-level input voltage VIL 0-0. V - Electrical characteristics(ta = -0 ~ +0, =. ~. V, Vss = 0 V) Parameter Symbol Min Typical Max unit Test Condition Low-level output current Low-level output current IOL 80 0 - ma OUT/OUT/OUT Vo=0.V Idout 0 - - ma VO = 0.V,DOUT Input Current II - - ± μa VI = / VSS High-level input voltage Low-level input voltage VIH 0. - V DIN VIL - - 0. V DIN Hysteresis voltage VH - 0. - V DIN Dynamic current consumption IDDdyn - - ma No load, display off Power Dissipation PD 0 mw (Ta= C) Thermal esistance th(j-a) 9. 90 C/W Switching characteristics(ta = -0 ~ +0, =. ~. V) Parameter Symbol Min Typical Max Unit Test Conditions Oscillation frequency fosc - 00 - KHz / Propagation delay tplz - - 00 ns DIN DOUT time tpzl - - 00 ns CL = pf, L = 0K Ω Fall Time TTHZ - - 0 μs CL = 00pF, OUT/OUT/OUT Data rate Fmax 00 - - Kbps 0% duty cycle Input capacitance CI - - pf - Page of
Function Description TM80 adopts single wire to communicate and Z (return to zero code) method to sent signal. On power-on resert status, when chip receive complete bits data from DIN, it begin transmitting data to next chip via DO. efore transmission, DO will be keep low-level.out, OUT, OUT these PWM will output different duty signal according to different data per bits, the cycle of signal is ms.if input signal is ESET, the chip will be ready to receive new data after displaying all the received data.the same when receive new bit data completely, it will transmit them to next chip via DO. TM80 has the ability of auto-shape and signal transmission.the number of cascade is not limited by signal transmission, just limited by screen refresh speed.for example, we design 0 cascade with TM80, the refresh time can be canculated is 0*0.*=0.89ms(delay time is 0.us), no any twinkle will be detected. Timing Waveform Input Pattern 0 code code ESETcode T0H TH Treset TL TL Low-speed mode time Name Description TYP Tolerance T0H 0 code, high time 0.8us ±0ns TH code, high time.us ±0ns T0L 0 code, low time.us ±0ns TL code, low time 0.8us ±0ns Treset esetcode,low time us - Note: When on high-speed mode, half the above time only. Page of
Connection Method D DIN DO D DIN DO D DIN DO D chip chip chip Data Transfer Method D D D D The first bit The second bit The third bit The second bit The third bit The third bit ESET CODE bit data structure 0 0 0 Uper bit first, sent data in accordance with,, order. Page of
IC Package diagram Sop8 Page of