BAV70DXV6T1, BAV70DXV6T5 Preferred Device. Monolithic Dual Switching Diode Common Cathode. Lead-Free Solder Plating.

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BAV70DXV6T1, BAV70DXV6T5 Preferred Device Monolithic Dual Switching Diode Common Cathode LeadFree Solder Plating MAXIMUM RATINGS (EACH DIODE) Rating Symbol Value Unit Reverse Voltage V R 70 Vdc Forward Current I F 200 madc Peak Forward Surge Current I FM(surge) 500 madc THERMAL CHARACTERISTICS Characteristic (One Junction Heated) Symbol Max Unit Total Device Dissipation T A = 25 C Derate above 25 C Thermal Resistance JunctiontoAmbient P D 357 2.9 R JA 350 mw mw/ C C/W Characteristic (Both Junctions Heated) Symbol Max Unit Total Device Dissipation T A = 25 C Derate above 25 C Thermal Resistance JunctiontoAmbient Junction and Storage Temperature Range 1. FR4 @ Minimum Pad P D 500 4.0 R JA 250 mw mw/ C C/W T J, T stg 55 to +150 C 6 CATHODE 5 4 BAV70DXV6T1 6 5 4 1 2 3 SOT563 CASE 463A PLASTIC MARKING DIAGRAM A4 D A4 = Specific Device Code D = Date Code 1 2 3 CATHODE ORDERING INFORMATION Device Package Shipping BAV70DXV6T1 SOT563 4 mm pitch 4000/Tape & Reel BAV70DXV6T5 SOT563 2 mm pitch 8000/Tape & Reel Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 2003 March, 2003 Rev. 1 1 Publication Order Number: BAV70DXV6T1/D

ELECTRICAL CHARACTERISTICS (T A = 25 C unless otherwise noted) (EACH DIODE) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS Reverse Breakdown Voltage (I (BR) = 100 Adc) Reverse Voltage Leakage Current (Note 4) (V R = 25 Vdc, T J = 150 C) (V R = 70 Vdc) (V R = 70 Vdc, T J = 150 C) Diode Capacitance (V R = 0, f = MHz) Forward Voltage (I F = madc) (I F = 10 madc) (I F = 50 madc) (I F = 150 madc) Reverse Recovery Time R L = 100 (I F = I R = 10 madc, V R = 5.0 Vdc, I R(REC) = madc) (Figure 1) V (BR) 70 Vdc I R 60 2.5 100 Adc C D 1.5 pf V F 715 855 1000 1250 mvdc t rr 6.0 ns 2. 1. FR 5 = 0.75 0.062 in. 3. 2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina. 4. 3. For each individual diode while second diode is unbiased. 820 +10 V 2.0 k 100 H 0.1 F I F 0.1 F t r t p t 10% I F t rr t 50 OUTPUT PULSE GENERATOR D.U.T. 50 INPUT SAMPLING OSCILLOSCOPE V R 90% INPUT SIGNAL I R i R(REC) = ma OUTPUT PULSE (I F = I R = 10 ma; MEASURED at i R(REC) = ma) Notes: 1. A 2.0 k variable resistor adjusted for a Forward Current (I F ) of 10 ma. Notes: 2. Input pulse is adjusted so I R(peak) is equal to 10 ma. Notes: 3. t p» t rr Figure 1. Recovery Time Equivalent Test Circuit 2

Curves Applicable to Each Anode 100 10 T A = 150 C IF, FORWARD CURRENT (ma) 10 T A = 85 C T A = 25 C T A = 40 C I R, REVERSE CURRENT (µa) 0.1 0.01 T A = 125 C T A = 85 C T A = 55 C 0.1 0.2 0.4 0.6 0.8 1.2 V F, FORWARD VOLTAGE (VOLTS) 0.001 0 T A = 25 C 10 20 30 40 50 V R, REVERSE VOLTAGE (VOLTS) Figure 2. Forward Voltage Figure 3. Leakage Current CD, DIODE CAPACITANCE (pf) 0.9 0.8 0.7 0.6 0 2 4 6 8 V R, REVERSE VOLTAGE (VOLTS) Figure 4. Capacitance 3

INFORMATION FOR USING THE SOT563 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.3 0.0118 0.45 0.0177 1.35 0.0531 0.0394 0.5 0.0197 0.5 0.0197 SOT563 SCALE 20:1 mm inches The power dissipation of the SOT563 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T J(max), the maximum rated junction temperature of the die, R JA, the thermal resistance from the device junction to ambient, and the operating temperature, T A. Using the values provided on the data sheet for the SOT563 package, P D can be calculated as follows: P D = T J(max) T A R JA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature T A of 25 C, one can calculate the power dissipation of the device which in this case is 150 milliwatts. P D = 150 C 25 C 833 C/W = 150 milliwatts The 833 C/W for the SOT563 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 150 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT563 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. SOT563 POWER DISSIPATION SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. Always preheat the device. The delta temperature between the preheat and soldering should be 100 C or less.* When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10 C. The soldering temperature and time shall not exceed 260 C for more than 10 seconds. When shifting from preheating to soldering, the maximum temperature gradient shall be 5 C or less. After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. 4

PACKAGE DIMENSIONS SOT563, 6 LEAD CASE 463A01 ISSUE O A X C K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 6 5 4 1 2 3 G B Y D 65 PL 0.08 (0.003) M X Y S J MILLIMETERS INCHES DIM MIN MAX MIN MAX A 1.50 1.70 0.059 0.067 B 1.10 1.30 0.043 0.051 C 0.50 0.60 0.020 0.024 D 0.17 0.27 0.007 0.011 G 0.50 BSC 0.020 BSC J 0.08 0.18 0.003 0.007 K S 0.10 1.50 0.30 1.70 0.004 0.059 0.012 0.067 STYLE 1: PIN 1. EMITTER 1 2. BASE 1 3. COLLECTOR 2 4. EMITTER 2 5. BASE 2 6. COLLECTOR 1 STYLE 2: PIN 1. EMITTER 1 2. EMITTER2 3. BASE 2 4. COLLECTOR 2 5. BASE 1 6. COLLECTOR 1 STYLE 3: PIN 1. CATHODE 1 2. CATHODE 1 3. / 2 4. CATHODE 2 5. CATHODE 2 6. / 1 STYLE 4: PIN 1. COLLECTOR 2. COLLECTOR 3. BASE 4. EMITTER 5. COLLECTOR 6. COLLECTOR 5

Thermal Clad is a trademark of the Bergquist Company. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 3036752175 or 8003443860 Toll Free USA/Canada Fax: 3036752176 or 8003443867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 8002829855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 291 Kamimeguro, Meguroku, Tokyo, Japan 1530051 Phone: 81357733850 ON Semiconductor Website: For additional information, please contact your local Sales Representative. 6 BAV70DXV6T1/D