CH85CH2202-0/85/ $1.00

Similar documents
UNIT 2. Q.1) Describe the functioning of standard signal generator. Ans. Electronic Measurements & Instrumentation

LINEAR IC APPLICATIONS

TUNED AMPLIFIERS 5.1 Introduction: Coil Losses:

MAHALAKSHMI ENGINEERING COLLEGE TIRUCHIRAPALLI UNIT III TUNED AMPLIFIERS PART A (2 Marks)

The steeper the phase shift as a function of frequency φ(ω) the more stable the frequency of oscillation

RF/IF Terminology and Specs

The Synchronous Oscillator: A Synchronization and Tracking Network

HF Receivers, Part 2

Technical Article A DIRECT QUADRATURE MODULATOR IC FOR 0.9 TO 2.5 GHZ WIRELESS SYSTEMS

Tuesday, March 22nd, 9:15 11:00

LM13600 Dual Operational Transconductance Amplifiers with Linearizing Diodes and Buffers

High Frequency VCO Design and Schematics

Advanced Regulating Pulse Width Modulators

PULSE CODE MODULATION TELEMETRY Properties of Various Binary Modulation Types

Timing Noise Measurement of High-Repetition-Rate Optical Pulses

Oscillators. An oscillator may be described as a source of alternating voltage. It is different than amplifier.

TL594C, TL594I, TL594Y PULSE-WIDTH-MODULATION CONTROL CIRCUITS

Advanced Regulating Pulse Width Modulators

Antenna Measurements using Modulated Signals

New Technique Accurately Measures Low-Frequency Distortion To <-130 dbc Levels by Xavier Ramus, Applications Engineer, Texas Instruments Incorporated

Keysight Technologies PNA-X Series Microwave Network Analyzers

LBI-30398N. MAINTENANCE MANUAL MHz PHASE LOCK LOOP EXCITER 19D423249G1 & G2 DESCRIPTION TABLE OF CONTENTS. Page. DESCRIPTION...

TONE DECODER / PHASE LOCKED LOOP PIN FUNCTION 1 OUTPUT FILTER 2 LOW-PASS FILTER 3 INPUT 4 V + 5 TIMING R 6 TIMING CR 7 GROUND 8 OUTPUT

Phase-locked loop PIN CONFIGURATIONS

Emitter base bias. Collector base bias Active Forward Reverse Saturation forward Forward Cut off Reverse Reverse Inverse Reverse Forward

TSEK03: Radio Frequency Integrated Circuits (RFIC) Lecture 8 & 9: Oscillators

TL494M PULSE-WIDTH-MODULATION CONTROL CIRCUIT

ERICSSONZ LBI-30398P. MAINTENANCE MANUAL MHz PHASE LOCKED LOOP EXCITER 19D423249G1 & G2 DESCRIPTION TABLE OF CONTENTS

TL494C, TL494I, TL494M, TL494Y PULSE-WIDTH-MODULATION CONTROL CIRCUITS

UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE Department of Electrical and Computer Engineering

TL594 PULSE-WIDTH-MODULATION CONTROL CIRCUITS

LM13700 Dual Operational Transconductance Amplifiers with Linearizing Diodes and Buffers

LM565/LM565C Phase Locked Loop

LM565 LM565C Phase Locked Loop

Twelve voice signals, each band-limited to 3 khz, are frequency -multiplexed using 1 khz guard bands between channels and between the main carrier

LM110 LM210 LM310 Voltage Follower

CLOCK AND DATA RECOVERY (CDR) circuits incorporating

Synchronous Oscillator Using High Speed Emitter Couple Logic (ECL) Inverters

Chapter 2. The Fundamentals of Electronics: A Review

INTEGRATED CIRCUITS. AN179 Circuit description of the NE Dec

XR FSK Modem Filter FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION FEATURES ORDERING INFORMATION APPLICATIONS SYSTEM DESCRIPTION

two computers. 2- Providing a channel between them for transmitting and receiving the signals through it.

THE TREND toward implementing systems with low

Advanced Regulating Pulse Width Modulators

Summer 2015 Examination

EE 3305 Lab I Revised July 18, 2003

Lab 4. Crystal Oscillator

NTE7047 Integrated Circuit TV Color Small Signal Sub System

LM13700 Dual Operational Transconductance Amplifiers with Linearizing Diodes and Buffers

High Dynamic Range Receiver Parameters

Figure 1: Closed Loop System

SG2525A SG3525A REGULATING PULSE WIDTH MODULATORS

CUSTOM INTEGRATED ASSEMBLIES

ODUCTCEMENT CA3126 OBSOLETE PR NO RECOMMENDED REPLA

Analysis and Design of Autonomous Microwave Circuits

IAM-8 Series Active Mixers. Application Note S013

SEQUENTIAL NULL WAVE Robert E. Green Patent Pending

Regulating Pulse Width Modulators

TL594 PULSE-WIDTH-MODULATION CONTROL CIRCUIT

PREVIEW COPY. Amplifiers. Table of Contents. Introduction to Amplifiers...3. Single-Stage Amplifiers...19

Low Distortion Mixer AD831

Direct-Conversion I-Q Modulator Simulation by Andy Howard, Applications Engineer Agilent EEsof EDA

LM389 Low Voltage Audio Power Amplifier with NPN Transistor Array

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier

Glossary of VCO terms

UNIT III ANALOG MULTIPLIER AND PLL

Chapter 6: Power Amplifiers

ML4818 Phase Modulation/Soft Switching Controller

Physical Layer: Outline

D-STATE RADIOMETER. I. Switch Driver

BANDPASS delta sigma ( ) modulators are used to digitize

Quantum frequency standard Priority: Filing: Grant: Publication: Description

EMT212 Analog Electronic II. Chapter 4. Oscillator

Lecture 6. Angle Modulation and Demodulation

Low noise amplifier, principles

Chapter.8: Oscillators

UNIT-3. Electronic Measurements & Instrumentation

High Frequency VCO Design and Schematics

Analog & Digital Communication

Pulsed VNA Measurements:

HF Receivers, Part 3

A Fully Integrated CMOS Phase-Locked Loop With 30MHz to 2GHz Locking Range and ±35 ps Jitter

Y Low quiescent current drain. Y Voltage gains from 20 to 200. Y Ground referenced input. Y Self-centering output quiescent voltage.

Introduction to Receivers

PART MAX2605EUT-T MAX2606EUT-T MAX2607EUT-T MAX2608EUT-T MAX2609EUT-T TOP VIEW IND GND. Maxim Integrated Products 1

Half Duplex GMSK Modem

Chapter 13: Comparators

Lecture 6 SIGNAL PROCESSING. Radar Signal Processing Dr. Aamer Iqbal Bhatti. Dr. Aamer Iqbal Bhatti

Introduction to Phase Noise

Characterize Phase-Locked Loop Systems Using Real Time Oscilloscopes

Making Noise in RF Receivers Simulate Real-World Signals with Signal Generators

LM110 LM210 LM310 Voltage Follower

Configuring the MAX3861 AGC Amp as an SFP Limiting Amplifier with RSSI

0.6 kbits/s, the modulation shall be aviation binary phase shift keying (A-BPSK).

Design of a Regenerative Receiver for the Short-Wave Bands A Tutorial and Design Guide for Experimental Work. Part I

CD22202, CD DTMF Receivers/Generators. 5V Low Power DTMF Receiver. Features. Description. Ordering Information. Pinout. Functional Diagram

INC. MICROWAVE. A Spectrum Control Business

Gechstudentszone.wordpress.com

Local Oscillator Phase Noise and its effect on Receiver Performance C. John Grebenkemper

Document Name: Electronic Circuits Lab. Facebook: Twitter:

Transcription:

SYNCHRONIZATION AND TRACKING WITH SYNCHRONOUS OSCILLATORS Vasil Uzunoglu and Marvin H. White Fairchild Industries Germantown, Maryland Lehigh University Bethlehem, Pennsylvania ABSTRACT A Synchronous Oscillator (SO) is a synchronization and tracking network which synchronizes, tracks, filters, divides and amplifies in a single process. The SO possesses two bandwidths, which function independently from each other. The resolution bandwidth which determines to a high degree the noise rejection properties of a SO is a function of the regeneration or Q-multiplication process of the circuit whereas, the tracking range is a function of the external signal amplitude. In other tracking networks when the noise rejection properties of the loop is identified, the tracking range is fixed, whereas in a SO the resolution bandwidth and the tracking range can be optimized independently. The SO has also very high input signal sensitivity. SOs can track signals with -45 db signal-to-noise ratio and maintain several hundred KHz tracking range at this input level. INTRODUCTION A Synchronous Oscillator (SO) (ref. 1) is a free-running oscillator, oscillating at its natural frequency wo, as long as no external signal is applied. As soon as an external or control signal of frequency w in the vicinity of wo is applied, the SO starts tracking the external frequency. While the output frequency is synchronized to the external frequency, a phase difference exists between input and output which depends on the initial frequency difference between the natural and external frequencies. The external frequency can be sinusoidal, pulse, or characterized by other waveform. A basic circuit of a SO used for carrier recovery is shown in Figure 1 and a typical gain and phase versus frequency characteristics are shown in Figure 2. Figure 1 can be represented by the differential equation (ref. 2). 2 V + w V = JGmlv (1) where Gml is the transconductance of T1 and C = C3(1+C3/C2). SOURCE ATTENUATOR SIGNAL INJECTION NETWORK Figure 1. Functional Description of the Synchronous Oscillator Circuit Figure 2. Gain-Phase Synchronization Curves of a SO SO is functionally and structurally different from Van der Pol and Injection-Locked oscillators (ref. 2-5). UNIQUE PROPERTIES OF SOs SOs combine acquisition tracking, filtering and frequency dividing functions and improve the injected signal-to-noise ratio in a single process. The superb filtering properties of a SO stems from its resolution bandwidth which is much narrower than its tracking range. A SO operates like a 324 17.3.1 CH85CH2202-0/85/0000-0324 $1.00 IEEE

spectrum analyzer. It has narrow bandwidth for each frequency it tracks. The resolution bandwidth, which determines to a high degree the filtering properties of a SO, is independent of the tracking range. The former is determined by the regeneration process whereas the latter is determined by the external signal level to the SO. In a phase-lock loop, for example, the loop bandwidth determines both. For improved filtering the loop filter bandwidth must be narrow. Narrow loop bandwidth in turn reduces the tracking range, degrades the performance whenever there is frequency offset and increases the acquisition time. A SO has also very high input signal sensitivity, and it is inversely proportional to the external signal level. Lower external signal level increases the sensitivity. A SO can detect signals as low as -100 dbm and track them. The sensitivity of any network is limited by the thermal noise generated at its input. The input thermal noise in an SO is very low. An SO is also a matched filter. A SO can be designed to have zero phase shift between its input and output for all external frequencies within its tracking range. Thus, the external signal is correlated with the SO waveform which has the same frequency and phase. An SO acquires very fast even under noise and frequency offset. For example, a 70 MHz SO when driven by a carrier which is offset by 100 KHz from the free running frequency of the SO and has -20 db signal-to-noise ratio can acquire frequency and phase in less than 200 nseconds. The tracking range or bandwidth of an SO is determined by the external signal level. Reduced external signal decreases the bandwidth. When the regeneration gain is relatively low to keep the resolution bandwidth wide and the tracking range narrow, the process becomes adaptive. That is, reduced signal-to-noise decreases the tracking range to keep the output signal-to-noise ratio constant. The output amplitude of the SO is independent of the external signal level. As the output ampl i- tude of the SO is constant for a varying external signal and the external signal is usually 20-30 db lower than the output amplitude one can define the output/input relation as gain. A SO can be designed to have frequency memory. This property of SO is important specifically in systems with intermittent synchronization inputs. The flat synchronization range is due to amplitude saturation of the SO network and it is caused by very high internal regeneration gain of the transistors (Gm 10,000 mmhos), which is turn determines the resolution bandwidth. HIGH NOISE REJECTION PROPERTIES AND HIGH SENSITIVITY OF A SO The input signal applied to the SO becomes part of the oscillator regeneration process. The regeneration process generates high Q in the SO and thus a narrow resolution bandwidth is established. Figure 3A shows a direct display of a carrier with -40 db signal-to-noise ratio and Figure 3B shows the display of the SO output when the same carrier with -40 db signal-to-noise ratio is applied to the input of the SO. The resolution bandwidth of the spectrum analyzer is set to 100 KHz. From Figures 3A and 3B we find 28 db improvement in the signalto-noise ratio when the external signal is 17.3.2 processed by the SO. We can find the resolution bandwidth of the SO using eq. 2, referenced to the 100 KHz resolution bandwidth of the spectrum analyzer. We can write 28 db = 10 log 100 KHz B where B is the resolution bandwidth of the SO. Solution eq. 2 yields B = 0.16 KHz. The SO, with 1 MHz tracking range, has noise rejection properties similar to a bandpass filter with 0.16 KHz bandwidth. The dependence of the tracking range on the input signal level is shown in Figure 4. Higher input signal levels result in a wider tracking range and lower gain. Figure 3. Spectrum Analyzer Display A. Direct B. Through SO Figure 4. External Signal Level vs Gain (2) 325

The effective square thermal noise voltage of a circuit is given by -2 ef = 4KTBR (3) level s range. and there is a need for wider tracking COMBINER 14 db 280 MHz where K = Boltzman's constant T = Temperature in degree Kelvin B = Bandwidth or tracking range R = Total dissipation resistance (positive resistance) of the circuit. Due to high regeneration gain the resolution bandwidth of the SO is very low and the positive resistance is counterbalanced by the negative resistance of the oscillator to sustain oscillations. As B in eq. 3 is very low and the positive resistance R of the SO circuit is almost vanishingly small, the input signal sensitivity of the SO becomes very high. Theoretically e should be zero, but some positive resistance always exists in the input of the SO driver circuit. CARRIER RECOVERY NETWORKS SOs were used in various burst mode QPSK modems as carrier and clock recovery networks. A QPSK modulated signal can be represented by it cos(wt+2 ) (4) where ±-f are phase changes which cause modulation. In order to eliminate the modulation we multiply eq. 4 by 4 so that cos(4wt±27r) (5) becomes pure RF at 4 times the original SO frequency. The circuit shown in Figure 1 is a basic carrier recovery network. The oscillator is a modified Colpitts oscillator with two active elements: transistor T1 accepts the injected signal, amplifies it and injects current into transistor T2. Transistor T1 is an active emitter load for transistor T2. The current flow to both transistors is determined mainly by the bias resistor G. Transistor T2 has three feedback paths: (1) a path thru Cl to the base of T2 (the value of C1 is large and is considered a "short" at the frequency range of interest), (2) a path from the point between C2 and C3 to the emitter of T2, and (3) a series negative feedback to T2 provided by T1. The first two feedbacks are positive while the third is negative. The bias resistor G is adjusted so that both transistors operate in their linear-active region with equal collector-toemitter voltage drops. Lc is an RF choke (isolation) and L, C2, C3 form the tank circuit. The variable resistor RA controls the injection level and, to a lesser extent, the free-running frequency of the SO. The dependence of frequency on the input R indicates that a circuit or filter at that input of the SO is within the regeneration loop of the SO. The supply voltage is typically 5V, and the power dissipation is approximately 5-10mW. The carrier-recovery network requirements are more demanding than their clock recovery counterpart because they have lower input carrier-to-noise 280 MHz Figure 5. Carrier Recovery Network Using SO A complete carrier recovery network using SO is shown in Figure 5. In this case a 70 MHz IF is applied thru a noise source to 4X multiplier whose output is applied to a 280 MHz bandpass filter. The carrier-to-noise ratio at the output of the combiner is -3 db. The output of the filter is amplified and applied to the 70 MHz SO. In the process of multiplying there is a -40 dbm power loss and a -18 db degradation in the carrier-tonoise ratio.. The 280 MHz filter bandwidth is maintained at 10 MHz so as not to disturb the acquisition time. The 70 MHz SO is injected with the 280 MHz carrier and the output recovered at 70 MHz. In the theory of the Synchronous Oscillator operation we noted that harmonic excitation increases the tracking range and improves the skirt selectivity for the same carrier-to-noise injection level to the SO. Figures 6 and 7 illustrate the gain synchronization curves of the SO carrier recovery network with and without the 280 MHz filter, respectively. The acquisition time of the carrier recovery network when the injected frequency is offset by 100 KHz from the free-running frequency is shown in Figure 8. These results indicate acquisition occurs in less than 300 ns for the 100 KHz offset and less than 200 ns in the absence of frequency offset. Theoretical calculations based upon eq. 6 for harmonic excitation (N=4). T (1%) = 1 K 1-(AX/K)2 where K = Gml Vi 2C3 Vo indicate the acquisition time should be 160 nseconds in excellent agreement with observations since experimental results include the delay time through the filter, the multiplier and the coupling networks (ref. 2). The input to the SO contains all the harmonics produced by the multiplication and the filtering properties of the SO are sufficient to remove these harmonics very effectively without any external filtering as shown in Figure 6. The 280 MHz external filter introduces additional (6) 326 17.3.3

noise rejection. The steepness of the skirt selectivity in Figure 7 shows the effect of the regeneration on the external filter response. Ti 280 MHz f ilter is incorporated in the regeneration process. Figure 6. Carrier Recovery Gain-and Phase Synchronization Curve Without 280 MHz Filter The SO has another unique property which lacks in phase-lock loops. The phase-lock loop can have false-lock due to harmonics generated by the phase detector, whereas SO does not have false-lock. SO is synchronized only when the input waveform and the oscillator waveform are exactly in phase opposition to each other. Thus, there is no possibility for the input signal to capture the oscillator waveform in any other phase relation (ref. 2). The data from the modem demodulator are used to regenerate the clock. Whenever there are no data transitions, due to a sequence of ones and zeros, the classical method relies on the tails of the data which continue in a resonance mode in the tank circuit. As the tails gradually diminish, the comparator at the output of the clock recovery network quantizes the recovered clock at varying time locations, due to reference level of the comparator, which results in a clock pulse of varying width and unequal spacing. A SO can be designed to have memory. The lack of data transitions for a period of 20-25 bits remains unnoticed in the SO and the regenerated clock appears equally spaced during this period. As SO is oscillating continuously in the vicinity of the data rate (baud rate for QPSK) the data transitions act very fast on the SO to synchronize it exactly to the data rate. A schematic diagram of clock recovery network using an SO is shown in Figure 9. It consists of four distinct sections, namely, the pulse forming section, the amplitude and pulse width shaping section, the oscillator section, and the output comparator. +5V I The Carrier Recovery Gain-Phase Synchronization Curve With a 3-Section 280 MHz Filter Connected to the Input of the SO to tl t2 PULSE FORMING J-- SN74S86 03 ill 05 OSCILLATOR }L A2CX7~L 02 E S S-P OUT PULSE SOAPING R04~ 54 BUFFER Figure 9. Clock Recovery Using SO Figure 8. Carrier Recovery Acquisition SOs IN MODEMS Another advantage of the SO is its constant output, independent of the driving level. But the phase shift between the input and the output of the SO changes when there is frequency offset. For a narrow tracking range the pha'se change per unit frequency offset becomes more pronounced. Therefore, the tracking range in a carrier recovery is kept wider than the acquisition requirements warrant. The phase variation within the tracking range is 1800 and it is constant for all SOs as seen in Figure 2. There are some special cases when this phase shift is less than 1800. 17.3,4 327

SOs were used in 60 Mbit/s and 120 Mbit/s burst mode modem as clock and carrier recovery networks. The maximum deviation of the Eb/No ratio (i.e., carrier to noise ratio at the output of the 70 MHz bandpass filter with 36 MHz bandwidth for a 60 Mbit/s data rate) from the theoretical value is 0.5 db and only 0.2 db from the hardwired case. Similar results were obtained for the 120 Mbit/s modem. The deviation has increased to 0.7 db in the 60 Mbit/s modem and to 0.9 db in the 120 Mbit/s modem for ±50 KHz frequency offset. A particular test was carried out at Eb/No = 7 db to determine if false-lock occurred during 4 day operation. No false-lock was recorded to confirm the unique property of the SO synchronization. Also, carrier skip test was performed for 72 hours at Eb/No = 7 db. On the average 1 carrier skip occurred every 7 hours. Also, a test was performed to determine the effect of an interfering signal on the locked SO. A input signal 2 db higher was introduced to a SO synchronized at 6 KHz apart. No effect was observed and the SO remained locked to the original signal, except that the noise immunity of the device was slightly lower at the transition regions. The SO performance is illustrated in Figures 10 and 11 for 60 Mbit/s and 120 Mbit/s burst mode modems. The 0.2 db deviation of the BER curve from the hardwire case shows the superb filtering properties of the SO. The relatively low change in BER with frequency offset shows that the SO has wide tracking range even though the noise filtering properties are excellent. This suggests that in a SO the product of tracking range times Q (inverse of resolution bandwidth) are very high compared to other tracking networks. The resolution bandwidth can be very narrow, less than a KHz, throughout the tracking range. Thus, SO combines the properties of a very narrow resolution bandwidth, high tracking range and high noise rejection network. the X4 multiplier was replaced by X2 multiplier and a 140 MHz SO was inserted after the multiplier. A buffer stage has isolated the two SOs. The gain and phase synchronization curves are shown in Figure 12. The cascaded SO carrier recovery network displays a 1.6 MHz tracking range with an injected carrier-to-noise (before the 4X multiplier) of -3 db, while its single SO counterpart of Figure 5, under identical conditions, displays a 150 KHz tracking range. In addition, the gain of the cascaded network is over 50 db as compared with 25 db for the single SO network. The actual carrier-tonoise ratio at the input of the SO networks is -12 db due to the -9 db deterioration in the 2X multiplier. The 70 MHz SO has limited noise rejection to a 280 MHz input signal. When a 280 MHz input signal is applied to the 70 MHz SO, the mixing or multiplication process produces strong harmonics at 210 MHz and 350 MHz but not at 70 MHz. Whereas, when 280 MHz input signal is applied to a 140 MHz SO, the mixing process produces a strong 140 MHz signal. Thus a 140 MHz noisy input signal encounters a very narrow resolution bandwidth. Simularly, the second SO which is 70 MHz receives 140 MHz and the mixing process produces a strong 70 MHz input signal, which is filtered equally well by the second SO. In general, carrier recovery networks operate with carrier to noise ratios above 0 db at the system input, therefore, cascaded operation of SOs in modems is usually not necessary. o3 US0.Csob,t blde. \ CLQCK & CARRIER \trecoviery \\\ RECOVIERt I \t TICt/.,QU 'oiarw D \ CARER Figure 12. Gain-Phase Characteristics for a Cascaded Carrier Recovery Network SO1 = 280 14Hz SO2 = 70 M4Hz (a) (b) Zero Offset ±50 KHz Offset Figure 10. BER Perf ormance for 60 Mbit/s Modem 7 9 13 1 Figure 11. BER Perf ormance for 120 Mbit/s Modem In certain applications, we may desire additional performance enhancement in SO synchronization networks. For this purpose we have performed experiments with two cascaded SO's. In Figure 5 328 17.3.5 REFERENCES: 1. Vasil Uzunoglu, U.S. Patents #4,355,404, #4,274,067 and #4,356,456. 2. Vasil Uzunoglu and M. H. White, "The Synchronous Oscillator: A Synchronization and Tracking Network". Accepted for publication, IEEE Journal Solid State Circuits. 3. B. Van der Pol, "The Nonlinear Theory of Electric Oscillations", Proc. 1RE, 22, 1051 (1934). 4. K. Kurokawa, "Injection Locking of Microwave Solid-State Oscillators", Proc. IEEE 61, 1386 (1973). 5. P. Runge, "Phase-Locked Loops with Signal Injection for Increased Pull-In and Reduced Output Phase Jitter", IEEE Trans. on Communications, COM-24,636 (1976).