POFET Smar High-Side Power Swich Two Channels: 2 x 3mΩ Curren Sense Produc Summary Package Operaing olage (on) 5...34 Acive channels one wo parallel On-sae esisance ON 3mΩ 15mΩ Nominal load curren (NOM) 5.5A 8.5A Curren limiaion (SCr) 24A 24A P-DSO-2-9 General Descripion N channel verical power MOSFET wih charge pump, ground referenced CMOS compaible inpu, diagnosic feedback and proporional load curren sense monolihically inegraed in Smar SPMOS echnology. Fully proeced by embedded proecion funcions Applicaions µc compaible high-side power swich wih diagnosic feedback for 12 and 24 grounded loads All ypes of resisive, inducive and capacive loads Mos suiable for loads wih high inrush currens, so as lamps eplaces elecromechanical relays, fuses and discree circuis Basic Funcions CMOS compaible inpu Undervolage and overvolage shudown wih auo-resar and hyseresis Fas demagneizaion of inducive loads ogic ground independen from load ground Proecion Funcions Shor circui proecion Overload proecion Curren limiaion Thermal shudown Overvolage proecion (including load dump) wih exernal resisor everse baery proecion wih exernal resisor oss of ground and loss of proecion Elecrosaic discharge proecion (ESD) N1 1 S1 ogic Channel 1 1 Diagnosic Funcions Proporinal load curren sense Diagnosic feedback wih open drain oupu Open load deecion in OFF-sae wih exernal resisor Feedback of hermal shudown in ON-sae N2 2 S2 ogic Channel 2 POFET oad 1 2 oad 2 Daa Shee 1 1999-6-16
Funcional diagram overvolage proecion inernal volage supply logic gae conrol + charge pump curren limi clamp for inducive load BB 1 N1 emperaure sensor 1 ESD Open load deecion O1 OAD S1 1 Curren sense 1 Channel 1 N2 2 S2 2 Conrol and proecion circui of channel 2 POFET 2 Pin Definiions and Funcions Pin Symbol Funcion 1,1, 11,12, 15,16, 19,2 Posiive power supply volage. Design he wiring for he simulaneous max. shor circui currens from channel 1 o 2 and also for low hermal resisance 3 N1 npu 1,2, acivaes channel 1,2 in case of 7 N2 logic high signal 17,18 1 Oupu 1,2, proeced high-side power oupu 13,14 2 of channel 1,2. Boh pins of each oupu have o be conneced in parallel for operaion according hs spec (e.g. k ilis ). Design he wiring for he max. shor circui curren 4 1 Diagnosic feedback 1,2 of channel 1,2, 8 2 open drain, invers o inpu level 2 1 Ground 1 of chip 1 (channel 1) 6 2 Ground 2 of chip 2 (channel 2) 5 S1 9 S2 Sense curren oupu 1,2; proporional o he load curren, zero in he case of curren limiaion of he load curren Pin configuraion (op view) 1 2 1 2 19 N1 3 18 1 1 4 17 1 S1 5 16 2 6 15 N2 7 14 2 2 8 13 2 S2 9 12 1 11 Daa Shee 2 1999-6-16
Maximum aings a T j = 25 C unless oherwise specified Parameer Symbol alues Uni Supply volage (overvolage proecion see page 4) 43 Supply volage for full shor circui proecion 34 T j,sar = -4...+15 C oad curren (Shor-circui curren, see page 5) self-limied A oad dump proecion 1) oaddump = A + s, A = 13.5 oad dump 3) 6 2) = 2 Ω, d = 2 ms; N = low or high, each channel loaded wih = 7. Ω, Operaing emperaure range Sorage emperaure range T j T sg -4...+15-55...+15 C Power dissipaion (DC) 4) T a = 25 C: P o 3.8 W (all channels acive) T a = 85 C: 2. Maximal swichable inducance, single pulse = 12, T j,sar = 15 C 4), = 5.5 A, E AS = 37 mj, Ω one channel: = 8.5 A, E AS = 79 mj, Ω wo parallel channels: see diagrams on page 1 Elecrosaic discharge capabiliy (ESD) N: (Human Body Model), S: ou o all oher pins shored: acc. M-D883D, mehod 315.7 and ESD assn. sd. S5.1-1993 =1.5kΩ; C=1pF Z 18 16 ESD 1. 4. 8. npu volage (DC) N -1... +16 Curren hrough inpu pin (DC) Curren hrough saus pin (DC) Curren hrough curren sense pin (DC) see inernal circui diagram page 9 N S ±2. ±5. ±14 ma Thermal Characerisics Parameer and Condiions Symbol alues Uni min yp Max Thermal resisance juncion - soldering poin 4),5) each channel: hjs 12 K/W juncion - ambien 4) one channel acive: all channels acive: hja 4 33 mh k 1) Supply volages higher han (AZ) require an exernal curren limi for he and saus pins (a 15Ω resisor for he connecion is recommended. 2) = inernal resisance of he load dump es pulse generaor 3) oad dump is seup wihou he DUT conneced o he generaor per SO 7637-1 and DN 4839 4) Device on 5mm*5mm*1.5mm epoxy PCB F4 wih 6cm 2 (one layer, 7µm hick) copper area for connecion. PCB is verical wihou blown air. See page 15 5) Soldering poin: upper side of solder edge of device pin 15. See page 15 Daa Shee 3 1999-6-16
Elecrical Characerisics Parameer and Condiions, each of he wo channels Symbol alues Uni a Tj = -4...+15 C, = 12 unless oherwise specified min yp max oad Swiching Capabiliies and Characerisics On-sae resisance ( o ); = 5 A each channel, T j = 25 C: T j = 15 C: ON 27 54 3 6 mω wo parallel channels, T j = 25 C: Oupu volage drop limiaion a small load currens, see page 14 =.5 A Nominal load curren Tj =-4...+15 C: one channel acive: wo parallel channels acive: Device on PCB 6), Ta = 85 C, Tj 15 C Oupu curren while disconneced or pulled up; = 3, N =, see diagram page 9; (no esed specified by design) Turn-on ime 7) N o 9% : Turn-off ime N o 1% : = 12 Ω Slew rae on 7) 1 o 3%, = 12 Ω: Slew rae off 7) 7 o 4%, = 12 Ω: 14 15 ON(N) 5 m (NOM) 4.9 7.8 5.5 8.5 A (high) 8 ma on 25 off 25 7 8 15 2 µs d/d on.1 1 /µs -d/d off.1 1 /µs Operaing Parameers Operaing volage 8) (on) 5. 34 Undervolage shudown (under) 3.2 5. Undervolage resar T j =-4...+25 C: T j =+15 C: (u rs) 4.5 5.5 6. Undervolage resar of charge pump see diagram page 13 T j =-4...+25 C: T j =15 C: Undervolage hyseresis (under) = (u rs) - (under) (ucp) 4.7 6.5 7. (under).5 Overvolage shudown (over) 34 43 Overvolage resar (o rs) 33 Overvolage hyseresis (over) 1 6) Device on 5mm*5mm*1.5mm epoxy PCB F4 wih 6cm 2 (one layer, 7µm hick) copper area for connecion. PCB is verical wihou blown air. See page 15 7) See iming diagram on page 11. 8) A supply volage increase up o = 4.7 yp wihou charge pump, - 2 Daa Shee 4 1999-6-16
Parameer and Condiions, each of he wo channels Symbol alues Uni a Tj = -4...+15 C, = 12 unless oherwise specified min yp max Overvolage proecion 9) T j =-4: =4 ma T j =+25...+15 C: Sandby curren 1) T j =-4 C...25 C: N = ; see diagram page 1 T j =15 C: eakage oupu curren (included in (off) ) N = Operaing curren 11), N = 5, = 1 + 2, one channel on: wo channels on: (AZ) 41 43 (off) 47 8 24 52 3 5 µa (off) 2 µa 1.2 2.4 3 6 ma Proecion Funcions Curren limi, (see iming diagrams, page 12) Tj =-4 C: Tj =25 C: Tj =+15 C: epeiive shor circui curren limi, T j = T j each channel wo parallel channels (see iming diagrams, page 12) niial shor circui shudown ime T j,sar =25 C: (see iming diagrams on page 12) Oupu clamp (inducive load swich off) 12) a ON(C) = -, = 4 ma Tj =-4 C: Tj =25 C...15 C: (lim) 48 4 31 (SCr) 56 5 37 24 24 65 58 45 off(sc) 2. ms ON(C) 41 43 Thermal overload rip emperaure T j 15 C Thermal hyseresis T j 1 K everse Baery everse baery volage 13) - 32 Drain-source diode volage (ou > ) - ON 6 m = - 4. A, Tj = +15 C 47 52 A A 9) Supply volages higher han (AZ) require an exernal curren limi for he and saus pins (a 15 Ω resisor in he connecion is recommended). See also ON(C) in able of proecion funcions and circui diagram page 9. 1) Measured wih load; for he whole device; all channels off 11) Add, if > 12) f channels are conneced in parallel, oupu clamp is usually accomplished by he channel wih he lowes ON(C) 13) equires a 15 Ω resisor in connecion. The reverse load curren hrough he inrinsic drain-source diode has o be limied by he conneced load. Power dissipaion is higher compared o normal operaing condiions due o he volage drop across he drain-source diode. The emperaure proecion is no acive during reverse curren operaion! npu and Saus currens have o be limied (see max. raings page 3 and circui page 9). Daa Shee 5 1999-6-16
Parameer and Condiions, each of he wo channels Symbol alues Uni a Tj = -4...+15 C, = 12 unless oherwise specified min yp max Diagnosic Characerisics Curren sense raio 14), saic on-condiion, S =...5, (on) = 6.5 15)...27, ks = / S T j = -4 C, = 5 A: k S 435 48 58 T j = -4 C, =.5 A: 31 48 78 T j = 25...+15 C, = 5 A: T j = 25...+15 C, =.5 A: 435 38 48 48 535 63 Curren sense oupu volage limiaion Tj = -4...+15 C S =, = 5 A: S(lim) 5.4 6.1 6.9 Curren sense leakage/offse curren Tj = -4...+15 C N=, S =, = : S() 1 µa N=5, S =, = : S(H) 15 N=5, S =, = (shor circui) S(SH) 1 (S(SH) no esed, specified by design) Curren sense seling ime o S saic ±1% afer posiive inpu slope, = 5 A (no esed, specified by design) Curren sense seling ime o 1% of S saic afer negaive inpu slope, = 5 A (no esed, specified by design) Curren sense rise ime (6% o 9%) afer change of load curren = 2.5 5 A (no esed, specified by design) son(s) 3 µs soff(s) 3 1 µs slc(s) 1 µs Open load deecion volage 16) (off-condiion) (O) 2 3 4 nernal oupu pull down (pin 17,18 o 2 resp. 13,14 o 6), =5 O 5 15 4 kω 14) This range for he curren sense raio refers o all devices. The accuracy of he k S can be raised a leas by a facor of wo by maching he value of k S for every single device. n he case of curren limiaion he sense curren S is zero and he diagnosic feedback poenial is High. See figure 2c, page 12. 15) alid if (u rs) was exceeded before. 16) Exernal pull up resisor required for open load deecion in off sae. Daa Shee 6 1999-6-16
Parameer and Condiions, each of he wo channels Symbol alues Uni a Tj = -4...+15 C, = 12 unless oherwise specified min yp max npu and Saus Feedback 17) npu resisance 3. 4.5 7. kω (see circui page 9) npu urn-on hreshold volage N(T+) 3.5 npu urn-off hreshold volage N(T-) 1.5 npu hreshold hyseresis N(T).5 Off sae inpu curren N =.4 : N(off) 1 5 µa On sae inpu curren N = 5 : N(on) 2 5 9 µa Delay ime for saus wih open load d( O3) 4 µs afer npu neg. slope (see diagram page 13) Saus delay afer posiive inpu slope (no esed, specified by design) don() 13 µs Saus delay afer negaive inpu slope (no esed, specified by design) doff() 1 µs Saus oupu (open drain) Zener limi volage T j =-4...+15 C, = +1.6 ma: (high) 5.4 6.1 6.9 low volage T j =-4...+25 C, = +1.6 ma: T j = +15 C, = +1.6 ma: (low).4.7 Saus leakage curren, = 5, Tj=25... +15 C: (high) 2 µa 17) f ground resisors are used, add he volage drop across hese resisors. Daa Shee 7 1999-6-16
Truh Table npu 1 Oupu 1 Saus 1 npu 2 Oupu 2 Saus 2 Curren Sense 1 Curren Sense 2 Normal operaion Currenlimiaion Shor circui o Overemperaure Shor circui o Open load Undervolage Overvolage level level level S H H H nominal H H H H H H 18 ) H H H H H 19) H H <nominal 2) 21 ) H ( 22) ) H H H H H H H Negaive oupu volage clamp = "ow" evel X = don care Z = high impedance, poenial depends on exernal circui H = "High" evel Saus signal afer he ime delay shown in he diagrams (see fig 5. page 13) Parallel swiching of channel 1 and 2 is possible by connecing he inpus and oupus in parallel. The saus oupus 1 and 2 have o be configured as a Wired O funcion wih a single pull-up resisor. The curren sense oupus S1 and S2 have o be conneced wih a single pull-down resisor. Terms N1 1 3 4 S1 N1 1 5 S1 eadframe N1 1 1 POFET Chip 1 S1 1 2 1 1 17,18 ON1 1 1 N2 2 7 8 S2 N2 2 9 S2 eadframe N2 2 2 POFET Chip 2 S2 2 6 2 2 13,14 ON2 2 2 eadframe ( ) is conneced o pin 1,1,11,12,15,16,19,2 Exernal opional; wo resisors 1, 2 = 15 Ω or a single resisor = 75 Ω for reverse baery proecion up o he max. operaing volage. 18) The volage drop over he power ransisor is - > 3 yp. Under his condiion he sense curren S is zero 19) An exernal shor of oupu o, in he off sae, causes an inernal curren from oupu o ground. f is used, an offse volage a he and pins will occur and he low signal may be errorious. 2) ow ohmic shor o may reduce he oupu curren and herefore also he sense curren S. 21) Power Transisor off, high impedance 22) wih exernal resisor beween BB and Daa Shee 8 1999-6-16
npu circui (ESD proecion), N1 or N2 N ESD-ZD The use of ESD zener diodes as volage clamp a DC condiions is no recommended. Saus oupu, 1 or 2 (ON) ESD- ZD +5 Overvolage and reverse ba. proecion + 5 S N S Z1 ogic Signal Z2 POFET + oad oad Z1 = 6.1 yp., Z2 = 47 yp., = 15 Ω, =15kΩ, =4.5kΩ yp., S =1kΩ, =15kΩ, n case of reverse baery he curren has o be limied by he load. Temperaure proecion is no acive Open-load deecion 1 or 2 OFF-sae diagnosic condiion: > 3 yp.; N low ESD-Zener diode: 6.1 yp., max 5. ma; (ON) < 375 Ω a 1.6 ma. The use of ESD zener diodes as volage clamp a DC condiions is no recommended. EXT Curren sense oupu OFF Ou S S ogic O S ESD-ZD ESD-Zener diode: 6.1 yp., max 14 ma; S = 1 kω nominal S nducive and overvolage oupu clamp, 1 or 2 disconnec N Signal + POFET Z ON N Any kind of load. n case of N = high is N - N(T+). Due o >, no = low signal available. ON clamped o ON(C) = 47 yp. Power Daa Shee 9 1999-6-16
disconnec wih pull up N N POFET Any kind of load. f > N - N(T+) device says off Due o >, no = low signal available. disconnec wih energized inducive load nducive load swich-off energy dissipaion = E N POFET Energy sored in load inducance: E AS Z E = 1 /2 2 While demagneizing load inducance, he energy dissipaed in POFET is E oad E E high N POFET E AS = E + E - E = ON(C) i () d, wih an approximae soluion for > Ω: E AS = ( 2 + (C) ) ln (1+ (C) ) For inducive load currens up o he limis defined by Z (max. raings and diagram on page 1) each swich is proeced agains loss of. Consider a your PCB layou ha in he case of disconnecion wih energized inducive load all he load curren flows hrough he connecion. Maximum allowable load inducance for a single swich off (one channel) 4) = f ( ); T j,sar = 15 C, = 12, = Ω Z [mh] 1 1 1 1 2 3 4 5 6 7 8 9 1 11 12 [A] Daa Shee 1 1999-6-16
Timing diagrams Boh channels are symmeric and consequenly he diagrams are valid for channel 1 and channel 2 Figure 1a: Swiching a resisive load, change of load curren in on-condiion: N Figure 2a: Swiching a resisive load, urn-on/off ime and slew rae definiion: N don() doff() on off 9% on d/doff slc(s) slc(s) 1% d/don off oad 1 oad 2 S son(s) soff(s) The sense signal is no valid during seling ime afer urn or change of load curren. Figure 1b: urn on: N1 Figure 2b: Swiching a lamp: N N2 1 2 1 open drain 2 open drain proper urn on under all condiions The iniial peak curren should be limied by he lamp and no by he curren limi of he device. Daa Shee 11 1999-6-16
Figure 2c: Swiching a lamp wih curren limi: Figure 3a: Turn on ino shor circui: shu down by overemperaure, resar by cooling N N1 oher channel: normal operaion 1 (lim) (SCr) S 1 = off(sc) S 1 Figure 2d: Swiching an inducive load Heaing up of he chip may require several milliseconds, depending on exernal condiions N Figure 3b: Turn on ino shor circui: shu down by overemperaure, resar by cooling (wo parallel swiched channels 1 and 2) N1/2 + 1 2 2x (lim) (SCr) (O) off(sc) *) if he ime consan of load is oo large, open-load-saus may occur S 1= S 2 = 1/2 1 and 2 have o be configured as a Wired O funcion 1/2 wih a single pull-up resisor. Daa Shee 12 1999-6-16
Figure 4a: Overemperaure: ese if T j <T j N Figure 6a: Undervolage: N no defined (under) (u cp) (u rs) T J S Figure 6b: Undervolage resar of charge pump Figure 5a: Open load: deecion (wih EXT), urn on/off o open load on ON(C) N d( O3) on-sae (over) offsae offsae (u rs) (o rs) open load (under) (u cp) S charge pump sars a (ucp) =4.7 yp. Daa Shee 13 1999-6-16
Figure 7a: Overvolage: Figure 8b: Curren sense raio: N 15 k S ON(C) (over) (o rs) 1 5 S [A] 1 2 3 4 5 6 7 8 9 1 11 12 13 Figure 8a: Curren sense versus load curren 23 :: Figure 9a: Oupu volage drop versus load curren: 1.3 [ma] 1.2 S 1.1 1.9.8.7.6.5.4.3.2.1 1 2 3 4 5 [A] 6 [].2.1. ON ON(N) ON 1 2 3 4 5 6 7 [A] 8 23 This range for he curren sense raio refers o all devices. The accuracy of he k S can be raised a leas by a facor of wo by maching he value of k S for every single device. Daa Shee 14 1999-6-16
Package and Ordering Code Sandard: P-DSO-2-9 Sales Code BTS 74 2 Ordering Code Q676-S712-A2 All dimensions in millimeres!" #$%!&% ' %((( ))* +, The informaion herein is given o describe cerain componens and shall no be considered as warraned characerisics. Terms of delivery and righs o echnical change reserved. We hereby disclaim any and all warranies, including bu no limied o warranies of non-infringemen, regarding circuis, descripions and chars saed herein. nfineon Technologiesis an approved CECC manufacurer. For furher informaion on echnology, delivery erms and condiions and prices please conac your neares nfineon Technologies Office in Germany or our nfineon Technologies epresenaives worldwide (see address lis). Definiion of soldering poin wih emperaure T s : upper side of solder edge of device pin 15. - Due o echnical requiremens componens may conain dangerous subsances. For informaion on he ypes in quesion please conac your neares nfineon Technologies Office. nfineon Technologies Componens may only be used in life-suppor devices or sysems wih he express wrien approval of nfineon Technologies, if a failure of such componens can reasonably be expeced o cause he failure of ha life-suppor device or sysem, or o affec he safey or effeciveness of ha device or sysem. ife suppor devices or sysems are inended o be implaned in he human body, or o suppor and/or mainain and susain and/or proec human life. f hey fail, i is reasonable o assume ha he healh of he user or oher persons may be endangered. Prined circui board (F4, 1.5mm hick, one layer 7µm, 6cm 2 acive heasink area) as a reference for max. power dissipaion P o, nominal load curren (NOM) and hermal resisance hja Daa Shee 15 1999-6-16