Features. = +25 C, Vdd1 = Vdd2 = +3.5V, Idd = 80 ma [2]

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Typical Applications This is ideal for: Features Low Noise Figure: 1.8 db Point-to-Point Radios Point-to-Multi-Point Radios Military & Space Test Instrumentation Functional Diagram High Gain: 19 db High P1dB Output Power: 16 dbm Single Supply: +3. V @ 8 ma Output ip3: +28 dbm Ohm matched Input/Output 16 Lead 3x3mm smt Package: 9mm² General Description The is a GaAs mmic Low Noise Amplifier housed in a leadless 3x3 mm plastic surface mount package. The amplifier operates between and 1 GHz, providing 19 db of small signal gain, 1.8 db noise figure, and output IP3 of +28 dbm, while requiring only 8 ma from a +3.V supply. The P1dB output power of +16 dbm enables the LNA to function as a LO driver for balanced, I/Q or image reject mixers. The also features I/Os that are DC blocked and internally matched to Ohms, making it ideal for high capacity microwave radios and C-Band VSAT applications. Electrical Specifications, T A = + C, Vdd1 = Vdd2 = +3.V, Idd = 8 ma [2] Parameter Min. Typ. Max. Units Frequency Range - 1 GHz Gain [1] 1 19. db Gain Variation over Temperature.1 db / C Noise Figure [1] 1.8 2.2 db Input Return Loss 12 db Output Return Loss db Output Power for 1 db Compression [1] 16 dbm Saturated Output Power (Psat) [1] 1. dbm Output Third Order Intercept (IP3) 28 dbm Supply Current (Idd) (Vdd = 3.V, set Vgg2 = V, Vgg1 = V Typ.) 8 11 ma [1] Board loss removed from gain, power and noise figure measurement. [2] Vgg1 = Vgg2 = open for normal, self-biased operation. - 1 Phone: 98--3343 Fax: 98--333 Phone: Order 81-329-4 On-line at www.hittite.com Application Support: Phone: 98--3343 Application or apps@hittite.com

Broadband Gain & Return Loss [1] RESPONSE (db) Input Return Loss vs. Temperature RETURN LOSS (db) - - -1-2 -3 +C +8C -4C S21 S11 S22-3 9 11 13 Gain vs. Temperature [1] GAIN (db) Output Return Loss vs. Temperature RETURN LOSS (db) 23 21 19 1-1 -2-3 +C +8C -4C +C +8C -4C 4 6 8 9 1 11-4 -4-4 6 8 9 1 11-4 6 8 9 1 11 Noise Figure vs. Temperature [1] 6 Output IP3 vs. Temperature 3 3 NOISE FIGURE (db) 4 3 2 +C +8C -4C IP3 (dbm) 2 +C +8C -4C 1 4 6 8 9 1 11 1 4 6 8 9 1 11 [1] Board loss removed from gain, power and noise figure measurement. Phone: 98--3343 Fax: 98--333 Phone: Order 81-329-4 On-line at www.hittite.com Application Support: Phone: 98--3343 Application or apps@hittite.com - 2

P1dB vs. Temperature [1] P1dB (dbm) Reverse Isolation vs. Temperature ISOLATION (db) 2 1-1 -2-3 -4 - +C +8C -4C 4 6 8 9 1 11 +C +8C -4C Psat vs. Temperature [1] Psat (dbm) Power Compression @ GHz [1] Pout (dbm), GAIN (db), PAE (%) 2 1 4 6 8 9 1 11 24 2 16 12 8 4 Pout Gain PAE +C +8C -4C -6 4 6 8 9 1 11-4 -21-18 - -12-9 -6-3 3 INPUT POWER (dbm) Gain, Noise Figure & Power vs. Supply Voltage @ GHz [1] Gain, Output IP3 & Idd vs. Gate Voltage @ GHz [2][3] 22 3 12 GAIN (db), P1dB (dbm) 2 18 16 14 12 1 6 4 3 2 1 NOISE FIGURE (db) GAIN (db), IP3 (dbm) 2 1 Gain IP3 Idd 1 8 6 4 2 Idd (ma) 8 3 3. 4 Vdd (V) -. -.6 -. -.4 -.3 -.2 -.1 Vgg1, Vgg2 Gate Volltage (Vdc) [1] Board loss removed from gain, power and noise figure measurement. [2] Board loss removed from gain measurement [3] Data taken at Vdd1 = Vdd2 = 3V - 3 Phone: 98--3343 Fax: 98--333 Phone: Order 81-329-4 On-line at www.hittite.com Application Support: Phone: 98--3343 Application or apps@hittite.com

Current vs. Input Power @ GHz Idd (ma) 88 86 84 82 8 8-3 -2-24 -21-18 - -12-9 -6-3 3 INPUT POWER (dbm) Outline Drawing Absolute Maximum Ratings Drain Bias Voltage RF Input Power Gate Bias Voltage, Vgg1 Gate Bias Voltage, Vgg2 +4.V +1 dbm Channel Temperature C Continuous Pdiss (T = 8 C) (derate mw/ C above 8 C) Thermal Resistance (Channel to ground paddle) -.8V to +.2V -.8V to +.2V.4 W 143.8 C/W Storage Temperature -6 to + C Operating Temperature -4 to +8 C ELECTROSTATIC sensitive DEVICE OBserVE HANDLING precautions Package Information NOTES: 1. PACKAGE BODY MATeriAL: low STress INJECTION molded PLASTIC silica AND silicon impregnated. 2. lead AND GROUND PADDLE MATeriAL: Copper AlloY. 3. lead AND GROUND PADDLE plating: 1% MATTE TIN 4. DimeNsioNS ARE IN INCHES [millimeters].. lead spacing TolerANCE is NON-CUMULATIVE. 6. PAD BURR length SHALL BE.mm MAX. PAD BURR HEIGHT SHALL BE.mm MAX.. PACKAGE WARP SHALL NOT EXCEED.mm 8. ALL GROUND leads AND GROUND PADDLE MUST BE soldered TO PCB rf GROUND. 9. refer TO HITTITE AppliCATION NOTE for SUGGESTED PCB LAND PATTERN. Part Number Package Body Material Lead Finish Package Marking [1] [2] 92 RoHS-compliant Low Stress Injection Molded Plastic 1% matte Sn XXXX [1] 4-Digit lot number XXXX [2] Max peak reflow temperature of 26 C Phone: 98--3343 Fax: 98--333 Phone: Order 81-329-4 On-line at www.hittite.com Application Support: Phone: 98--3343 Application or apps@hittite.com - 4

Pin Descriptions Pin Number Function Description Interface Schematic 1, 2,, 8, 11-13, 16 N/C 3 rfin 4, 9 GND 6, Vgg1, Vgg2 1 rfout 14, Vdd2, Vdd1 The pins are not connected internally; however, all data shown herein was measured with these pins connected to rf/ DC ground externally. This pin is AC coupled and matched to Ohms Package bottom has exposed metal ground paddle that must be connected to rf/dc ground. Optional gate control for amplifier. If left open, the amplifier will run self-biased at standard current. Negative voltage applied will reduce drain current. External capacitors required, see application circuits herein. This pin is AC coupled and matched to Ohms Power supply voltage for the amplifier. See assembly for required external components. - Phone: 98--3343 Fax: 98--333 Phone: Order 81-329-4 On-line at www.hittite.com Application Support: Phone: 98--3343 Application or apps@hittite.com

Evaluation PCB Item Description J1, J2 SMA Connector J3, J4, J6 - J8 DC Pins C1, C4, C, C1 1 pf Capacitor, 42 Pkg. C2, C, C8, C11 1 KpF Capacitor, 42 Pkg. C3, C6, C9, C12 4. µf Capacitor, Tantalum U1 Amplifier PCB [2] 12839 Evaluation PCB [1] Reference this number when ordering complete evaluation PCB [2] Circuit Board Material: Rogers 43 or Arlon FR List of Material for Evaluation PCB 1298 [1] The circuit board used in this application should use RF circuit design techniques. Signal lines should have Ohm impedance while the package ground leads and exposed paddle should be connected directly to the ground plane similar to that shown. A sufficient number of via holes should be used to connect the top and bottom ground planes. The evaluation board should be mounted to an appropriate heat sink. The evaluation circuit board shown is available from Hittite upon request. Phone: 98--3343 Fax: 98--333 Phone: Order 81-329-4 On-line at www.hittite.com Application Support: Phone: 98--3343 Application or apps@hittite.com - 6

v.21 Application Circuit - Standard (Self-Biased) Operation Application Circuit - Gate Control, Reduced Current Operation - Phone: 98--3343 Fax: 98--333 Phone: Order 81-329-4 On-line at www.hittite.com Application Support: Phone: 98--3343 Application or apps@hittite.com

Notes: v.21 Phone: 98--3343 Fax: 98--333 Phone: Order 81-329-4 On-line at www.hittite.com Application Support: Phone: 98--3343 Application or apps@hittite.com - 8