SMPS µpfc TM IRS2505LPBF Boos PFC and SMPS Conrol IC Feaures Criical-conducion mode PFC conrol (CrCM) High PF and ulra-low THD Wide line and load range Regulaed DC oupu volage No secondary winding required Cycle-by-cycle over-curren proecion Oupu over-volage proecion Ulra-low sar-up curren 20.8V inernal zener clamp on VCC Excellen ESD and lach immuniy RoHS complian 5-pin SOT-23 package Applicaions Descripion The IRS2505L is a conrol IC for PFC boos converers operaing in criical-conducion mode. The IC incorporaes a volage feedback loop for oupu volage regulaion combined wih smar zero crossing deecion o conrol he gae drive oupu wihou he need for a secondary inducor winding. DC oupu over-volage proecion and cycle-by-cycle over-curren proecion are also included. Muli-funcional inpus enable he IRS2505L o perform all funcions wih only 5 pins. Package Opions Off-line power supply Elecronic ballas LED power supply 5 Lead SOT23 Applicaion Diagram Rec (+) DC Bus (+) VCC (+) CMP 1 COM 2 VCC 3 IRS2505L VBUS 5 PFC 4 VCC (-) Rec (-) DC Bus (-) Ordering Informaion Sandard Pack Base Par Number Package Type Orderable Par Number Form Quaniy IRS2505LPBF 5L-SOT-23 Tape and Reel 3000 IRS2505LTRPBF 1 2016-02-17
Qualificaion Informaion Qualificaion Level Moisure Sensiiviy Level Machine Model ESD Human Body Model IC Lach-Up Tes RoHS Complian Indusrial (per JEDEC JESD 47E) Commens: This family of ICs has passed JEDEC s Indusrial qualificaion. IR s Consumer qualificaion level is graned by exension of he higher Indusrial level. MSL1 SOT-23 (per IPC/JEDEC J-STD-020C) Class B (per JEDEC sandard EIA/JESD22-A115-A) Class 2 (per EIA/JEDEC sandard JESD22-A114-B) Class I, Level A (per JESD78A) Yes Qualificaion sandards can be found a he Infineon web sie hp://www.infineon.com Higher qualificaion raings may be available should he user have such requiremens. Please conac your Infineon sales represenaive for furher informaion. Higher MSL raings may be available for he specific package ypes lised here. Please conac your Infineon sales represenaive for furher informaion. 2 2016-02-17
Funcional Block Diagram VCC 3 COM 2 VCLAMP OCP UVLO VBUS CMP 5 1 VBUSREG OTA VBUSOV OVP VCC 4 PFC VCMPOH Wachdog Timer S R Q Q VCOMPON CT S R1 R2 Q Q ZX Deec 3 2016-02-17
Timing Diagram PFC VCC VPFCOFF VPFCZX- ILPFC VDRAIN DC BUS OFF-TIME ON-TIME 4 2016-02-17
Absolue Maximum Raings Absolue maximum raings indicae susained limis beyond which damage o he device may occur. All volage parameers are absolue volages referenced o COM, all currens are defined posiive ino any pin. The hermal resisance and power dissipaion raings are measured under board mouned and sill air condiions. Symbol Definiion Min. Max. Unis VPFC PFC pin volage -0.3 VCC + 0.3 V VBUS VBUS pin volage -0.3 VCC + 0.3 ICC VCC pin supply curren --- 25 ICMP CMP pin curren --- 1 ma PD Package power dissipaion @ Ta +25 ºC SOT-23 5L --- 0.5 W Rθja Thermal resisance, juncion o ambien SOT-23 5L --- 191 ºC/W Tj Juncion emperaure -55 150 Ts Sorage emperaure -55 150 TL Lead emperaure (soldering, 10 seconds) --- 300 This IC conains a volage clamp srucure beween he chip VCC and COM which has a nominal breakdown volage of 20.8V. This supply pin should no be driven by a DC, low impedance power source greaer han he VCLAMP specified in he Elecrical Characerisics secion. ºC This IC conains a volage clamp srucure beween he CMP and COM which has a nominal breakdown volage of 10.2V. This pin should no be driven by a DC, low impedance power source greaer han he VZCMP specified in he Elecrical Characerisics secion. 5 2016-02-17
Recommended Operaing Condiions For proper operaion he device should be used wihin he recommended condiions. Symbol Definiion Min. Max. Unis VCC Supply volage VCCUV+ + 0.5V VCLAMP V ICC Supply curren 0 10 ma VCMP CMP pin volage 0 VZCMP V Tj Juncion emperaure -40 125 ºC Recommended Componen Values Symbol Componen Value Unis CCMP Compensaion capacior value 0.68 µf CVCC VCC filer capacior 0.1 µf CVBUS VBUS pin filer capacior 1.0 nf 6 2016-02-17
Elecrical Characerisics VCC=14V, CVCC=0.1uF, CCMP=0.68uF, CPFC=1nF, CVBUS=10nF, and Ta=25 C unless oherwise specified. Symbol Definiion Min Typ Max Unis Tes Condiions Supply Characerisics VCLAMP VCC clamp volage 19.8 20.8 21.8 VCCUV+ Rising VCC under-volage hreshold 10.0 11.1 12.0 VCCUV- Falling VCC under-volage hreshold 7.0 7.9 9.0 VCCUVHYS VCC UVLO hyseresis 2.9 3.2 3.5 IQCCUV Micro-power sar-up VCC supply curren V --- 46.0 60.0 µa ICC = 19 ma VCC = VCCUV+ - 500mV rising IQCC No swiching --- 1.2 1.6 ma VCOMP=0V,GBD ICC50kHz VCC curren @ 50kHz --- 1.6 2.1 ma PFC Characerisics ONMIN Minimum PFC On-ime --- 0.9 --- ONMAX Maximum PFC On-ime 51 68 86 VBUSREG VBUS Pin Regulaion Volage 4.02 4.1 4.18 VBUSOV+ VBUS Pin OVP Threshold 4.30 4.50 4.70 VBUS Pin OVP Faul Rese V VBUSOV- 4.13 4.26 4.48 Threshold VBUSOC+ VBUS Pin Over-Curren Threshold 0.45 0.53 0.62 VBUS = 3V OC Over-Curren Blanking Time --- 300 --- ns PFC Pin Zero-Crossing Arming VPFCZX+ 0.39 0.40 0.51 VPFC Rising, GBD Threshold V PFC Pin Zero-Crossing Deecion VPFCZX- 0.39 0.40 0.51 VPFC Falling, GBD Threshold OFFDLY PFC Pin Off-Time Delay --- 0.5 --- s ZXBLNK PFC Pin Zero-Crossing Blank Time --- 0.5 --- s WD Wach Dog Timer Pulse Inerval 100 140 180 ICMP+ CMP Pin OTA IO+ 25 33 40 VBUS=3.5V,VCMP=0V A ICMP- CMP Pin OTA IO- -40-33 -25 VBUS=4.5V,VCMP=5V VCMPOH OTA Oupu Volage Swing (high sae) 9.9 10.2 11.5 VBUS=3.5V VCMPOL OTA Oupu Volage Swing (low sae) --- 0 --- VBUS=4.5V VCMPON Minimum COMP Volage for Swiching 1.21 1.50 1.83 V VCMPFLT OTA Oupu Volage in Faul Mode --- 0 --- VZCMP CMP Pin Clamp Volage 9.9 10.2 11.5 VBUS=3.5V GBD : Guaraneed by design 7 2016-02-17
Elecrical Characerisics VCC=14V, CVCC=0.1uF, CCMP=0.68uF, CPFC=1nF, CVBUS=10nF, and Ta=25 C unless oherwise specified. Gae Driver Oupu Characerisics (PFC) VPFCON Gae High Volage --- 13.0 --- VPFCOFFI VPFCOFF Gae Low Volage during iniial swich off period Gae Low Volage (afer iniial swich off) --- --- 0.1 0.50 0.59 0.63 PD Gae iniial swich off pull down ime --- 500 --- r Oupu rise ime --- 135 220 ns Rising, 10% o 70% f Oupu fall ime --- 20 35 Falling, 80% o 20% IO+ Oupu source curren --- 50 --- IO- Oupu sink curren --- 450 --- V ma 8 2016-02-17
Pin Assignmens and Definiions CMP 1 COM 2 VCC 3 IRS2505 VBUS 5 PFC 4 Pin Name Descripion 1 CMP PFC error amplifier compensaion 2 COM IC power and signal ground 3 VCC Logic and gae drive supply volage 4 PFC PFC gae driver oupu and zero-crossing deecion 5 VBUS DC bus sensing inpu, OVP and OCP 9 2016-02-17
Funcional Descripion The following opics are described in more deail below: 1) PFC Conrol Circui 2) Muli-Funcion PFC Pin 3) On-Time Modulaion 4) Over-Volage Proecion (OVP) 5) Over-Curren Proecion (OCP) The IRS2505L is primarily inended for bu no limied o pre-regulaor PFC Boos converer fron end sages in general power supplies and lighing applicaions such as LED power supplies, fluorescen and HID ballass. The IRS2505L may also be used in oher converer opologies such as Buck, Buck-Boos and Flyback, where is small size and funcionaliy can offer simpliciy and cos advanage. I can also be used in converers where PFC is no required. 1. PFC Conrol Circui The IRS2505 is a high frequency SMPS PWM conroller designed for Boos PFC pre-regulaors operaing in criical-conducion mode (CrCM), also known as ransiion (TM) or boundary mode (BM). The PFC Boos converer provides a regulaed high volage DC oupu over a range of AC line inpu volage and load, while a he same ime shaping he inpu curren so ha i follows he sinusoidal profile of he volage resuling in high power facor and low oal harmonic disorion (THD). Figure 1 shows he main elemens of he PFC Boos converer; he inpu capacior (CIN) is for high frequency bypass and does no provide smoohing a low frequency under seady sae operaion. When a load is conneced a he oupu he recified inpu volage across CIN is full wave recified. During he on-ime of he PFC MOSFET (MPFC), he IRS2505 gae drive oupu (PFC) is high so he inducor (LPFC) curren ramps up linearly o a peak curren value. During he off-ime he gae drive oupu is low and he inducor curren linearly discharges back down o zero a which poin MPFC is urned on again. The conrol loop response has o be slow compared o he line frequency so ha he on ime remains effecively consan over a single line half cycle; excep for some gradual increase as he volage approaches he zero crossings, which improves THD. The off ime varies during he AC line half cycle being longes a he peak. (+) LPFC DPFC DC BUS (+) ILPFC Recified AC Line Inpu CIN MPFC CBUS (-) (-) ON-TIME OFF-TIME Figure 1: Boos-ype converer and inducor curren during criical-conducion mode. The resul is a riangular shaped inducor curren ha varies in frequency depending on he level of he insananeous recified AC line volage shown in figure 2. The maximum swiching frequency occurs a he zerocrossings of he recified AC line volage and he minimum a he peak of he recified AC line volage. The average inducor curren is equal o half of he peak, which is equal o he insananeous line inpu curren afer he high frequency elemens have been filered ou. 10 2016-02-17
V, I AC Line Volage AC Line Curren Inducor Curren Cross-over disorion ime Figure 2: PFC inducor curren during he recified AC line volage cycle. The IRS2505 inernal conrol circui blocks shown in figure 3 include; he feedback error amplifier conrolling on-ime via iming capacior (CT), zero-crossing (ZX) deecion and off-ime conrol, gae drive oupu, over-volage proecion (OVP) and over-curren proecion (OCP). The PFC pin is a muli-funcion inpu/oupu pin used for driving he exernal PFC MOSFET gae and also for sensing he PFC inducor curren zero-crossing during he off-ime. The VBUS pin is also a muli-funcion pin used for monioring he DC bus volage hrough an exernal divider nework and also measuring he MOSFET (MPFC) source curren. An inernal OTA compares he volage feedback wih an accurae inernal volage reference (VBUSREG) o conrol he CMP pin volage by charging and discharging he exernal compensaion capacior (CCMP). The volage level a he CMP pin deermines he on-ime o conrol power ransfer o he oupu. The MOSFET curren is measured wih a curren-sensing resisor and hen AC-coupled ono he VBUS pin hrough an exernal series resisor and capacior. RECT (+) VBUS (+) (+) 9...19.8V (-) VCC 3 OCP UVLO 2 VBUS OVP 5 COM OFF Time 4.1V + PFC 4 PFC Logic ON Time CMP 1 CT RECT (-) VBUS (-) Figure 3: PFC conrol circuiry 11 2016-02-17
2. PFC Muli-Funcion Pin The muli-funcion PFC pin performs he following wo funcions: 1) PFC gae drive oupu. 2) PFC inducor curren zero-crossing deecion. During each swiching cycle illusraed in figure 4, a he beginning of each cycle he PFC pin gae drive oupu pulls he PFC pin volage high o approximaely VCC-1V and he exernal PFC MOSFET urns on; he on-ime duraion is se by he CMP pin volage. The inernal PFC conrol loop seers he CMP pin volage o conrol he onime such ha if he DC bus volage increases hen he CMP pin volage and on-ime will decrease. This will decrease he peak inducor curren each swiching cycle ransferring less energy and causing he DC bus volage o decrease. If he DC bus volage decreases, hen he CMP pin volage and on-ime will increase having he opposie effec. This negaive feedback conrol regulaes he DC bus o a consan volage over AC line volage or oupu load variaions. The speed of he conrol loop is deermined by he inernal OTA rans-conducance and compensaion capacior CCMP. A he end of each on ime period, he PFC pin gae drive circui pulls he PFC pin o COM and he exernal PFC MOSFET urns off. Afer a shor iniial swich off delay (PD), he inernal gae drive pull-down urns off and he PFC pin is hen weakly pulled up and clamped a approximaely one diode forward volage drop (VPFCOFF), which is well below he gae hreshold of he MOSFET (MPFC) ensuring ha i will no begin o swich on. During he off-ime he PFC inducor curren discharges hrough he boos diode ino he DC oupu capacior and load. When he inducor curren falls o zero, he drain volage falls from he level of he oupu volage plus he oupu diode forward volage and ransiions negaively. During his ransiion curren flows hrough he MOSFET parasiic gae o drain capaciance C GD overcoming he inernal weak pull up and causing he gae volage o drop below he hreshold VPFCZX-. Afer remaining below his hreshold for a period of ZXBLANK, he PFC gae drive will be urned on again o sar he nex swiching cycle and so he sequence repeas. To ensure ZX deecion, a minimum volage headroom is needed beween he peak line volage a high line and he oupu volage. This value depends on he MOSFET C GD, a value of 60-70V is ypical. To operae wih a smaller headroom 500V minimum raed capacior around 100pF may be added beween drain and source. PFC VCC VPFCOFF VPFCZX- ILPFC VDRAIN DC BUS Figure 4: PFC iming diagram. OFF-TIME ON-TIME 12 2016-02-17
3. PFC On-Time Modulaion Fixed on-ime over he enire half cycle of he line inpu volage produces a peak inducor curren ha naurally follows he sinusoidal shape of he line inpu volage. The filered, averaged line inpu curren is in phase wih he line inpu volage o provide high power facor. However some harmonic disorion of he curren is sill presen mosly due o cross-over disorion occurring near he zero-crossings of he line inpu volage as shown in figure 2. To achieve very low harmonics wihin he limis of inernaional sandards and o mee general marke requiremens, an addiional on-ime modulaion funcion is included in he IRS2505L, which dynamically increases he on-ime as he line inpu volage nears he zero-crossings. As illusraed in figure 5, he peak LPFC curren and herefore he smoohed line inpu curren increase slighly higher near he zero-crossings of he line inpu volage. This reduces he amoun of cross-over disorion in he line inpu curren and improves he shape of he curren reducing he THD and harmonics o low levels. ILPFC PFC pin near peak region of recified AC line near zero-crossing region of recified AC line Figure 5: PFC on-ime modulaion. 4. DC Bus Over-Volage Proecion (OVP) The VBUS pin includes oupu over-volage proecion (OVP). Should he VBUS pin feedback volage exceed he inernal over-volage proecion hreshold (VBUSOV+) hen he PFC gae drive will urn off unil he VBUS pin volage again falls below he over-volage resar hreshold (VBUSOV-) o resume normal operaion. 13 2016-02-17
5. Over-Curren Proecion (OCP) As well as sensing he oupu volage feedback, he VBUS inpu also includes a cycle-by-cycle, AC-coupled, over-curren proecion (OCP) funcion. The exernal nework required o combine hese wo inpus is shown in figure 6. The high-frequency ramp shaped volage produced across he curren-sensing resisor (RCS) is coupled ono he VBUS feedback wih an exernal series resisor (R1) and capacior (C1) as shown in figure 7. An inernal over-curren proecion circui deecs he difference beween he peak and average of he combined signal so ha if he riangularshaped volage peak a he VBUS inpu exceeds VBUSREG by VBUSOC+ he gae drive is immediaely driven low. The capacior CVBUS is added o make he curren sense signal more riangular so ha is peak value will be close o half is average. The OCP funcion will safely limi he peak curren in each swiching cycle o preven MOSFET damage during low AC line condiions, overload or during fas mains volage inerrups. I should be remembered ha in any Boos converer i is no possible o incorporae full oupu curren conrol or shor circui proecion by conrolling he swiching of MPFC. Shoring he oupu should be avoided as i will shor he inpu and blow a fuse! DC Bus Volage Boos Swiching Node RBUS1 MPFC VBUS 5 C1 R1 VCS CVBUS RBUS2 RCS COM 2 Figure 6: AC-coupled over-curren proecion circui. VCS VBUS VBUSOC+ DC Offse (from DC bus measuremen) PFC Figure 7: OCP circui iming diagram. Normal Mode OCP Mode 14 2016-02-17
Package Deails: 5 Lead SOT23 15 2016-02-17
Tape and Reel Deails: 5 Lead SOT23 16 2016-02-17
Tape and Reel Deails: 5 Lead SOT23 17 2016-02-17
Par Marking Informaion: 5 Lead SOT23 Top Marking YW LC Lo Code Dae Code Boom Marking B IR Logo Par no. 18 2016-02-17
Revision Hisory Major changes since he las revision Dae June 20, 2013 Sepember 2, 2015 February 17, 2016 Descripion of change Firs Release Updaed block diagram and funcional descripion. Added es limis for muliple parameers. Added blanking ime for cycle by cycle over-curren proecion Published by Infineon Technologies AG 81726 München, Germany Infineon Technologies AG 2015 All Righs Reserved. IMPORTANT NOTICE The informaion given in his documen shall in no even be regarded as a guaranee of condiions or characerisics ( Beschaffenheisgaranie ). Wih respec o any examples, hins or any ypical values saed herein and/or any informaion regarding he applicaion of he produc, Infineon Technologies hereby disclaims any and all warranies and liabiliies of any kind, including wihou limiaion warranies of non-infringemen of inellecual propery righs of any hird pary. In addiion, any informaion given in his documen is subjec o cusomer s compliance wih is obligaions saed in his documen and any applicable legal requiremens, norms and sandards concerning cusomer s producs and any use of he produc of Infineon Technologies in cusomer s applicaions. The daa conained in his documen is exclusively inended for echnically rained saff. I is he responsibiliy of cusomer s echnical deparmens o evaluae he suiabiliy of he produc for he inended applicaion and he compleeness of he produc informaion given in his documen wih respec o such applicaion. For furher informaion on he produc, echnology, delivery erms and condiions and prices please conac your neares Infineon Technologies office (www.infineon.com). WARNINGS Due o echnical requiremens producs may conain dangerous subsances. For informaion on he ypes in quesion please conac your neares Infineon Technologies office. Excep as oherwise explicily approved by Infineon Technologies in a wrien documen signed by auhorized represenaives of Infineon Technologies, Infineon Technologies producs may no be used in any applicaions where a failure of he produc or any consequences of he use hereof can reasonably be expeced o resul in personal injury. 19 2016-02-17