EMIPAK B PressFit Power Module -Levels Half Bridge Inverter Stage, 5 A VS-ETF5Y5N EMIPAK-B (package example) PRIMARY CHARACTERISTICS Q to Q IGBT V CES 5 V V CE(on) typical at I C = 5 A.7 V I C at T C = 8 C 5 A Speed 8 khz to khz Package EMIPAK B Circuit configuration -levels half bridge inverter stage FEATURES Trench IGBT technology FRED Pt clamping diodes PressFit pins technology Exposed Al O substrate with low thermal resistance Short circuit rated Square RBSOA Integrated thermistor Low internal inductances Low switching loss PressFit pins locking technology. Patent # US..8 B UL approved file E7899 Material categorization: for definitions of compliance please see www.vishay.com/doc?999 DESCRIPTION VS-ETF5Y5N is an integrated solution for a multi level inverter stage in a single package. The EMIPAK B package is easy to use thanks to the PressFit pins and the exposed substrate provides improved thermal performance. The optimized layout also helps to minimize stray parameters, allowing for better EMI performance. Continuous collector current I C ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS MAX. UNITS Operating junction temperature T J 75 Storage temperature range T Stg - to +5 C RMS isolation voltage V ISOL T J = 5 C, all terminals shorted, f = 5 Hz, t = s 5 V Q to Q IGBT Collector to emitter voltage V CES 5 Gate to emitter voltage V GES V Pulsed collector current I CM 5 Clamped inductive load current I LM 8 A T C = C 7 A T C = 5 C T SINK = C 77 T C = 5 C Power dissipation P D T C = C W D5 - D CLAMPING DIODE Repetitive peak reverse voltage V RRM 5 V Single pulse forward current I FSM ms sine or ms rectangular pulse, T J = 5 C 75 Diode continuous forward current I F T C = C T C = 5 C A T SINK = C 7 T C = 5 C 9 Power dissipation P D T C = C 5 W PATENT(S): www.vishay.com/patents This Vishay product is protected by one or more United States and International patents. Revision: -May-8 Document Number: 95989 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
VS-ETF5Y5N ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS MAX. UNITS D - D - D - D AP DIODE Single pulse forward current I FSM ms sine or ms rectangular pulse, T J = 5 C 5 Diode continuous forward current I F T C = C 9 T C = 5 C T SINK = C 57 T C = 5 C 8 Power dissipation P D T C = C 8 Notes Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur () V CC = 5 V, V GE = 5 V, L = 5 μh, R g =.7, T J = 75 C A W ELECTRICAL SPECIFICATIONS (T J = 5 C unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNITS Q to Q IGBT Collector to emitter breakdown voltage BV CES V GE = V, I C = μa 5 - - V GE = 5 V, I C = 5 A -.7.7 Collector to emitter voltage V CE(on) V GE = 5 V, I C = 5 A, T J = 5 C -.95 - V Gate threshold voltage V GE(th) V CE = V GE, I C = 5. ma 5.. 8. Temperature coefficient of threshold voltage V GE(th) / T J V CE = V GE, I C =. ma (5 C to 5 C) - -8 - mv/ C Forward transconductance g fe V CE = V, I C = 5 A - - S Transfer characteristics V GE V CE = V, I C = 5 A -. - V V GE = V, V CE = 5 V -. Zero gate voltage collector current I CES V GE = V, V CE = 5 V, T J = 5 C - - μa Gate to emitter leakage current I GES V GE = ± V, V CE = V - - ± na D5 - D CLAMPING DIODE Cathode to anode blocking voltage V BR I R = 5 μa 5 - - I F = A -.. Forward voltage drop V FM I F = A, T J = 5 C -.5 - V R = 5 V -. Reverse leakage current I RM V R = 5 V, T J = 5 C - - D - D - D - D AP DIODE I F = A -..9 Forward voltage drop V FM I F = A, T J = 5 C -. - V μa V SWITCHING CHARACTERISTICS (T J = 5 C unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNITS Q to Q IGBT Total gate charge (turn-on) Q g IC = 5 A - - Gate to emitter charge (turn-on) Q ge V CC = V - 95 - nc Gate to collector charge (turn-on) Q gc V GE = 5 V - - Input capacitance C ies VGE = V - 99 - Output capacitance C oes V CC = V - - pf Reverse transfer capacitance C res f = MHz - 5 - Revision: -May-8 Document Number: 95989 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
VS-ETF5Y5N SWITCHING CHARACTERISTICS (T J = 5 C unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNITS Q and Q IGBT with D5 and D CLAMP DIODE Turn-on switching loss E on -.9 - Turn-off switching loss E off -. - mj I C = 5 A Total switching loss E tot V CC = 5 V -. - Turn-on delay time t d(on) V GE = 5 V - - Rise time t r R g =.7-8 - Turn-off delay time t d(off) L = 5 μh () - 9 - ns Fall time t f - 9 - Turn-on switching loss E on -.9 - Turn-off switching loss E off I C = 5 A -. - mj Total switching loss E tot V CC = 5 V - 5. - V = 5 V Turn-on delay time t d(on) GE R g =.7 - - Rise time t r L = 5 μh - 9 - Turn-off delay time t d(off) T J = 5 C () - 5 - ns Fall time t f - 97 - Q and Q IGBT with D and D AP DIODE Turn-on switching loss E on -.8 - Turn-off switching loss E off -. - mj I C = 5 A Total switching loss E tot V CC = 5 V -.8 - Turn-on delay time t d(on) V GE = 5 V - - Rise time t r R g =.7-7 - Turn-off delay time t d(off) L = 5 μh () - - ns Fall time t f - 98 - Turn-on switching loss E on -.98 - Turn-off switching loss E off I C = 5 A -.7 - mj Total switching loss E tot V CC = 5 V - 5.7 - V = 5 V Turn-on delay time t d(on) GE R g =.7 - - Rise time t r L = 5 μh - - Turn-off delay time t d(off) T J = 5 C () - 5 - ns Fall time t f - - Reverse bias safe operating area RBSOA T J = 75 C, I C = 8 A, V CC = 5 V, V P = 5 V, Fullsquare R g =.7, V GE = 5 V to V Short circuit safe operating area SCSOA R g = 5., V CC = V, V P = V, V GE = 5 V to, - - 5.5 μs T J = 5 C D5 - D CLAMPING DIODE Diode reverse recovery time t rr VR = V - 78 - ns Diode peak reverse current I rr I F = 5 A - - A Diode recovery charge Q rr dl/dt = 5 A/μs - - nc Diode reverse recovery time t rr VR = V - 55 - ns Diode peak reverse current I rr I F = 5 A - 8 - A Diode recovery charge Q rr dl/dt = 5 A/μs, T J = 5 C - 5 - nc D - D - D - D AP DIODE Diode reverse recovery time t rr VR = V - 8 - ns Diode peak reverse current I rr I F = 5 A - - A Diode recovery charge Q rr dl/dt = 5 A/μs - - nc Diode reverse recovery time t rr VR = V - - ns Diode peak reverse current I rr I F = 5 A - - A Diode recovery charge Q rr dl/dt = 5 A/μs, T J = 5 C - 5 - nc Note () Energy losses include tail and diode reverse recovery Revision: -May-8 Document Number: 95989 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
VS-ETF5Y5N INTERNAL NTC - THERMISTOR SPECIFICATIONS PARAMETER SYMBOL TEST CONDITIONS TYP. UNITS Resistance R5 T J = 5 C 5 ± 5 % R5 T J = C 9 ± 5 % B-constant B R = R 5 exp. [B 5/5 (/T - /(98.5 K))] 75 ± 5 % K Temperature range - to +5 Maximum operating temperature C Dissipation constant mw/ C Thermal time constant 8 s THERMAL AND MECHANICAL SPECIFICATIONS PARAMETER SYMBOL MIN. TYP. MAX. UNITS Q to Q IGBT- junction to case thermal resistance (per switch) - -.5 D5 - D clamping diode - junction to case thermal resistance (per diode) R thjc - -.7 D - D - D - D AP diode - junction to case thermal resistance (per diode) - -. Q to Q IGBT - case to sink thermal resistance (per switch) -. - C/W D5 - D clamping diode - case to sink thermal resistance (per diode) -.7 - D - D - D - D AP diode - case to sink thermal resistance (per diode) R () thcs -.7 - Case to sink thermal resistance per module -. - Mounting torque (M) - Nm Weight - 5 - g Note () Mounting surface flat, smooth, and greased 75 5 5 75 5 5 75 5 5 T J = 5 C T J = 5 C T J = 75 C.5..5..5..5. 75 5 5 75 5 5 75 5 5 V GE = V V GE = 5 V V GE = 8 V V GE = 9 V.5..5..5..5..5 V CE (V) V CE (V) Fig. - I C vs. V CE, Typical Q to Q Trench IGBT Output Characteristics, V GE = 5 V Fig. - I C vs. V CE Typical Q to Q Trench IGBT Output Characteristics, T J = 5 C Revision: -May-8 Document Number: 95989 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
VS-ETF5Y5N Allowable Case Temperature ( C) 8 8 DC 9 5 8 I CES (ma)..... T J = 75 C T J = 5 C T J = 5 C 5 5 5 5 5 55 5 I C - Continuous Collector Current (A) V CES (V) Fig. - Allowable Case Temperature vs. Continuous Collector Current, Maximum Q to Q Trench IGBT Continuous Collector Current vs. Case Temperature Fig. - I CES vs V CES Typical Q to Q Trench IGBT Zero Gate Voltage Collector Current 8 V CE = V T J = 5 C T J = 5 C 5 7 8 9 Energy (mj) 5.5 5.5.5 Eoff.5.5 Eon.5 8 8 V GE (V) V GEth (V) Fig. - I C vs V GE Typical Q to Q Trench IGBT Transfer Characteristics 7.5 7..5. 5.5 5..5..5. T J = 5 C T J = 5 C.5 5 I C (ma) Fig. 5 - V GEth vs. I C Typical Q to Q Trench IGBT Gate Threshold Voltage Switching Time (ns) Fig. 7 - Energy Loss vs. I C (Typical Q - Q Trench IGBT Energy Loss vs. I C (with D5 - D Clamping Diode)), T J = 5 C, V CC = 5 V, R g =.7, V GE = ± 5 V, L = 5 μh t d(off) t d(on) t r t f 8 8 Fig. 8 - Switching Time vs. I C (Typical Q - Q Trench IGBT Switching Time vs. I C (with D5 - D Clamping Diode)), T J = 5 C, V CC = 5 V, R g =.7, V GE = ± 5 V, L = 5 μh Revision: -May-8 5 Document Number: 95989 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
VS-ETF5Y5N Energy (mj) 9 8 7 5 5 5 5 5 5 5 R g (Ω) Fig. 9 - Energy Loss vs. R g (Typical Q - Q Trench IGBT Energy Loss vs R g (with D5 - D Clamping Diode)), T J = 5 C, V CC = 5 V, I C = 5 A, V GE = ± 5 V, L = 5 μh E off E on Allowable Case Temperature ( C) 8 8 8 8 Fig. - Allowable Case Temperature vs. Continuous Forward Current, (Maximum D5 - D Diode Continuous Forward Current vs. Case Temperature) DC I F - Continuous Forward Current (A) t d(on) t d(off) TJ = 75 C Switching Time (ns) t r t f I RM (ma).... TJ = 5 C TJ = 5 C 5 5 5 5 5 5 R g (Ω). 5 5 5 5 5 55 5 V R (V) Fig. - Switching Time vs. R g (Typical Q - Q Trench IGBT Switching Time vs. R g (with D5 - D Clamping Diode)), T J = 5 C, V CC = 5 V, I C = 5 A, V GE = ± 5 V, L = 5 μh Fig. - I RM vs. V R (Typical D5 - D Clamping Diode Reverse Leakage Current) 5 8 T J = 75 C 5 C I F (A) 5 T J = 5 C T J = 5 C t rr (ns) 8 5 C 5.5..5..5..5 V FM (V) 5 di F /dt (A/μs) Fig. - I F vs. V FM (Typical D5 - D Clamping Diode Forward Characteristics) Fig. - t rr vs. di F /dt (Typical D5 - D Clamping Diode Reverse Recovery Time vs. di F /dt), V rr = V, I F = 5 A Revision: -May-8 Document Number: 95989 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
VS-ETF5Y5N I rr (A) 8 5 C 8 5 C 8 5 Q rr (nc) 5 C 8 8 5 C 5 di F /dt (A/μs) di F /dt (A/μs) Fig. 5 - I rr vs. di F /dt) (Typical D5 - D Clamping Diode Reverse Recovery Current vs. di F /dt), V rr = V, I F = 5 A Fig. - Q rr vs. di F /dt) (Typical D5 - D Clamping Diode Reverse Recovery Charge vs. di F /dt)), V rr = V, I F = 5 A Z thjc - Thermal Impedance Junction to Case ( C/W)..5....5.. DC...... t - Rectangular Pulse Duration (s) Energy (mj) Fig. 7 - Z thjc vs. t Rectangular Pulse Duration (Maximum Thermal Impedance Z thjc Characteristics - (D5 - D Clamping Diode)) 7.5 5.5 5.5.5.5.5.5 Eoff 8 8 Eon Switching Time (ns) t f t r t d(on) t d(off) 8 8 Fig. 8 - Energy Loss vs. I C (Typical Q - Q Trench IGBT Energy Loss vs. I C (with D - D Antiparallel Diode)), T J = 5 C, V CC = 5 V, R g =.7, V GE = ± 5 V, L = 5 μh Fig. 9 - Switching Time vs. I C (Typical Q - Q Trench IGBT Switching Time vs. I C (with D - D Antiparallel Diode)), T J = 5 C, V CC = 5 V, R g =.7, V GE = ± 5 V, L = 5 μh Revision: -May-8 7 Document Number: 95989 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
VS-ETF5Y5N www.vishay.com 8 Energy (mj) 9 8 7 5 Eoff Eon 5 5 5 5 5 5 Allowable Case Temperature ( C) 8 DC 5 7 8 9 R g (Ω) I F - Continuous Forward Current (A) Fig. - Energy Loss vs. R g (Typical Q - Q Trench IGBT Energy Loss vs. R g (with D - D Antiparallel Diode)), T J = 5 C, V CC = 5 V, I C = 5 A, V GE = ± 5 V, L = 5 μh Fig. - Allowable Case Temperature vs. Continuous Forward Current, (Maximum D- D - D - D Diode Continuous Forward Current vs. Case Temperature) t d(on) t d(off) 8 Switching Time (ns) t f t r t rr (ns) 8 5 C 5 C 5 5 5 5 5 5 R g (Ω) 5 di F /dt (A/μs) Fig. - Switching Time vs. R g (Typical Q - Q Trench IGBT Switching Time vs. R g (with D - D Antiparallel Diode)), T J = 5 C, V CC = 5 V, I C = 5 A, V GE = ± 5 V, L = 5 μh Fig. - t rr vs. di F /dt (Typical D - D - D - D Antiparallel Diode Reverse Recovery Time vs. di F /dt), V rr = V, I F = 5 A I F (A) 5 5 75 5 5 T J = 5 C T J = 75 C T J = 5 C.5..5..5. I rr (A) 8 5 C 8 5 C 5 V FM (V) di F /dt (A/μs) Fig. - I F vs. V FM (Typical D - D - D - D Antiparallel Diode Forward Characteristics) Fig. 5 - I rr vs. di F /dt (Typical D - D - D - D Antiparallel Diode Reverse Recovery Current vs. di F /dt), V rr = V, I F = 5 A Revision: -May-8 8 Document Number: 95989 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
VS-ETF5Y5N 8 5 C Q rr (nc) 8 5 C 5 di F /dt (A/μs) Fig. - Q rr vs. di F /dt (Typical D - D - D - D Antiparallel Diode Reverse Recovery Charge vs. di F /dt), V rr = V, I F = 5 A Z thjc - Thermal Impedance Junction to Case ( C/W)....5...5.. DC...... t - Rectangular Pulse Duration (s) Fig. 7 - Z thjc vs. t Rectangular Pulse Duration (Maximum Thermal Impedance Z thjc Characteristics - (Q - Q Trench IGBT)) Z thjc - Thermal Impedance Junction to Case ( C/W)..5....5.. DC...... t - Rectangular Pulse Duration (s) Fig. 8 - Z thjc vs. t Rectangular Pulse Duration (Maximum Thermal Impedance Z thjc Characteristics - (D - D - D - D Antiparallel Diode)) Revision: -May-8 9 Document Number: 95989 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
VS-ETF5Y5N I DS - Drain-Source Current (A) Limited by V DS(on) t p = 5 μs t p = ms t p = μs T a = 5 C Single pulse.. V DS - Drain-Source Voltage (V) Fig. 9 - SOA ORDERING INFORMATION TABLE Device code VS- ET F 5 Y 5 N 5 7 - product - Package indicator (ET = EMIPAK B) - Circuit configuration (F = -levels half bridge inverter stage) - Current rating (5 = 5 A) 5 - Switch die technology (Y = trench IGBT) - Voltage rating (5 = 5 V) 7 - Diode die technology (N = ultrafast diode) Revision: -May-8 Document Number: 95989 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
VS-ETF5Y5N CIRCUIT CONFIGURATION Q D 5 D5 Q D 7 8 Q D 9 Q D D Ntc PACKAGE in millimeters Dimensions LINKS TO RELATED DOCUMENTS www.vishay.com/doc?95559 Revision: -May-8 Document Number: 95989 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
Outline Dimensions EMIPAK-B PressFit DIMENSIONS in millimeters ±.5 ±.5 Ø. ±. 5.8 ±. 5.7 ±.5 5 ±.5....8 ±. 5 ±.5.5 ±.5 7 ±.5.. 9. 9..8.8.. ±.. Pin position...8.8 8 8.... 7. 7..8.8 Revision: 5-Jun- Document Number: 95559 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9
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