Dual Channel, High Speed Optocouplers Technical Data HCPL-5 HCPL-5 HCPL-454 HCPL-5 HCPL-5 HCPL-54 Features 5 kv/µs Minimum Common Mode Transient Immunity at V CM = 5 V (HCPL-454/54) High Speed: Mb/s TTL Compatible Available in Pin DIP, SO-, and Pin DIP Gull Wing Surface Mount (Option ) Packages High Density Packaging MHz Bandwidth Open Collector Outputs Guaranteed Performance from C to 7 C Safety Approval UL Recognized 75 V rms for minute (5 V rms for minute for Option ) per UL577 CSA Approved Single Channel Version Available (45/, 45/) MIL-PRF-54 Hermetic Version Available (55XX/65XX/4N55) Applications Line Receivers High Common Mode Transient Immunity (> V/µs) and Low Input-Output Capacitance (.6 pf) High Speed Logic Ground Isolation TTL/TTL, TTL/ LTTL, TTL/CMOS, TTL/LSTTL Replace Pulse Transformers Save Board Space and Weight Analog Signal Ground Isolation Integrated Photon Detector Provides Improved Linearity over Phototransistor Type Polarity Sensing Isolated Analog Amplifier Dual Channel Packaging Enhances Thermal Tracking Functional Diagram ANODE CATHODE CATHODE 7 6 V CC V O V O Description These dual channel optocouplers contain a pair of light emitting diodes and integrated photodetectors with electrical insulation between input and output. Separate connection for the photodiode bias and output transistor collectors increase the speed up to a hundred times that of a conventional phototransistor coupler by reducing the basecollector capacitance. TRUTH TABLE (POSITIVE LOGIC) LED V O ON LOW OFF HIGH ANODE 4 5 GND A. µf bypass capacitor between pins 5 and is recommended. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
These dual channel optocouplers are available in an Pin DIP and in an industry standard SO- package. The following is a cross reference table listing the Pin DIP part number and the electrically equivalent SO- part number. SO- Pin DIP Package HCPL-5 HCPL-5 HCPL-5 HCPL-5 HCPL-454 HCPL-54 The SO- does not require through holes in a PCB. This package occupies approximately one-third the footprint area of the standard dual-in-line package. The lead profile is designed to be compatible with standard surface mount processes. The HCPL-5/5 is for use in TTL/CMOS, TTL/LSTTL or wide bandwidth analog applications. Current transfer ratio (CTR) for the HCPL-5/5 is 7% minimum at I F = 6 ma. The HCPL-5/5 is designed for high speed TTL/TTL applications. A standard 6 ma TTL sink current through the input LED will provide enough output current for TTL load and a 5.6 kω pull-up resistor. CTR of the HCPL-5/5 is 9% minimum at I F = 6 ma. The HCPL-454/54 is an HCPL-5/5 with increased common mode transient immunity of 5, V/µs minimum at V CM = 5 V guaranteed. Selection Guide Widebody Minimum CMR -pin DIP ( Mil) Small-Outline SO- (4 Mil) Hermetic Current Dual Single Dual Single Single Single and dv/dt V CM Transfer Channel Channel Channel Channel Channel Dual Channel (V/µs) (V) Ratio (%) Package Package* Package Package* Package* Packages*, 7 HCPL-5 6N5 HCPL-5 HCPL-5 HCNW5 9 HCPL-5 6N6 HCPL-5 HCPL-5 HCNW6 HCPL-45 HCPL-45 HCNW45 5, 5 9 HCPL-454 HCPL-45 HCPL-54 HCPL-45 HCNW45, 9 HCPL-55XX HCPL-65XX 4N55 *Technical data for these products are on separate Agilent publications. Ordering Information Specify Part Number followed by Option Number (if desired). Example: HCPL-5#XXXX = UL 5 V rms/ Minute Option* = Gull Wing Surface Mount Option 5 = Tape and Reel Packaging Option XXXE = Lead Free Option Option data sheets available. Contact your Agilent sales representative or authorized distributor for information. *For HCPL-5/ and HCPL-454 only. Gull wing surface mount option applies to through hole parts only. Remarks: The notation # is used for existing products, while (new) products launched since 5th July and lead free option will use
Schematic + I F I CC V CC V F I O V O 7 I F V F I O V O 6 + 4 5 GND HCPL-454/54 SHIELD USE OF A. µf BYPASS CAPACITOR CONNECTED BETWEEN PINS 5 AND IS RECOMMENDED. Package Outline Drawings -Pin DIP Package (HCPL-5/5/454) 9.65 ±.5 (. ±.) 7.6 ±.5 (. ±.) TYPE NUMBER 7 6 A XXXXZ YYWW UR 5 OPTION CODE* DATE CODE 6.5 ±.5 (.5 ±.) 4 UL RECOGNITION.9 (.47) MAX..56 ±. (.4 ±.5).7 (.7) MAX. 4.7 (.5) MAX. 5 TYP..54 +.76 -.5 (. +.) -.). ±. (.4 ±.).5 (.) MIN..9 (.5) MIN. DIMENSIONS IN MILLIMETERS AND (INCHES). *MARKING CODE LETTER FOR OPTION NUMBERS. "V" = OPTION 6.65 (.5) MAX..54 ±.5 (. ±.) OPTION NUMBERS AND 5 NOT MARKED. NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX.
4 Package Outline Drawings, continued -Pin DIP Package with Gull Wing Surface Mount Option (HCPL-5/5/454) LAND PATTERN RECOMMENDATION 9.65 ±.5 (. ±.).6 (.4) 7 6 5 6.5 ±.5 (.5 ±.).9 (.4) 4.7 (.5). (.).9 (.47) MAX..7 (.7) MAX..56 ±. (.4 ±.5) 9.65 ±.5 (. ±.) 7.6 ±.5 (. ±.).54 +.76 -.5 (. +.) -.). ±. (.4 ±.).54.65 ±. (.) (.5 ±.5) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY =. mm (.4 INCHES). NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX..65 ±.5 (.5 ±.) NOM. Small Outline SO- Package (HCPL-5/5/54) LAND PATTERN RECOMMENDATION.97 ±.7 (.55 ±.5) 7 6 5 XXX YWW.46 ±.76 (.6 ±.).7 (.5) BSC 4 5.994 ±. (.6 ±.) TYPE NUMBER (LAST DIGITS) DATE CODE.64 (.5).9 (.75) 7.49 (.95) * 5. ±.7 (. ±.5) 7 45 X.4 (.7).75 ±.7 (.5 ±.5).54 (.6). ±.5 (.9 ±.) * TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH) 5.7 ±.54 (.5 ±.) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY =. mm (.4 INCHES) MAX..5 (.) MIN.. ±. (. ±.4) NOTE: FLOATING LEAD PROTRUSION IS.5 mm (6 mils) MAX.
5 Solder Reflow Thermal Profile TEMPERATURE ( C) PREHEATING RATE C + C/.5 C/SEC. REFLOW HEATING RATE.5 C ±.5 C/SEC. 6 C 5 C 4 C C + C/.5 C.5 C ±.5 C/SEC. PREHEATING TIME 5 C, 9 + SEC. PEAK TEMP. 45 C SEC. SEC. 5 SEC. PEAK TEMP. 4 C SOLDERING TIME C PEAK TEMP. C ROOM TEMPERATURE TIGHT TYPICAL LOOSE 5 5 5 TIME (SECONDS) Pb-Free IR Profile TEMPERATURE T p 6 +/-5 C T L 7 C RAMP-UP C/SEC. MAX. T smax 5 - C T smin t s PREHEAT 6 to SEC. t p t L TIME WITHIN 5 C of ACTUAL PEAK TEMPERATURE 5 SEC. RAMP-DOWN 6 C/SEC. MAX. 6 to 5 SEC. 5 t 5 C to PEAK TIME NOTES: THE TIME FROM 5 C to PEAK TEMPERATURE = MINUTES MAX. T smax = C, T smin = 5 C Regulatory Information The devices contained in this data sheet have been approved by the following organizations: UL Recognized under UL 577, Component Recognition Program, File E556. CSA Approved under CSA Component Acceptance Notice #5, File CA 4.
6 Insulation and Safety Related Specifications -Pin DIP ( Mil) SO- Parameter Symbol Value Value Units Conditions Minimum External L() 7. 4.9 mm Measured from input terminals to output to Air Gap (External to output terminals, shortest distance through Clearance) air. Minimum External L() 7.4 4. mm Measured from input terminals to output Tracking (External terminals, shortest distance path along body. Creepage) Minimum Internal.. mm Through insulation distance, conductor to Plastic Gap conductor, usually the direct distance (Internal Clearance) between the photoemitter and photodetector inside the optocoupler cavity. Minimum Internal NA NA mm Measured from input terminals to output Tracking (Internal terminals, along internal cavity. Creepage) Tracking Resistance CTI Volts DIN IEC /VDE Part (Comparative Tracking Index) Isolation Group IIIa IIIa Material Group (DIN VDE, /9, Table ) Option - surface mount classification is Class A in accordance with CECC. Absolute Maximum Ratings Parameter Symbol Device Min. Max. Units Note Storage Temperature T S -55 5 C Operating Temperature T A -55 C Average Forward Input Current I F(AVG) 5 ma (each channel) Peak Forward Input Current (each channel) I F(PEAK) 5 ma (5% duty cycle, ms pulse width) Peak Transient Input Current (each channel) I F(TRANS) A ( µs pulse width, pps) Reverse LED Input Voltage (each channel) V R 5 V Input Power Dissipation (each channel) P IN 45 mw Average Output Current (each channel) I O(AVG) ma Peak Output Current I O(PEAK) 6 ma Supply Voltage (Pin -5) V CC -.5 V Output Voltage (Pins 7-5, 6-5) V O -.5 V Output Power Dissipation (each channel) P O 5 mw Lead Solder Temperature (Through-Hole Parts Only).6 mm below seating plane, seconds T LS Pin DIP 6 C Reflow Temperature Profile T RP SO- and Option See Package Outline Drawings section
7 Electrical Specifications (DC) Over recommended temperature (T A = C to 7 C) unless otherwise specified. See note 9. Parameter Sym. Device Min. Typ.* Max. Units Test Conditions Fig. Note Current CTR HCPL-5/ 7 5 % T A = 5 C I F = 6 ma,,, Transfer 5 V CC = 4.5 V 4 Ratio 5 V O =.5 V HCPL-5/ 9 4 5 % T A = 5 C 5 HCPL-454/ 5 54 Logic Low V OL HCPL-5/..5 V T A = 5 C I O =. ma I F = 6 ma, Output 5 V CC = 4.5 V Voltage.5 I O =. ma HCPL-5/..5 V T A = 5 C I O =. ma 5 HCPL-454/.5 I O =.4 ma 54 Logic High I OH..5 µa T A = 5 C V O = Open I F = ma 6 Output V CC = 5.5 V Current 5 T A = 5 C V O = Open V CC = 5. V Logic Low I CCL 4 µa I F = 6 ma, V O = Open, Supply V CC = 5 V Current Logic High I CCH.5 4 µa I F = ma, V O = Open, Supply V CC = 5 V Current Input V F.5.7 V T A = 5 C Forward I F = 6 ma Voltage. Input BV R 5 V I R = µa Reverse Breakdown Voltage Temperature V F -.6 mv/ I F = 6 ma Coefficient T A C of Forward Voltage Input C IN 6 pf f = MHz, V F = V Capacitance *All typicals at T A = 5 C.
Switching Specifications (AC) Over recommended temperature (T A = C to 7 C), V CC = 5 V, I F = 6 ma unless otherwise specified. Device Parameter Sym. HCPL- Min. Typ.* Max. Units Test Conditions Fig. Note Propagation t PHL 5/5..5 µs T A = 5 C R L = 4. kω 5, 9, 6, 7 Delay Time. to Logic Low 5/5/.. T A = 5 C R L =.9 kω at Output 454/54. Propagation t PLH 5/5..5 µs T A = 5 C R L = 4. kω 5, 9, 6, 7 Delay Time. High to Logic 5/5/.6. T A = 5 C R L =.9 kω at Output 454/54. Common CM H 5/5 kv/µs R L = 4. kω I F = ma, 5, 6, Mode Transient 5/5 R L =.9 kω T A = 5 C, 7 Immunity at 454/54 5 R L =.9 kω V CM = V p-p Logic High Level Output Common CM L 5/5 kv/µs R L = 4. kω I F = ma, 5, 6, Mode Transient 5/5 R L =.9 kω T A = 5 C, 7 Immunity at 454/54 5 R L =.9 kω V CM = V p-p Logic Low Level Output Bandwidth BW MHz R L = kω 7, *All typicals at T A = 5 C. Package Characteristics Parameter Sym. Device Min. Typ.* Max. Units Test Conditions Fig. Note Input-Output V ISO 75 V rms RH < 5%,, Momentary With- HCPL-5/ 5 t = min.,, stand Voltage** 5/454 Option Resistance R I-O Ω RH 45% (Input-Output) V I-O = 5 Vdc, t = 5 s Capacitance C I-O.6 pf f = MHz, (Input-Output) T A = 5 C Input-Input I I-I.5 µa RH 45%, 4 Insulation t = 5 s, Leakage Current V I-I = 5 Vdc Resistance R I-I Ω 4 (Input-Input) Capacitance C I-I HCPL-5/. pf f = MHz 4 (Input-Input) 5/454 HCPL-5/.5 5/54 *All typicals at T A = 5 C. **The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 6747-5- Insulation Characteristics Table (if applicable), your equipment level safety specification or Agilent Application Note 74 entitled Optocoupler Input-Output Endurance Voltage, publication number 596-E.
9 Notes:. Each channel.. CURRENT TRANSFER RATIO is defined as the ratio of output collector current, I O, to the forward LED input current, I F, times %.. Device considered a two-terminal device: pins,,, and 4 shorted together and pins 5, 6, 7, and shorted together. 4. Measured between pins and shorted together, and pins and 4 shorted together. 5. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dv CM /dt on the rising edge of the common mode pulse, V CM, to assure that the output will remain in a Logic High state (i.e., V O >. V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dv CM /dt on the falling edge of the common mode pulse signal, V CM, to assure that the output will remain in a Logic Low state (i.e., V O <. V). 6. The.9 kω load represents TTL unit load of.6 ma and the 5.6 kω pull-up resistor. 7. The 4. kω load represents LSTTL unit load of.6 ma and the 6. kω pull-up resistor.. The frequency at which the ac output voltage is db below the low frequency asymptote. 9. Use of a. µf bypass capacitor connected between pins 5 and is recommended.. In accordance with UL 577, each optocoupler is proof tested by applying an insulation test voltage 45 V rms for second (leakage detection current limit, I I-O 5 µa).. In accordance with UL 577, each optocoupler is proof tested by applying an insulation test voltage 6 V rms for second (leakage detection current limit, I I-O 5 µa).. Measured between the LED anode and cathode shorted together and pins 5 through shorted together.. Derate linearly above 9 C free-air temperature at a rate of. mw/ C for the SOIC- package. I O OUTPUT CURRENT ma 5 T A = 5 C V CC = 5. V 4 ma 5 ma ma 5 ma ma 5 ma ma I F = 5 ma NORMALIZED CURRENT TRANSFER RATIO.5. HCPL-5/5 HCPL-5/5/454/54.5 NORMALIZED I F = 6 ma V O =.5 V V CC = 5 V T A = 5 C. I F FORWARD CURRENT ma... I F + V F.....4 T = 5 C A.5.6 V O OUTPUT VOLTAGE V I F INPUT CURRENT ma V F FORWARD VOLTAGE VOLTS Figure. DC and Pulsed Transfer Characteristics. Figure. Current Transfer Ratio vs. Input Current. Figure. Input Current vs. Forward Voltage.
NORMALIZED CURRENT TRANSFER RATIO...9..7 NORMALIZED I F = 6 ma V O =.5 V V CC = 5 V T A = 5 C HCPL-5/5 HCPL-5/5/454/54.6-6 -4-4 6 t P PROPAGATION DELAY ns 5 5 I F = 6 ma, V CC = 5. V HCPL-5/5 (R L = 4. kw) HCPL-5/5/454/54 (R L =.9 kw) t PLH t PHL -6-6 I OH LOGIC HIGH OUTPUT CURRENT na +4 + + + - I F = V O = V CC = 5. V - -5-5 +5 +5 +75 + T A TEMPERATURE C T TEMPERATURE C A T A TEMPERATURE C Figure 4. Current Transfer Ratio vs. Temperature. Figure 5. Propagation Delay vs. Temperature. Figure 6. Logic High Output Current vs. Temperature. IO SMALL SIGNAL CURRENT TRANSFER RATIO IF. T A = 5 C, R L = Ω, V CC = 5 V.. 4 6 4 I F QUIESCENT INPUT CURRENT ma NORMALIZED RESPONSE db -5 - -5 - -5 T A = 5 C I F = 6 ma -.. R L = Ω R L = Ω R L = 47 Ω R L = kω. f FREQUENCY MHz Figure 7. Small-Signal Current Transfer Ratio vs. Quiescent Input Current. AC INPUT +5 V SET I F. µf 56 Ω kω N5 Ω 4 7 6 5. µf R L +5 V V O.6 V dc.5 Vp-p ac Figure. Frequency Response.
I F V O.5 V 5 V.5 V V OL PULSE GEN. Z O = 5 Ω t r = 5 ns I F MONITOR I F % DUTY CYCLE /f < µs 7 6 4 5.µF R L +5 V V O C L =.5 pf t PHL t PLH R M Figure 9. Switching Test Circuit. I F A B +5 V 7 R L V CM % 9% 9% % V V O V t r t FF 6 f. µf VO V O SWITCH AT A: I = ma F SWITCH AT B: I = 6 ma F 5 V V OL 4 5 V CM + PULSE GEN. Figure. Test Circuit for Transient Immunity and Typical Waveforms. t P PROPAGATION DELAY µs. I F = ma I F = 6 ma. V CC = 5. V T A = 5 C...6.4.. 4 t PLH t PHL 5 6 7 9 R L LOAD RESISTANCE kω Figure. Propagation Delay Time vs. Load Resistance.
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