100V LOGIC N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation modes. These devices are well suited for low voltage applications such as high efficiency switching DC/DC converters, and DC motor control. Features 10A, 100V, R DS(on) = 0.18Ω @ = 10 V Low gate charge ( typical 8.7 nc) Low Crss ( typical 20 pf) Fast switching 100% avalanche tested Improved dv/dt capability RoHS Compliant January 2009 QFET D D! G S D-PAK FQD Series G D S I-PAK FQU Series G "! " "! "! S Absolute Maximum Ratings T C = 25 C unless otherwise noted Symbol Parameter Units S Drain-Source Voltage 100 V I D Drain Current - Continuous (T C = 25 C) 10 A - Continuous (T C = 100 C) 6.3 A I DM Drain Current - Pulsed (Note 1) 40 A S Gate-Source Voltage ± 20 V E AS Single Pulsed Avalanche Energy (Note 2) 95 mj I AR Avalanche Current (Note 1) 10 A E AR Repetitive Avalanche Energy (Note 1) 4.0 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 6.0 V/ns P D Power Dissipation (T A = 25 C) * 2.5 W Power Dissipation (T C = 25 C) 40 W - Derate above 25 C 0.32 W/ C T J, T STG Operating and Storage Temperature Range -55 to +150 C T L Maximum lead temperature for soldering purposes, 1/8 from case for 5 seconds 300 C Thermal Characteristics Symbol Parameter Typ Max Units R θjc Thermal Resistance, Junction-to-Case -- 3.13 C/W R θja Thermal Resistance, Junction-to-Ambient * -- 50 C/W R θja Thermal Resistance, Junction-to-Ambient -- 110 C/W * When mounted on the minimum pad size recommended (PCB Mount)
Electrical Characteristics T C = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = 250 µa 100 -- -- V BS Breakdown Voltage Temperature / T J Coefficient I D = 250 µa, Referenced to 25 C -- 0.09 -- V/ C I DSS = 100 V, = 0 V -- -- 1 µa Zero Gate Voltage Drain Current = 80 V, T C = 125 C -- -- 10 µa I GSSF Gate-Body Leakage Current, Forward = 20 V, = 0 V -- -- 100 na I GSSR Gate-Body Leakage Current, Reverse = -20 V, = 0 V -- -- -100 na On Characteristics (th) Gate Threshold Voltage =, I D = 250 µa 1.0 -- 2.0 V R DS(on) Static Drain-Source On-Resistance = 10 V, I D = 5.0 A = 5 V, I D = 5.0 A g FS Forward Transconductance = 30 V, I D = 5.0 A (Note 4) -- 8.7 -- S -- 0.142 0.158 0.18 0.2 Ω Dynamic Characteristics C iss Input Capacitance = 25 V, = 0 V, -- 400 520 pf C oss Output Capacitance f = 1.0 MHz -- 95 125 pf C rss Reverse Transfer Capacitance -- 20 25 pf Switching Characteristics t d(on) Turn-On Delay Time -- 7.5 25 ns = 50 V, I D = 12.8 A, t r Turn-On Rise Time R G = 25 Ω -- 220 450 ns t d(off) Turn-Off Delay Time -- 22 55 ns t f Turn-Off Fall Time (Note 4, 5) -- 72 150 ns Q g Total Gate Charge = 80 V, I D = 12.8 A, -- 8.7 12 nc Q gs Gate-Source Charge = 5 V -- 2.0 -- nc Q gd Gate-Drain Charge (Note 4, 5) -- 5.3 -- nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current -- -- 10 A I SM Maximum Pulsed Drain-Source Diode Forward Current -- -- 40 A V SD Drain-Source Diode Forward Voltage = 0 V, I S = 10 A -- -- 1.5 V t rr Reverse Recovery Time = 0 V, I S = 12.8 A, -- 75 -- ns Q rr Reverse Recovery Charge di F / dt = 100 A/µs (Note 4) -- 0.17 -- µc Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 1.43mH, I AS = 10A, = 25V, R G = 25 Ω, Starting T J = 25 C 3. I SD 12.8A, di/dt 300A/µs, BS, Starting T J = 25 C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature
Typical Characteristics I D, Drain Current [A] 10 1 10 0 Top : 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V 1. 250μs Pulse Test 2. T C = 25 10-1 10 0 10 1, Drain-Source Voltage [V] I D, Drain Current [A] 10 1 10 0 25 150-55 1. = 30V 2. 250μs Pulse Test 10-1 0 2 4 6 8 10, Gate-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.8 R DS(ON) [Ω ], Drain-Source On-Resistance 0.6 0.4 0.2 = 5V = 10V Note : T J = 25 0.0 0 10 20 30 40 I D, Drain Current [A] I DR, Reverse Drain Current [A] 10 1 10 0 150 25 1. = 0V 2. 250μs Pulse Test 10-1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 V SD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 1000 800 C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd 12 10 = 50V Capacitance [pf] 600 400 200 C iss C oss C rss 1. = 0 V 2. f = 1 MHz, Gate-Source Voltage [V] 8 6 4 2 = 80V Note : I D = 12.8A 10-1 10 0 10 1, Drain-Source Voltage [V] 0 0 4 8 12 16 Q G, Total Gate Charge [nc] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
Typical Characteristics (Continued) BS, (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 0.8-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] 1. = 0 V 2. I D = 250 μa R DS(ON), (Normalized) Drain-Source On-Resistance 2.5 2.0 1.5 1.0 0.5 0.0-100 -50 0 50 100 150 200 T J, Junction Temperature [ o C] 1. = 10 V 2. I D = 5.0 A Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 10 10 2 Operation in This Area is Limited by R DS(on) 8 I D, Drain Current [A] 10 1 10 0 10 ms DC 1 ms 100 µs I D, Drain Current [A] 6 4 1. T C = 25 o C 2. T J = 150 o C 3. Single Pulse 10-1 10 0 10 1 10 2, Drain-Source Voltage [V] 2 0 25 50 75 100 125 150 T C, Case Temperature [ ] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature Z θ JC (t), Thermal Response 10 0 N otes : 0.2 1. Z θ JC (t) = 3.13 /W M ax. 2. D uty Factor, D =t 1 /t 2 0.1 3. T JM - T C = P DM * Z θ JC (t) 10-1 D=0.5 0.05 0.02 0.01 single pulse P DM t 1 t 2 10-5 10-4 10-3 10-2 10-1 10 0 10 1 t 1, S quare W ave P ulse D uration [sec] Figure 11. Transient Thermal Response Curve
12V 200nF 3mA 50KΩ 300nF Gate Charge Test Circuit & Waveform Same Type as DUT DUT 5V Q gs Q g Q gd Charge Resistive Switching Test Circuit & Waveforms R L 90% R G 5V DUT 10% t d(on) t r t d(off) tf t on t off Unclamped Inductive Switching Test Circuit & Waveforms L 1 E AS = ---- LI 2 2 AS BS -------------------- BS - I D BS I AS R G I D (t) 10V DUT (t) t p t p Time
Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + I SD _ L Driver R G Same Type as DUT dv/dt controlled by RG I SD controlled by pulse period ( Driver ) Gate Pulse Width D = -------------------------- Gate Pulse Period 10V I FM, Body Diode Forward Current I SD ( DUT ) di/dt I RM Body Diode Reverse Current ( DUT ) Body Diode Recovery dv/dt V SD Body Diode Forward Voltage Drop
Package Dimensions TO-252 (DPAK) (FS PKG Code 36) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: millimeters Part Weight per unit (gram): 0.33
Package Dimensions (Continued) 6.60 ±0.20 5.34 ±0.20 (0.50) (4.34) (0.50) IPAK 2.30 ±0.20 0.50 ±0.10 0.60 ±0.20 0.80 ±0.10 0.70 ±0.20 6.10 ±0.20 MAX0.96 0.76 ±0.10 1.80 ±0.20 9.30 ±0.30 16.10 ±0.30 2.30TYP [2.30±0.20] 2.30TYP [2.30±0.20] 0.50 ±0.10
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