.5A, DC/DC Switching Regulators Features General Description Operation from 3.0V to 40V Input Low Standby Current Current Limiting Output Switch Current to.5a Output Voltage Adjustable Frequency Operation to 00kHz Precision % Reference SOP- and PDIP- packages Lead Free Available (RoHS Compliant) Applications DC/DC Converters Ordering and Marking Information APW3403 Lead Free Code Handling Code Temp. Range Package Code The APW3403 is a monolithic control circuit containing the primary functions required for DC-to-DC converters. This device consists of an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active current limit circuit, driver and high current output switch. This device was specifically designed to be incorporated in Step-Down and Step-Up and Voltage-Inverting applications with a minimum number of external components. Pin Description Switch Collector Switch Emitter Timing Capacitor GND 3 4 5 Driver Collector IPK Sense VCC Comparator Inverting Input Package Code J : PDIP - K : SOP- Temp. Range C : 0 to 0 C Handling Code TU : Tube TR : Tape & Reel Lead Free Code L : Lead Free Device Blank : Original Device APW3403 J : APW3403 K : APW3403 XXXXX APW3403 XXXXX XXXXX - Date Code XXXXX - Date Code Note ANPEC lead-free products contain molding compounds/die attach materials and 00% matte tin plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-00C for MSL classification at lead-free peak reflow temperature. ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders.
Block Diagram Driver Collector Switch Collector S Q R Q Q IPK Sense 00 Switch Emitter IPK Oscillator CT VCC Comparator.5V Reference Regulator 3 Timing Capacitor Comparator Inverting Input 5 4 Gnd Absolute Maximum Ratings (Bottom View) Note : Symbol Parameter Value Unit V CC Power Supply Voltage 40 Vdc V IR Comparator Input Voltage Range -0.3 to +40 Vdc V C(Switch) Switch Collector Voltage 40 Vdc V E(Switch) Switch Emitter Voltage (VPIN=40V) 40 Vdc V CE(Switch) Switch Collector to Emitter Voltage 40 Vdc V C(driver) Driver Collector Voltage 40 Vdc I C(driver) Driver Collector Current (Note) 00 ma I SW Switch Current.5 A Power Dissipation P D PDIP- SOP-.5 5 W mw. Maximum package power dissipation limits must be observed.
Absolute Maximum Ratings (Cont.) Symbol Parameter Value Unit T J Operating Junction Temperature +50 C T A Operating Ambient Temperature Range 0 to +0 C T Stg Storage Temperature Range -5 to +50 C Thermal Characteristics Symbol Parameter Value Unit R θja Thermal Resistance Junction to Ambient PDIP- SOP- Electrical Characteristics V CC =5.0V, T A =T low to T high (Note), unless otherwise specified. Symbol Parameter Test Conditions Oscillator 00 0 APW3403 Min. Typ. Max. C/W F OSC Frequency V PIN5 = 0V, C T =.0nF, T A = 5 C 4 33 4 khz I chg Charge Current V CC = 5.0V to 40V, T A = 5 C 4 35 4 µa I dischg Discharge Current V CC = 5.0V to 40V, T A = 5 C 40 0 0 µa Discharge to Charge Current I dischg/ichg Ratio Pin to V CC, T A =5 C 5..5.5 V ipk(sense) Current Limit Sense Voltage I chg = I dischg, T A = 5 C 50 300 350 mv Output Switch (Note3) Saturation Voltage, Darlington I Connection SW =.0A, Pins, connected.0.3 Saturation Voltage (Note4) I SW =.0A, R PIN = Ω to VCC, 0.45 0. Forced β = 0 h FE DC Current Gain I SW =.0A, V CE = 5.0V, T A = 5 C 50 5 V CE(sat) I C(off) Collector Off-State Current V CE = 40V 0.0 00 µα Comparator V TH Threshold Voltage T A = 5 C.5.5.5 T A = T low to T high..9 Threshold Voltage Line Regulation V CC = 3.0V to 40V.4 5.0 mv I IB Input bias Current V IN = 0V -0-400 na Reg line Total Device I CC Supply Current V CC =5.0V to 40V, C T =.0nF, Pin= V CC, V pin5 > V IN, Pin=Gnd, remaining pins open Unit V V 4.0 ma 3
Electrical Characteristics (Cont.) Note :.T low =0 CV, T high =+0 C 3.Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. 4.If the output switch is driven into hard saturation (non-darlington configuration) at low switch currents ( 300mA) and high driver currents ( 30mA), it may take up to.0µs for it to come out of saturation. This condition will shorten the off time at frequencies 30kHz, and is magnified at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non-darlington configuration is used, the following output drive condition is recommended : IC output Forced β of output switch : 0 IC driver -.0mA* * The 00Ω resistor in the emitter of the driver device requires about.0ma before the output switch conducts. Typical Application Circuits Step-Up Converter 0µH L 0 S R Q Q Q 00 IN59 RSC 0. IPK Oscillator CT V 3 00 Comp..5V Reference Regulator CT 500pF 5 4 R 4k R.k 330 CO V/5mA.0µH 00 optional Filter 4
Typical Application Circuits (Cont.) External Current Boost Connections for IC Peak Greater than.5a R RSC RSC R 0 for constant External NPN Switch External NPN Saturated Switch (see Note5) Note : 5.If the output switch is driven into hard saturation (non-darlington configuration) at low switch currents ( 300mA) and high driver currents ( 30mA), it may take up to.0µs to come out of saturation. This condition will shorten the off time at frequencies 30kHz, and is magnified at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non-darlington configuration is used, the following output drive condition is recommended. Step-Down Converter S R Q Q Q R SC 0.33 I PK Oscillator C T V IN 5V 00 Comp..5V Reference Regulator IN59 3 C T 40pF L 0µH 5 4 R 3.k V OUT 5.0V/500mA R.k 40 C O.0µ H 00 V OUT 5 optional Filter
Typical Application Circuits (Cont.) External Current Boost Connections for IC Peak Greater than.5a RSC RSC External NPN Switch External PNP Saturated Switch Voltage Inverting Converter S R Q Q Q R SC 0.4 IPK Oscillator C T L µh 4.5V~.0V 00 VCC Comp..5V Reference Regulator 3 500 pf IN59 5 4 R.0µH R V OUT -V/00mA 953.k 000µf CO 00 optional Filter
Typical Application Circuits (Cont.) External Current Boost Connections for IC Peak Greater than.5a RSC External NPN Switch External PNP Saturated Switch Design Formula Table Calculation Set-Up Step-Down Voltage-Inverting ton / toff ton + toff toff Vout + VF - Vin(min) Vin(min) - Vsat Vout + VF Vin(min) - Vsat - Vout f IvoutI + VF Vin - Vsat ton (ton + toff) - toff (ton + toff) - toff (ton + toff) - toff CT 4.0 x 0-5 ton 4.0 x 0-5 ton 4.0 x 0-5 ton Iout(max)( +) ton Iout(max) Iout(max)( +) ton Ipk(switch) Rsc 0.3 / Ipk(switch) 0.3 / Ipk(switch) 0.3 / Ipk(switch) L(min) CO Vin(min) - VSat Vin(min) - VSat - Vout Vin(min) - VSat ( ) ( ton(max) )ton(max) ( ) ton(max) Ipk(switch) Ipk(switch) Ipk(switch) Ioutton Ipk(switch)(ton + toff) Ioutton 9 ton + toff ton toff f + toff Vripple(pp) ton + toff ton toff + Vripple(pp) 9 ton + toff ton toff f + toff Vripple(pp)
Design Formula Table (Cont.) Vsat = Saturation voltage of the output switch. VF = Forward voltage drop of the output rectifier. The following power supply characteristics must be chosen : Vin - Nominal input voltage. R Vout - Desired output voltage, IVoutI =.5 + R Iout - Desired output current. fmin - Minimum desired output switching frequency at the selected values of Vin and Io. Vripple(pp) - Desired peak-to-peak output ripple voltage. In practice, the calculated capacitor value will need to be increased due to its equivalent series resistance and board layout. The ripple voltage should be kept to a low value since it will directly affect the line and load regulation.
Packaging Information SOP- pin ( Reference JEDEC Registration MS-0) E H 0.05X45 e e D A A 0.004max. L Dim Millimeters Inches Min. Max. Min. Max. A.35.5 0.053 0.09 A 0.0 0.5 0.004 0.00 D 4.0 5.00 0.9 0.9 E 3.0 4.00 0.50 0.5 H 5.0.0 0. 0.44 L 0.40. 0.0 0.050 e 0.33 0.5 0.03 0.00 e.bsc 0.50BSC φ 0 0 9
Packaging Information PDIP- pin ( Reference JEDEC Registration MS-00) D E E A L A A E3 e e 3 e Dim Millimeters Inches Min. Max. Min. Max. A 5.33 0.0 A 0.3 0.05 A.9 3. 0.5 0.45 D 9.0 0. 0.355 0.400 e.54 BSC 0.00 BSC e 0.3 0.5 0.04 0.0 e3.4. 0.045 0.00 E. BSC 0.300 BSC E.0. 0.40 0.0 E3 0.9 0.430 L.9 3. 0.5 0.50 φ 5 REF 5 REF 0
Physical Specifications Terminal Material Solder-Plated Copper (Solder Material : 90/0 or 3/3 SnPb), 00%Sn Lead Solderability Meets EIA Specification RSI-9, ANSI/J-STD-00 Category 3. Reflow Condition (IR/Convection or VPR Reflow) T P Ramp-up tp Critical Zone T L to T P T L Temperature Tsmax Tsmin t L Ramp-down ts Preheat 5 t 5 C to Peak Classificatin Reflow Profiles Time Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Average ramp-up rate (T L to T P ) 3 C/second max. 3 C/second max. Preheat 00 C 50 C - Temperature Min (Tsmin) - 50 C 00 C Temperature Max (Tsmax) - 0-0 seconds 0-0 seconds Time (min to max) (ts) Time maintained above: - Temperature (T L ) - Time (t L ) 3 C 0-50 seconds C 0-50 seconds Peak/Classificatioon Temperature (Tp) See table See table Time within 5 C of actual Peak Temperature (tp) 0-30 seconds 0-40 seconds Ramp-down Rate C/second max. C/second max. Time 5 C to Peak Temperature minutes max. minutes max. Notes: All temperatures refer to topside of the package.measured on the body surface. (mm)
Classification Reflow Profiles(Cont.) Table. SnPb Entectic Process Package Peak Reflow Temperatures Package Thickness Volume mm 3 Volume mm 3 350 <350 <.5 mm 40 +0/-5 C 5 +0/-5 C.5 mm 5 +0/-5 C 5 +0/-5 C Table. Pb-free Process Package Classification Reflow Temperatures Package Thickness Volume mm 3 <350 Volume mm 3 350-000 Volume mm 3 >000 <. mm 0 +0 C* 0 +0 C* 0 +0 C*. mm.5 mm 0 +0 C* 50 +0 C* 45 +0 C*.5 mm 50 +0 C* 45 +0 C* 45 +0 C* *Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0 C. For example 0 C+0 C) at the rated MSL level. Reliability Test Program Test item Method Description SOLDERABILITY MIL-STD-3D-003 45 C, 5 SEC HOLT MIL-STD-3D-005. 000 Hrs Bias @5 C PCT JESD--B,A0 Hrs, 00%RH, C TST MIL-STD-3D-0.9-5 C~50 C, 00 Cycles ESD MIL-STD-3D-305. VHBM > KV, VMM > 00V Latch-Up JESD 0ms, tr > 00mA Carrier Tape & Reel Dimensions t E Po P P D W F Bo Ao D Ko
Carrier Tape & Reel Dimensions(Cont.) T J A C B T Application A B C J T T W P E 330 ± +.5.5+ 0.5 ± 0.5.4 ± 0. ± 0. ± 0. 3 ± 0..5±0. SOP- F D D Po P Ao Bo Ko t 5.5±.55 +0..55+ 0.5 4.0 ± 0..0 ± 0..4 ± 0. 5.± 0..± 0. 0.3±0.03 (mm) Cover Tape Dimensions Application Carrier Width Cover Tape Width Devices Per Reel SOP- 9.3 500 Customer Service Anpec Electronics Corp. Head Office : No., Dusing st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : -3-54000 Fax : -3-54050 Taipei Branch : F, No. 3, Lane 35, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : --993 Fax : --9939 3