Description. Features. Internal Block Digram. Plastic Package. Pin Connections

Transcription

1 Description The MCA Series is a monolithic control circuit containing the primary functions required for DC-to-DC converters. These devices consist of an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active current limit circuit, driver and high current output switch. This series was specifically designed to be incorporated in Step-Down and Step-Up and Voltage-Inverting applications with a minimum number of external components. Features Operation from 3.0 V to 40 V Input Low Standby Current Current Limiting Output Switch Current to 1.5 A Output Voltage Adjustable Frequency Operation to 100 khz Precision 2% Reference Plastic Package Pin Connections Internal Block Digram Driver Collector 8 1 S Q Q2 Switch Collector I pk Sense V CC Comparator Inverting Input I pk Oscillator Comparator C T R V Reference Q Switch Emitter Timing Capacitor Gnd 1

2 Absolute Maximum Ratings Symbol Parameter Maximum Units V CC Power Supply Voltage 40 Vdc V IR Comparator Input Voltage Range -0.3 to +40 Vdc V C(switch) Switch Collector Voltage 40 Vdc V E(switch) Switch Emitter Voltage (V PIN1 = 40 V) 40 Vdc V CE(switch) Switch Collector to Emitter Voltage 40 Vdc V C(driver) Driver Collector Voltage 40 Vdc I C(driver) Driver Collector Current (Note 1) 100 ma I SW Switch Current 1.5 A T J Operating Junction Temperature +150 C T A Operating Ambient Temperature Range 0 to +70 C Tstg Storage Temperature Range -65 to +150 C Electrical Characteristics (Vcc=5.0V, Ta=Tlow specified) to Thigh, unless otherwise Characteristics Symbol Min Typ Max Units OSCILLATOR Frequency (V pin5 = 0V, C T = 1.0 nf, T A = 25 C) fosc khz Charge Current(V CC = 5.0V to 40V, T A = 25 C) Ichg µa Discharge Current (V CC = 5.0V to 40V, T A = 25 C) Idischg µa Discharge to Charge Current Ratio (Pin 7 to V CC, T A = 25 C) Idischg / I chg Current Limit Sense Voltage (I chg = I dischg, T A = 25 C) Vipk(sence) mv OUTPUT SWITCH (NOTE 2) Saturation Voltage, Darlington Connection (I SW = 1.0 A, Pins 1, 8 connected) V CE(sat) V Saturation Voltage, Darlington Connection (I SW = 1.0 A, R pin 8 = 82Ω to V CC, Forced β 20) VCE(sat) V DC Current Gain (I SW = 1.0 A, V CE = 5.0 V, T A = 25 C) hfe Collector Off-State Current (V CE = 40 V) I C(off) µa COMPARATOR Threshold Voltage (T A=25 C) (T A =T low to T high) Threshold Voltage Line Regulation (Vcc=3.0 V to 40 V) Input Bias Current (Vin=0 V) TOTAL DEVICE Supply Current (Vcc = 5.0 V to 40 V, C T = 1.0 nf, Pin 7 = V CC, Vpin 5 > Vth, Pin 2 = Gnd, remaining pins open) Vth Reg line mv I IB na I CC 4.0 ma V NOTES : 1.Maximum package power dissipation limits must be observed. 2.Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible 2

3 Typical Performance Characteristics Figure 1. Output Switch On-Off Time versus Oscillator Timing Capacitor Figure 2. Timing Capacitor Waveform A Figure 3. Emitter Follower Configuration Output Figure 4. Common Emitter Configuration Saturation Voltage versus Emitter Current Output Switch Saturation Voltage versus Collector Current Figure 5. Current Limit Sense Voltage versus Temperature Figure 6. Standby Supply Current versus Supply Voltage 3

4 Typical Applications Circuit Figure 1. Step-Up Converte.r Note: R to 0 for constant Vin Figure 2a. External NPN Switch. Figure 2. External Current Boost Connections for I P Figure 2b. External NPN Saturated Switch. eak Greater than 1.5.A 4

5 Figure 3. Step-Down Converte.r Figure 4a. External NPN Switch. Figure 4. External Current Boost Connections for I P Figure 4b. External PNP Suturated Switch. eak Greater than 1.5.A 5

6 Figure 5. Voltage Inverting Converte.r Figure 6a. External NPN Switch. Figure 6. External Current Boost Connections for I P Figure 6b. External PNP Saturated Switch. eak Greater than 1.5.A 6

7 Design Formula Table Calculation Step-Up Step-Down Voltage-Inverting t on/t off out (t on+t off)max 1 V + in V +V F out inv (min) in V V sat V V (min) sat outv f 1 f in V +V F +V sat C T 4.0 x 10-5 t on 4.0x10-5 t on 4.0 x 10-5 l pk(switch) 2 t I +1 2I (max) 2 on out(max) I R SC 0.3/l pk(switch) 0.3/l pk(switch) 0.3/l pk(switch) L (min) V in(min) V sat V in sat V t on(max) V in(min) V sat V out on (max) I I pk (switch) I pk (switch ) pk (switch) C O 9 I outt on I pk ( switch ) + ) ti ( t t 9 V ripple( pp ) 8V ripple ( pp ) V ripple( pp ) 1 minf ont +1 t on(max) TERMS AND DEFINITIONS V sat - Saturation voltage of the output switch. V F - Forward voltage drop of the output rectifier. The following power supply characteristics must be chosen: V out = R R V in - Nominal input voltage. V out - Desired output voltage, I out - Desired output current. f min - Minimum desired output switching frequency at the selected values of V in and I O. V ripple(p-p) Desired peack-to-peack output ripple voltage. In practice, the calculated capacitor value will need to be increased due to its equivalent series resistance and board layout. The ripple voltage should be kept to a low value since it will directly affect the line and load regulation. Ordering Information ORDERING NUMBER PACKAGE MARKING A SOP-8 /DIP-8 MCA Address : 6A06--6A07 Rm 6A07,Changyin Office Building,No.88,Yong Ding Road,Hai Dian District,Beijing Postalcode: Tel: / 81 / 82 / 83 / 84 Fax : sales@estek.com.cn REV No: