Issued: Friday, Oct. 16, 2015 PROBLEM SET #7 Due (at 8 a.m.): Monday, Oct. 26, 2015, in the EE 140/240A HW box near 125 Cory. 1. A design error has resulted in a mismatch in the circuit of Fig. PS7-1. Specifically, M 2 has twice the W/L ratiio of M 1. If V id is a small sine-wave signal, find an expression for (a) I D1 and I D2. (b) V OV for each of M 1 and M 2. (c) The differential gain A dm in terms of R D, I, and V OV. Fig. PS7-1 (a) I D1 = 1 2 Kn W L (V GS1 V t ) 2 ; I D2 = 1 2 Kn (2 W L )(V GS2 V t ) 2 Since V GS V t is equal for both transistors: => I D1 I D2 = 1 2 But I = I D1 + I D2 => 2I D1 = I I D2, I D1 = I/3, I D2 = 2I/3 (b) V OV = V GS V t, V OV1 = V OV2 = V OV For Q 1 : I 3 = 1 2 Kn ( W L ) V ov 2 => V OV = 2 3 I Kn W/L (c) g m = 2ID g V m1 = 2I, g OV 3V m2 = 4 I = 2g OV 3 V m1 OV Current flows through the 2 transistors M1 and M2 is: i D1 = i D2 = V id 1 + 1 = g m1 g m2 2 3 g m1v id
V o+ V o = 2i D1 R D = 4 3 g m1v id R D = => V O2 V O1 V id = 8 9 I V OV R D 8 9 I V OV R D V id
2. The differential amplifier in Fig. PS7-2 utilizes a resistor R SS to esiablish a 1-mA dc bias current. Note that this amplifier uses a single 5-V supply and thus needs a dc common-mode voltage V CM. Transistors M 1 and M 2 have k W/L= 2.5mA/V 2, V t =0.7V, and λ=0. (a) Find the required value of V CM. (b) Find the value of R D that results in a differential gain A dm of 8 V/V. (c) Determine the dc voltage at the drains (d) Determine the common-mode gain v D /v CM and CMRR for this amplifier. (Hint: You need to take 1/g m into account.) (e) Use the common-mode gain found in (d) to determine the change in V CM that results in M 1 and M 2 entering the triode region. Fig. PS7-2
(a) I D1 = I D2 = 1mA 2 = 0.5mA ; I D = 1 2 Kn W L. V ov 2 => 0.5m = 1 2 2.5m V ov 2 V ov = 0.632V V ov = V GS V t = V GS 0.7 V GS = 0.632 + 0.7 = 1.332V To obtain 1mA over R SS = 1kΩ V S = 1m 1K = 1V V CM = V S + V GS = 1 + 1.332 = 2.332V (b) g m = I = 1mA ma = 1.6 ; E V OV 0.632V V fn. (7.45): A d = g m. R D ; For A d = 8 v ; R v D = 8 = 5kΩ 1.6m (c) At the drains: V D1 = V D2 = 5V 1mA 5kΩ = +2.5V (d) V o1 V icm = R D 1 = A cm = ΔV D = gm +2R SS ΔV cm 2 5k 1 1.6m +2 1K = 1.9 v v (e) On the edge of the triode region: V G V D = V t If: V G V D = V t => V CM + ΔV CM V D + ΔV CM A CM = V t. 2.332 + ΔV CM 2.5 + ΔV CM. 1.9 = 0.7 2.9ΔV CM = 0.868 ΔV CM = 0.3V
3. Fig. PS7-3 shows a high-gain op amp design with cascade devices. Let I SS = 1mA, V B1 = 1.7V and V B2 = 1.6V. Assuming γ = 0, find the mid-band gain v out /v in, input commonmode range, and the output swing. MOS Parameters: μ n C ox = 135μA V 2, μ p C ox = 38μA V 2 V Tn = 0.7 V, V Tp = 0.8 V, λ n = λ p = 0.1, ( W L ) 1,2,3,4 = 100μm 0.34μm, (W L ) = 100μm 5,6,7,8 0.32μm Fig. PS7-3
( W L ) 1 8 = 100 0.5, I ss = 1mA, V B1 = 1.7V, γ = 0 (a) V in,cm,min = V ISS + V Gs1 = V ISS + V THN + V OD1 where V ISS is the vottage across I SS. V in,cm,max = V Y + V TH1 ; V Y = V B1 V GS3 = V B1 V TH3 V OD3 V in,cm,max = V B1 V TH3 V OD3 + V TH1 ; assume V TH3 = V TH1, V in,cm,max = V B1 V OD3 To calculate V OD3, I D3 = 1 2 μ nc ox ( W L ) 3 (V GS V TH ) 2 (1 + λv DS ), assume λ 0 V OV3 = V GS3 V TH = [ 2I D3 μ n C ox ( W L eff ) V in,cm,max = 1.7 0.159 = 1.541V (b) V o,max = V b2 V THp = 2.4V ] 1 2 = [ 2(0.5mA) 350(383.6 10 9 )( 100 )] 0.34 1 2 = 0.159V V o,min = V b1 V THn = 1V (c) r op = r on = 1 λi D = 20k, g m1 = 2k n I d = 2(3.97e 2 )0.5e 3 = 6.3mS, g m2 = 2k p I d = 2(1.19e 2 )0.5e 3 = 3.44mS. use G m model: G m = g m1, R out = g mn r o 2 //g mp r o 2 =2.5M//1.37M = 0.88M Gain = G m R out = 5.57k
4. Fig. PS7-4 shows a two-stage CMOS op amp. Let I REF = 90μA, V DD = V SS = 2.5V, and C C = 0. Find the mid-band gain v O /(v + v ), input common-mode range, and the output swing. MOS Parameters: μ n C ox = 160μA V 2, μ p C ox = 40μA V 2, V Tn = 0.7 V, V Tp = 0.8 V, λ n = λ p = 0.1, ( W L ) 1,2 = 20μm 0.8μm, (W L ) 3,4 = 5μm 0.8μm, (W L ) 5,7,8 = 40μm 0.8μm, (W L ) 6 = 10μm 0.8μm Fig. PS7-4
Since Q 8 and Q 5 are matched, I = I REF. Thus Q 1, Q 2, Q 3, and Q 4 each conducts a current equal to I/2 = 45μA. Since Q 7 is matched to Q 5 and Q 8, the current in Q 7 is equal to I REF = 90μA. Finally, Q 6 conducts an equal current of 90μA. The voltage gain of the first stage is determined from: A 1 = g m2 (r 02 r o4 ) = 0.3(222 222) = 33.3V/V. The voltage gain of the second stage is determined from A 2 = g m6 (r 06 r o7 ) = 0.6(111 111) = 33.3V/V. Thus the overall dc open-loop gain is A O = A 1 A 2 = ( 33.3) ( 33.3) = 1109V/V or 20 log1109=61 db. The lower limit of the input common-mode range is the value of input voltage at which Q 1 and Q 2 leave the saturation region. This occurs when the input voltage falls below the voltage at the drain of Q 1 by V IP volts. Since the drain if Q 1 is at -2.5+1=-1.5 V, then the lower limit of the input common-mode range is -2.3 V. The upper limit of the input common-mode range is the value of input voltage at which Q 5 leaves the saturation region. Since for Q 5 to operate in saturation the voltage across it (i.e., V SD5 ) should at least be equal to the overdrive voltage at which it is operating (i.e., 0.3V), the highest voltage permitted at the drain of Q5 should be +2.2 V. It follows that the highest value of v ICM should be v ICMmax = 2.2 1.1 = 1.1 V. The highest allowable output voltage is the value at which Q 7 leaves the saturation region, which is V DD V OV7 = 2.5 0.3 = 2.2V. The lowest allowable output voltage is the value at which Q6 leaves saturation, which is V SS + V OV6 = 2.5 + 0.3 = 2.2 V. Thus, the output voltage range is -2.2 V to +2.2 V.
5. Fig. PS7-5 shows a multi-stage BJT OPAmp design. BJTs Q 1 Q 9 have the same size except for Q 6, which is 4x larger than Q 9. Ignore Early effect. (a) Assuming β 1 and V BE = 0.7V, calculate the DC currents flowing through Q 1 Q 9. (b) Calculate the static power dissipation of this op amp. (c) If transistors Q 1 and Q 2 have β = 100, what is the input bias current of this op amp? (d) If V CE(sat) = 0.4V, determine the input common-mode range of this op amp. (e) Calculate the input resistance, mid-band gain v o /v id, and the output resistance of this op amp. Fig. PS7-5
(a) (b) To calculate the power dissipated in the circuit in the quiescent state (i.e., with zero input signal) we simply evaluate the dc current that the circuit draws from each of the two power supplies. From the +15-V supply the dc current is I + = 0.25 + 0.25 + 1 + 1 + 1 + 5 = 8.5 ma. Thus the power supplied by the positive power supply is P + = 15 X 8.5 = 127.5 mw. The 15-V supply provides a current I - given by I - =0.5+0.5+2+1+5=9mA. Thus the power provided by the negative supply is P - =15X9=135mW. Adding P + and P - provides the total power dissipated in the circuit P D : P D = P + + P - =262.5mW. (c) The input bias current of the op amp is the average of the dc currents that flow in the two input terminals (i.e., in the bases of Q 1 and Q 2 ). These two currents are equal (because we have assumed matched devices); thus the bias current is given by I B = I E1 β+1 2.5μA. (d) The upper limit on the input common-mode voltage is determined by the voltage at which Q 1 and Q 2 leave the active mode and enter saturation. This will happen if the input voltage exceeds the collector voltage, which is +10 V, by about 0.4 V. Thus the upper limit of the common-mode range is +10.4 V. The lower limit of the input commom-mode range is determined by the voltage at which Q 3 leaves the active mode and thus ceases to act as a constant-current source. This will happen if the collector voltage of Q 3 goes below the voltage at its base, which
is 14.3 V, by more than 0.4V. It follows that the input common-mode voltage should not go lower than -14.7-0.7=-14V. Thus the common-mode range is -14V to +10.4V. (e) The input differential resistance R id is given by R id = r π1 + r π2. Since Q1 and Q2 are each operating at an emitter current of 0.25 ma, it follows that r e1 = r e2 = 25 = 100Ω. Assume β = 100; then r 0.25 π1 = r π2 = 101 100 = 10.1 kω. Thus R id = 20.2 kω. To evaluate the gain of the first stage we first find the input resistance of the second stage, R i2, R i2 = r π4 + r π5. Q 4 and Q 5 are each operating at an emitter current of 1 ma; thus r e4 = r e5 = 25Ω, r π4 = r π5 = 101 25 = 2.525kΩ. Thus R i2 = 5.05 kω. This resistance appears between the collectors of Q 1 and Q 2, as shown in Fig. 7.45. Thus the gain of the first stage will be A 1 = v o1 [R i2 (R 1 +R 2 )] r e1 +r e2 = (5.05 kω 40 kω) 200 Ω v id = = 22.4V/V. Total resistance in collector circuit Total resistance in emitter circuit = Fig. 2 shows an equivalent circuit for calculating the gain of the second stage. As indicated, the input voltage to the second stage is the output voltage of the first stage. Also shown is the resistance R i3, which is the input resistance of the third stage formed by Q 7. The value of R i3 can be found by multiplying the total resistance in the emitter of Q 7 by (β+1): R i3 = (β + 1)(R 4 + r e7 ). Since Q 7 is operating at an emitter current of 1 ma, r e7 = 25 1 = 25 Ω, R i3 = 101 2.325 = 234.8 kω. Fig. 2 We can now find the gain A 2 of the second stage as the ratio of the total resistance in the collector circuit to the total resistance in the emitter circuit: A 2 = v o1 (R 3 R i3 ) r e4 +r e5 (3 kω 234.8 kω) = = 59.2 V/V. 50 Ω v o2 = To obtain the gain of the third stage we refer to the equivalent circuit shown in Fig. 3, where R i4 is the input resistance of the output stage formed by Q 8. Using the resistance-reflection rule, we calculate the value of R i4 as R i4 = (β + I)(r e8 + R 6 ) where r e8 = 25 5 = 5 Ω, R i4 = 101(5 + 3000) = 303.5 kω..
Fig. 3 Fig. 4. The gain of the third stage is given by A 3 = v o3 = (R 5 R i4 ) = v o2 r e7 +R 4 (15.7 kω 303.5 kω) 2.325 kω 6.42 V/V. Finally, to obtain the gain A 4 of the output stage we refer to the equivalent circuit in Fig. 4 and write A 4 = v o v o3 = R 6 R 6 +r e8 = 3000 3000+5 = 0.998 1. The overall voltage gain of the amplifier can then be obtained as follows: v o v id = A 1 A 2 A 3 A 4 = 8513V/V or 78.6 db. To obtain the output resistance R o we grab hold of the output terminal in Fig. 4 and look back into the circuit. By inspection we find R o = R 6 [r e8 + R 5/ (β + 1)] which gives R o =152 Ω. =