Dual Operational Amplifier and Reference Regulator FP13 General Description The FP13 is a single chip composed of one independent OP-AMP (OPA2) and another OP-AMP (OPA1) with a 2.5V precision voltage reference on non-inverting input. It offers space and low cost in many applications such as the secondary feedback control of power supply, DC/DC converter or adaptor. The FP13 is designed for regulator feedback circuit with few external components. The circuit diagram for typical application is shown as below. Features Fixed Reference Voltage: 2.5V Reference Voltage Precision: 1% Output Sink Current up to 1mA Low Quiescent Supply Current Wide Operating Voltage Range: 3~32V (+ / -16V) Low Input Offset Voltage Unit Gain Bandwidth:.9MHz Package: SOP-8L Typical Application Circuit Va V IN Va Va OPA1 OPA2 FB V O V REF PWM Control Board AC-DC Adaptor Secondary Feedback Circuits 1/9
Function Block Diagram V O1 REGULATOR V CC OPA1 V I1 V O2 OPA2 V NI1 V I2 V REF V EE V NI2 Pin Descriptions SOP-8L FP13 9Fa-86L Name No. I / O Description V O 1 1 O OPA1 Output V I 1 2 I OPA1 Inverting Input V NI 1 3 I OPA1 Non-inverting Input V EE 4 P IC Ground or Negative Supply Voltage V NI 2 5 I OPA2 Non-inverting Input V I 2 6 I OPA2 Inverting Input V O 2 7 O OPA2 Output V CC 8 P Positive Supply Voltage 2/9
Marking Information FP13 Halogen Free Lot Number Internal ID Per-Half Month Year Halogen Free: Halogen free product indicator Lot Number: Wafer lot number s last two digits For Example: 132386TB 86 Internal ID: Internal Identification Code Per-Half Month: Production period indicated in half month time unit For Example: January A (Front Half Month), B (Last Half Month) February C (Front Half Month), D (Last Half Month) Year: Production year s last digit 3/9
Ordering Information Part Number Operating Temperature Package MOQ Description FP13DR-LF -2 C ~ +85 C SOP-8L 25 EA Tape & Reel Absolute Maximum Ratings Parameter Symbol Conditions Min. Typ. Max. Unit Power Supply Voltage V CC 36 V Differential Input Voltage V ID 36 V Input Voltage V I -.3 36 V Maximum Junction Temperature T J 15 C Thermal Resistance Junction to Ambient Power Dissipation (SOP-8L package) SOP-8L Package +175 C / W T A =25 65 mw T A =7 55 mw Operating Temperature (T MIN ~ T MAX ) -25 +85 C Storage Temperature Range -65 +15 C Lead Temperature (Soldering, 1 sec) +26 C Suggested IR Re-flow Soldering Curve 4/9
Recommended Operating Conditions Parameter Symbol Conditions Min. Typ. Max. Unit Supply Voltage V CC 3 3 V Operating Temperature -2 85 C DC Electrical Characteristics Parameter Symbol Conditions Min. Typ. Max. Unit Operating Amplifier1 Input Offset Voltage V io 1 4 5 Input Offset Voltage Drift DV io 7 μv / Input Bias Current (negative input) I ib 2 na Large Signal Voltage Gain A vd V CC =15V V ICM =V, R L =2K 1 V / Supply Voltage Rejection Ratio SVR V CC =5V to 3V V ICM =V 65 1 db Output Current Source I source V CC =15V V id =+1V, V O =2V 3 5 ma Short Circuit to Ground I o V CC =15V 5 7 ma Output Current Sink I sink V CC =15V V id =-1V, V O =2V 8 1 ma V CC =3V, R L =1K High Level Output Voltage Low Level Output Voltage Slew Rate at Unity Gain Gain Bandwidth Product Total Harmonic Distortion Operating Amplifier2 Input Offset Voltage V OH V OL SR GBP THD V io R L =1K, Vcc=15V, Vi=.5 to 2V R L =2K, C L =1pF Unity Gain V CC =3V, R L =2K C L =1pF, f=1khz, V in =1 V CC =3V, R L =2K C L =1pF, f=1khz, A V =2dB, V O =2V PP. 27 27 28 V 3 2 2.2.4 V / μs.5.9 MHz.2 % 1 4 5 Input Offset Voltage Drift DV io 7 mv / Input Offset Current Input Bias Current Large Signal Voltage Gain I io I ib A vd V CC =15V, R L =2K, V O =1.4V to 11.4V 5 25 2 3 5 2 15 2 1 na na V / 5/9
Parameter Symbol Conditions Min. Typ. Max. Unit Supply Voltage Rejection Ratio SVR V CC =5V to 3V 65 1 db Input Common Mode Voltage Range V icm V CC =3V, V CC -1.5 V CC -2 Common Mode Rejection Ratio CMRR 7 85 6 db Output Current Source I V CC=+15V, SOURCE V O =2V, V id =+1V 3 5 ma Short Circuit to Ground I o V CC =+15V, 5 7 ma Output Current Sink I SINK V ID =-1V, V CC =+15V, V O =2V 7 1 ma V CC =3V High Level Output Voltage Low Level Output Voltage Slew Rate at Unity Gain Gain Bandwidth Product Total Harmonic Distortion Voltage Reference V OH V OL SR GBP THD, R L =1K R L =1K V CC =15V, Vi=.5 to 3V, R L =2K, C L =1pF, Unity Gain V CC =3V, R L =2K C L =1pF, f=1khz, V in =1 V CC =3V, R L =2K, C L =1pF, f=1khz A V =2dB, V O =2V PP 27 27 V 28 V 3 2 2.2.4 V / μs.5.9 MHz.2 % Cathode Current I k 1 1 ma Reference Input Voltage Reference Input Voltage Deviation Over Temperature Range Minimum Cathode Current for Regulation V REF ΔV REF Dynamic Impedance (note 1) Z KA Total Supply Current Total Supply Current, Excluding Current in the Voltage Reference. 2.475 2.45 2.5 2.525 2.55 V KA =V REF, I K =1mA 7 3 I MIN V KA =V REF.2 1 ma I CC V KA =V REF, ΔI K =1 to1ma, f<1khz V CC =5V, no load T MIN <T AMB <T MAZ V CC =3V, no load T MIN <T AMB <T MAX V.2.5 Ω.7.7 1.2 2 ma Note 1: The dynamic impedance is defined as Z KA =ΔV KA /ΔI K 6/9
Typical Operating Characteristics 258 REFERENCE VOLTAGE FREE-AIR TEMPERATURE 75 REFERENCE CURRENT REFERENCE VOLTAGE Vref- Reference Voltage - 256 254 252 25 248 246 244 VKA=VREF IKA=1mA Iref Reference Current - ma 5 25-25 -5 VKA=VREF TA=25? 242-75 24-75 -5-25 25 5 75 1 125 TA - Free-Air Temperature - o C -1-2 -1 1 2 3 Vref-Reference Voltage-V.9 POWER SUPPLY VOLTAGE POWER SUPPLY CURRENT 2.518 POWER SUPPLY VOLTAGE REFERENCE VOLTAGE.8 VKA=VREF Icc - Power Supply Current - ma.7.6.5.4.3.2 Vref Reference Voltage - V 2.517 2.516 2.515 IKA=1mA.1 5 1 15 2 25 3 5 1 15 2 25 3 35 Vcc+ - Power Supply Voltage - V Vcc+-Power Supply Voltage-V 3 POWER SUPPLY VOLTAGE LOW LEVEL OUTPUT VOLTAGE 6. OUTPUT CURRENT OUTPUT LOW LEVEL VOLTAGE 25 4. Vol - Low Level Output Voltage - 2 15 1 5-5 Vol - Output Low Level Voltage - 2. -2. -4. -6. -1 5 1 15 2 25 3-8. -2. -1.8-1.6-1.4-1.2-1. -.8 -.6 -.4 -.2 Vcc+ - Power Supply Voltage - V 7/9
3 OUTPUT CURRENT OUTPUT HIGH LEVEL VOLTAGE.8 CATHODE CURRENT CATHODE VOLTAGE VoH - High Level Output Voltage - V 2 1 I K - Cathode Current - ma A.7.6.5.4.3.2.1 V KA = Vref TA = 25 o C Imin -.1-1 -6-55 -5-45 -4-35 -3-25 -2-15 -1-5 -.2-1 1 2 3 Iout - Output Current - ma V K - Cathode Voltage - V A 8/9
Package Outline SOP-8L Symbols Min. (mm) Max. (mm) A 1.346 1.752 A1.11.254 A2 1.92 1.498 D 4.8 4.978 E 3.81 3.987 H 5.791 6.197 L.46 1.27 θ 8 Note: 1. Package dimensions are in compliance with JEDEC Outline: MS-12 AA. 2. Dimension D does not include molding flash, protrusions or gate burrs. 3. Dimension E does not include inter-lead flash, or protrusions. 9/9