MCR682 Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed for overvoltage protection in crowbar circuits. Features lass-passivated Junctions for reater Parameter Stability and Reliability Center-ate eometry for Uniform Current Spreading Enabling High Discharge Current Small Rugged, Thermowatt Package Constructed for Low Thermal Resistance and Maximum Power Dissipation and Durability High Capacitor Discharge Current, 300 mps PbFree Package is vailable* MXIMUM RTINS (T J = 25 C unless otherwise noted) Rating Symbol alue Unit Peak Repetitive OffState oltage (Note ) (T J = 40 to +25 C, ate Open) MCR682 DRM, RRM 50 Peak Discharge Current (Note 2) I TM 300 On-State RMS Current (80 Conduction ngles; T C = 85 C) verage On-State Current (80 Conduction ngles; T C = 85 C) Peak Non-Repetitive Surge Current (/2 Cycle, Sine Wave, 60 Hz, T J = 25 C) I T(RMS) 2 I T() 8.0 I TSM 0 Circuit Fusing Considerations (t = 8.3 ms) I 2 t 40 2 s Forward Peak ate Current (t.0 s, T C = 85 C) Forward Peak ate Power (t.0 s, T C = 85 C) Forward verage ate Power (t = 8.3 ms, T C = 85 C) I M P M 20 W P () W Operating Junction Temperature Range T J 40 to +25 C Storage Temperature Range T stg 40 to +50 C Mounting Torque 8.0 in. lb. Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. DRM and RRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. 2. Ratings apply for t w = ms. See Figure for I TM capability for various duration of an exponentially decaying current waveform, t w is defined as 5 time constants of an exponentially decaying current pulse. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 2 3 2 3 SCRs 2 MPERES RMS 50 OLTS Y WW K TO220B CSE 2207 STYLE 3 = ssembly Location = Year = Work Week = PbFree Package = Diode Polarity MRKIN DIRM Y WW MCR682 K ORDERIN INFORMTION Device Package Shipping MCR682 TO220B 500 Units / Box MCR682 TO220B (PbFree) 500 Units / Box Preferred devices are recommended choices for future use and best overall value. PIN SSINMENT Cathode node ate 4 node K Semiconductor Components Industries, LLC, 2005 December, 2005 Rev. 2 Publication Order Number: MCR68/D
MCR682 THERML CHRCTERISTICS Characteristic Symbol Max Unit Thermal Resistance, JunctiontoCase R JC C/W Thermal Resistance, Junctiontombient R J 60 C/W Maximum Lead Temperature for Soldering Purposes /8 from Case for Seconds T L 260 C ELECTRICL CHRCTERISTICS (T C = 25 C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit OFF CHRCTERISTICS Peak Repetitive Forward or Reverse Blocking Current ( K = Rated DRM or RRM, ate Open) T J = 25 C T J = 25 C ON CHRCTERISTICS Peak Forward On-State oltage (I TM = 24 ) (Note 3) (I TM = 300, t w = ms) (Note 4) ate Trigger Current (Continuous dc) ( D = 2, R L = 0 ) ate Trigger oltage (Continuous dc) ( D = 2, R L = 0 ) ate NonTrigger oltage ( D = 2 dc, R L = 0, T J = 25 C) Holding Current ( D = 2, Initiating Current = 200 m, ate Open) Latching Current ( D = 2 dc, I = 50 m) ate Controlled Turn-On Time (Note 5) ( D = Rated DRM, I = 50 m) (I TM = 24 Peak) DYNMIC CHRCTERISTICS Critical Rate-of-Rise of Off-State oltage ( D = Rated DRM, ate Open, Exponential Waveform, T J = 25 C) I DRM, I RRM TM 6.0 2.2 m I T 7.0 30 m T 0.65.5 D 0.40 I H 3.0 5 50 m I L 60 m t gt.0 s dv/dt / s Critical Rate-of-Rise of On-State Current di/dt 75 / s I = 50 m T J = 25 C 3. Pulse duration 300 s, duty cycle 2%. 4. Ratings apply for t w = ms. See Figure for I TM capability for various durations of an exponentially decaying current waveform. t w is defined as 5 time constants of an exponentially decaying current pulse. 5. The gate controlled turn-on time in a crowbar circuit will be influenced by the circuit inductance. 2
MCR682 oltage Current Characteristic of SCR + Current node + Symbol DRM I DRM RRM I RRM TM I H Parameter Peak Repetitive Off State Forward oltage Peak Forward Blocking Current Peak Repetitive Off State Reverse oltage Peak Reverse Blocking Current Peak On State oltage Holding Current I RRM at RRM on state Reverse Blocking Region (off state) Reverse valanche Region TM I H + oltage I DRM at DRM Forward Blocking Region (off state) node I TM, PEK DISCHRE CURRENT (MPS) 00 300 200 0 I TM 50 t w t w = 5 time constants 20.0 5.0 20 50 t w, PULSE CURRENT DURTION (ms) NORMLIZED PEK CURRENT.0 0.6 0.4 0 25 50 75 0 25 T C, CSE TEMPERTURE ( C) Figure. Peak Capacitor Discharge Current Figure 2. Peak Capacitor Discharge Current Derating T C, MXIMUM CSE TEMPERTURE ( C) 25 20 5 5 0 95 90 85 80 75 dc Half Wave.0 5.0 8.0 I T(), ERE ON-STTE CURRENT (MPS) P (), ERE POWER DISSIPTION (WTTS) 20 8 4 8.0 4.0 Half Wave dc T J = 25 C.0 4.0 5.0 8.0 I T(), ERE ON-STTE CURRENT (MPS) Figure 3. Current Derating Figure 4. Maximum Power Dissipation 3
MCR682 r(t), TRNSIENT THERML RESISTNCE(NORMLIZED) 0.7 0. 0.07 0.05 0.03 0.02 0.0 0. 2 3 5 20 30 50 t, TIME (ms) 0 Z JC(t) = R JC r(t) 200 300 500 k 2 k 3 k 5 k k Figure 5. Thermal Response NORMLIZED TE TRIER CURRENT 5.0 3.0.0 60 40 20 D = 2 olts R L = 0 0 20 40 60 80 0 20 T J, JUNCTION TEMPERTURE ( C) 40 NORMLIZED TE TRIER OLTE.4.2.0 60 40 20 0 20 40 60 D = 2 olts R L = 0 80 T J, JUNCTION TEMPERTURE ( C) 0 20 40 Figure 6. ate Trigger Current Figure 7. ate Trigger oltage 3.0 NORMLIZED HOLD CURRENT.0 D = 2 olts I TM = 0 m 60 40 20 0 20 40 60 80 0 T J, JUNCTION TEMPERTURE ( C) 20 40 Figure 8. Holding Current 4
MCR682 PCKE DIMENSIONS TO220B CSE 2207 ISSUE B F T C T SETIN PLNE S NOTES:. DIMENSIONIN ND TOLERNCIN PER NSI Y4.5M, 982. 2. CONTROLLIN DIMENSION: INCH. 3. DIMENSION Z DEFINES ZONE WHERE LL BODY ND LED IRREULRITIES RE LLOWED. H Q Z L 4 2 3 N D K U R J INCHES MILLIMETERS DIM MIN MX MIN MX 70 0.620 4.48 5.75 B 80 0.405 9.66.28 C 0.60 0.90 4.07 4.82 D 0.025 0.035 0.64 8 F 0.42 0.47 3.6 3.73 0.095 0.5 2.42 2.66 H 0. 0.55 2.80 3.93 J 0.04 0.022 6 5 K 00 62 2.70 4.27 L 0.045 0.060.5.52 N 0.90 4.83 5.33 Q 0.0 0 2.54 3.04 R 0.080 0. 4 2.79 S 0.045 0.055.5.39 T 35 55 5.97 6.47 U 0.000 0.050 0.00.27 0.045.5 Z 0.080 4 STYLE 3: PIN. CTHODE 2. NODE 3. TE 4. NODE ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICTION ORDERIN INFORMTION LITERTURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 632, Phoenix, rizona 8508232 US Phone: 48082977 or 8003443860 Toll Free US/Canada Fax: 4808297709 or 8003443867 Toll Free US/Canada Email: orderlit@onsemi.com N. merican Technical Support: 8002829855 Toll Free US/Canada Japan: ON Semiconductor, Japan Customer Focus Center 29 Kamimeguro, Meguroku, Tokyo, Japan 53005 Phone: 8357733850 5 ON Semiconductor Website: Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MCR68/D