3GPP TS V8.0.0 ( )

Transcription

1 TS V8.0.0 ( ) Techical Specificatio 3rd Geeratio Partership Project; Techical Specificatio Group Radio Access Network; Spreadig ad modulatio (FDD) (Release 8) The preset documet has bee developed withi the 3 rd Geeratio Partership Project ( TM ) ad may be further elaborated for the purposes of. The preset documet has ot bee subject to ay approval process by the Orgaisatioal Parters ad shall ot be implemeted. This Specificatio is provided for future developmet work withi oly. The Orgaisatioal Parters accept o liability for ay use of this Specificatio. Specificatios ad reports for implemetatio of the TM system should be obtaied via the Orgaisatioal Parters' Publicatios Offices. BlackBerry Exhibit 1006, pg. 1

2 2 TS V8.0.0 ( ) Keywords UMTS, radio, modulatio, layer 1 Postal address support office address 650 Route des Lucioles - Sophia Atipolis Valboe - FRANCE Tel.: Fax: Iteret Copyright Notificatio No part may be reproduced except as authorized by writte permissio. The copyright ad the foregoig restrictio exted to reproductio i all media. 2008, Orgaizatioal Parters (ARIB, ATIS, CCSA, ETSI, TTA, TTC). All rights reserved. BlackBerry Exhibit 1006, pg. 2

3 3 TS V8.0.0 ( ) Cotets Foreword Scope Refereces Symbols ad abbreviatios Symbols Abbreviatios Uplik spreadig ad modulatio Overview Spreadig Dedicated physical chaels DPCCH/DPDCH HS-DPCCH E-DPDCH/E-DPCCH PRACH PRACH preamble part PRACH message part Void Code geeratio ad allocatio Chaelisatio codes Code defiitio Code allocatio for dedicated physical chaels Code allocatio for DPCCH/DPDCH Code allocatio for HS-DPCCH Code allocatio for E-DPCCH/E-DPDCH Code allocatio for PRACH message part Void Void Scramblig codes Geeral Log scramblig sequece Short scramblig sequece Dedicated physical chaels scramblig code PRACH message part scramblig code Void Void PRACH preamble codes Preamble code costructio Preamble scramblig code Preamble sigature Void Modulatio Modulatig chip rate Modulatio Dowlik spreadig ad modulatio Spreadig Modulatio mapper QPSK QAM QAM Chaelisatio IQ combiig Scramblig Chael combiig Code geeratio ad allocatio BlackBerry Exhibit 1006, pg. 3

4 4 TS V8.0.0 ( ) Chaelisatio codes Scramblig code Sychroisatio codes Code geeratio Code allocatio of SSC Modulatio Modulatig chip rate Modulatio Aex A (iformative): Geeralised Hierarchical Golay Sequeces A.1 Alterative geeratio Aex B (iformative): Chage history BlackBerry Exhibit 1006, pg. 4

5 5 TS V8.0.0 ( ) Foreword This Techical Specificatio (TS) has bee produced by the 3 rd Geeratio Partership Project (). The cotets of the preset documet are subject to cotiuig work withi the TSG ad may chage followig formal TSG approval. Should the TSG modify the cotets of the preset documet, it will be re-released by the TSG with a idetifyig chage of release date ad a icrease i versio umber as follows: Versio x.y.z where: x the first digit: 1 preseted to TSG for iformatio; 2 preseted to TSG for approval; 3 or greater idicates TSG approved documet uder chage cotrol. y the secod digit is icremeted for all chages of substace, i.e. techical ehacemets, correctios, updates, etc. z the third digit is icremeted whe editorial oly chages have bee icorporated i the documet. BlackBerry Exhibit 1006, pg. 5

6 6 TS V8.0.0 ( ) 1 Scope The preset documet describes spreadig ad modulatio for UTRA Physical Layer FDD mode. 2 Refereces The followig documets cotai provisios which, through referece i this text, costitute provisios of the preset documet. Refereces are either specific (idetified by date of publicatio, editio umber, versio umber, etc.) or o-specific. For a specific referece, subsequet revisios do ot apply. For a o-specific referece, the latest versio applies. I the case of a referece to a documet (icludig a GSM documet), a o-specific referece implicitly refers to the latest versio of that documet i the same Release as the preset documet. [1] TS : "Physical layer - geeral descriptio". [2] TS : "Physical chaels ad mappig of trasport chaels oto physical chaels (FDD)." [3] TS : "UE Radio trasmissio ad Receptio (FDD)". [4] TS : "UTRA (BS) FDD; Radio trasmissio ad Receptio". [5] TS : "UTRA High Speed Dowlik Packet Access (HSDPA); Overall descriptio". [6] TS : "Physical layer procedures (FDD)". [7] TS : "Multiplexig ad chael codig (FDD)". 3 Symbols ad abbreviatios 3.1 Symbols For the purposes of the preset documet, the followig symbols apply: C ch,sf, : C pre,,s : C sig,s : S dpch, : S r-pre, : S r-msg, : S dl, : C psc : C ssc, : :th chaelisatio code with spreadig factor SF PRACH preamble code for :th preamble scramblig code ad sigature s PRACH sigature code for sigature s :th DPCCH/DPDCH uplik scramblig code :th PRACH preamble scramblig code :th PRACH message scramblig code DL scramblig code PSC code :th SSC code 3.2 Abbreviatios For the purposes of the preset documet, the followig abbreviatios apply: 16QAM 64QAM 16 Quadrature Amplitude Modulatio 64 Quadrature Amplitude Modulatio BlackBerry Exhibit 1006, pg. 6

7 7 TS V8.0.0 ( ) AICH BCH CCPCH CPICH DCH DPCH DPCCH DPDCH E-AGCH E-DPCCH E-DPDCH E-HICH E-RGCH FDD F-DPCH HS-DPCCH HS-DSCH HS-PDSCH HS-SCCH MBSFN Mcps MICH OVSF PICH PRACH PSC RACH SCH SSC SF UE Acquisitio Idicator Chael Broadcast Cotrol Chael Commo Cotrol Physical Chael Commo Pilot Chael Dedicated Chael Dedicated Physical Chael Dedicated Physical Cotrol Chael Dedicated Physical Data Chael E-DCH Absolute Grat Chael E-DCH Dedicated Physical Cotrol Chael E-DCH Dedicated Physical Data Chael E-DCH Hybrid ARQ Idicator Chael E-DCH Relative Grat Chael Frequecy Divisio Duplex Fractioal Dedicated Physical Chael Dedicated Physical Cotrol Chael (uplik) for HS-DSCH High Speed Dowlik Shared Chael High Speed Physical Dowlik Shared Chael Shared Cotrol Physical Chael for HS-DSCH MBMS over a Sigle Frequecy Network Mega Chip Per Secod MBMS Idicatio Chael Orthogoal Variable Spreadig Factor (codes) Page Idicatio Chael Physical Radom Access Chael Primary Sychroisatio Code Radom Access Chael Sychroisatio Chael Secodary Sychroisatio Code Spreadig Factor User Equipmet 4 Uplik spreadig ad modulatio 4.1 Overview Spreadig is applied to the physical chaels. It cosists of two operatios. The first is the chaelisatio operatio, which trasforms every data symbol ito a umber of chips, thus icreasig the badwidth of the sigal. The umber of chips per data symbol is called the Spreadig Factor (SF). The secod operatio is the scramblig operatio, where a scramblig code is applied to the spread sigal. With the chaelisatio, data symbols o so-called I- ad Q-braches are idepedetly multiplied with a OVSF code. With the scramblig operatio, the resultat sigals o the I- ad Q-braches are further multiplied by complex-valued scramblig code, where I ad Q deote real ad imagiary parts, respectively. 4.2 Spreadig Dedicated physical chaels The possible combiatios of the maximum umber of respective dedicated physical chaels which may be cofigured simultaeously for a UE i additio to the DPCCH are specified i table 0. The actual UE capability may be lower tha the values specified i table 0; the actual dedicated physical chael cofiguratio is idicated by higher layer sigallig. The actual umber of cofigured DPDCHs, deoted N max-dpdch, is equal to the largest umber of DPDCHs from all the TFCs i the TFCS. N max-dpdch is ot chaged by frame-by-frame TFCI chage or temporary TFC restrictios. BlackBerry Exhibit 1006, pg. 7

8 8 TS V8.0.0 ( ) Table 0: Maximum umber of simultaeously-cofigured uplik dedicated chaels DPDCH HS-DPCCH E-DPDCH E-DPCCH Case Case Case Figure 1 illustrates the priciple of the spreadig of uplik dedicated physical chaels ( DPCCH, DPDCHs, HS- DPCCH, E-DPCCH, E-DPDCHs). I case of BPSK modulatio, the biary iput sequeces of all physical chaels are coverted to real valued sequeces, i.e. the biary value "0" is mapped to the real value +1, the biary value "1" is mapped to the real value 1, ad the value "DTX" (HS-DPCCH oly) is mapped to the real value 0. I case of 4PAM modulatio, the biary iput sequeces of all E-DPDCH physical chaels are coverted to real valued sequeces, i.e. a set of two cosecutive biary symbols k, k+1 (with k mod 2 = 0) i each biary sequece is coverted to a real valued sequece followig the mappig described i Table 0A. Table 0A: Mappig of E-DPDCH with 4PAM modulatio k, k+1 Mapped real value DPCCH DPDCHs Spreadig S dpch S dpch, HS-DPCCH Spreadig S hs-dpcch Σ I+jQ S E-DPDCHs E-DPCCH Spreadig S e-dpch Figure 1: Spreadig for uplik dedicated chaels The spreadig operatio is specified i subclauses to for each of the dedicated physical chaels; it icludes a spreadig stage, a weightig stage, ad a IQ mappig stage. I the process, the streams of real-valued chips o the I ad Q braches are summed; this results i a complex-valued stream of chips for each set of chaels. As described i figure 1, the resultig complex-valued streams S dpch, S hs-dpcch ad S e-dpch are summed ito a sigle complex-valued stream which is the scrambled by the complex-valued scramblig code S dpch,. The scramblig code shall be applied aliged with the radio frames, i.e. the first scramblig chip correspods to the begiig of a radio frame. NOTE: Although subclause has bee reorgaized i this release, the spreadig operatio for the DPCCH, DPDCH remais uchaged as compared to the previous release. BlackBerry Exhibit 1006, pg. 8

9 9 TS V8.0.0 ( ) DPCCH/DPDCH Figure 1a illustrates the spreadig operatio for the uplik DPCCH ad DPDCHs. c d,1 β d DPDCH 1 DPDCH 3 c d,3 β d Σ I c d,5 β d DPDCH 5 I+jQ c d,2 β d S dpch DPDCH 2 c d,4 β d DPDCH 4 DPDCH 6 c d,6 β d Σ Q c c β c j DPCCH Figure 1A: Spreadig for uplik DPCCH/DPDCHs The DPCCH is spread to the chip rate by the chaelisatio code c c. The :th DPDCH called DPDCH is spread to the chip rate by the chaelisatio code c d,. After chaelisatio, the real-valued spread sigals are weighted by gai factors, β c for DPCCH, β d for all DPDCHs. The β c ad β d values are sigalled by higher layers or derived as described i [6] ad C. At every istat i time, at least oe of the values β c ad β d has the amplitude 1.0. The β c ad β d values are quatized ito 4 bit words. The quatizatio steps are give i table 1. BlackBerry Exhibit 1006, pg. 9

10 10 TS V8.0.0 ( ) Table 1: The quatizatio of the gai parameters Sigalled values for β c ad β d Quatized amplitude ratios β c ad β d / / / / /15 9 9/15 8 8/15 7 7/15 6 6/15 5 5/15 4 4/15 3 3/15 2 2/15 1 1/15 0 Switch off HS-DPCCH Figure 1b illustrates the spreadig operatio for the HS-DPCCH. HS-DPCCH (If Nmax-dpdch = 2, 4 or 6) c hs β hs I I+jQ HS-DPCCH (If Nmax-dpdch = 0, 1, 3, 5) c hs β hs Q S hs-dpcch j Figure 1B: Spreadig for uplik HS-DPCCH The HS-DPCCH shall be spread to the chip rate by the chaelisatio code c hs. After chaelisatio, the real-valued spread sigals are weighted by gai factor β hs The β hs values are derived from the quatized amplitude ratios A hs which are traslated from Δ ACK, Δ ΝACK ad Δ CQI sigalled by higher layers as described i [6] A. The traslatio of Δ ACK, Δ ΝACK ad Δ CQI ito quatized amplitude ratios A hs = β hs /β c is show i Table 1A. BlackBerry Exhibit 1006, pg. 10

11 11 TS V8.0.0 ( ) Table 1A: The quatizatio of the power offset Sigalled values for Δ ACK, Δ ΝACK ad Δ CQI Quatized amplitude ratios A hs = β hs/β c 9 38/ / / / / /15 3 9/15 2 8/15 1 6/15 0 5/15 HS-DPCCH shall be mapped to the I brach i case N max-dpdch is 2, 4 or 6, ad to the Q brach otherwise (N max-dpdch = 0, 1, 3 or 5) E-DPDCH/E-DPCCH Figure 1C illustrates the spreadig operatio for the E-DPDCHs ad the E-DPCCH. c ed,1 β ed,1 iq ed,1 E-DPDCH c ed,k β ed,k iq ed,k E-DPDCH k.... c ed,k β ed,k iq ed,k Σ I+jQ S e-dpch E-DPDCH K c ec β ec iq ec E-DPCCH Figure 1C: Spreadig for E-DPDCH/E-DPCCH The E-DPCCH shall be spread to the chip rate by the chaelisatio code c ec. The k:th E-DPDCH, deomiated E-DPDCH k, shall be spread to the chip rate usig chaelisatio code c ed,k. After chaelisatio, the real-valued spread E-DPCCH ad E-DPDCH k sigals shall respectively be weighted by gai factor β ec ad β ed,k. Whe E-TFCI E-TFCI ec,boost, where E-TFCI ec,boost is sigalled by higher layers, the value of β ec shall be derived as specified i [6] based o the quatized amplitude ratio A ec which is traslated from Δ E-DPCCH sigalled by higher layers. The traslatio of Δ E-DPCCH ito quatized amplitude ratios A ec = β ec /β c is specified i Table 1B. BlackBerry Exhibit 1006, pg. 11

12 12 TS V8.0.0 ( ) Table 1B: Quatizatio for Δ E-DPCCH for E-TFCI E-TFCI ec,boost Sigalled values for Δ E-DPCCH Quatized amplitude ratios A ec = β ec/β c 8 30/ / / / /15 3 9/15 2 8/15 1 6/15 0 5/15 Whe E-TFCI > E-TFCI ec,boost, i order to provide a ehaced phase referece, the value of β ec shall be derived as specified i [6] based o a traffic to total pilot power offset Δ T2TP, cofigured by higher layers as specified i Table 1B.0 ad the quatizatio of the ratio β ec /β c as specified i Table 1B.0A. Sigalled values for Δ T2TP Table 1B.0: Δ T2TP Power offset values Δ T2TP [db] Table 1B.0A: Quatizatio for β ec /β c for E-TFCI > E-TFCI ec,boost Quatized amplitude ratios β ec/β c 239/15 190/15 151/15 120/15 95/15 76/15 60/15 48/15 38/15 30/15 24/15 19/15 15/15 12/15 9/15 8/15 6/15 5/15 The value of β ed,k shall be computed as specified i [6] subclause B.2, based o the referece gai factors, the spreadig factor for E-DPDCH k, the HARQ offsets, ad the quatizatio of the ratio β ed,k /β c ito amplitude ratios specified i Table 1B.2 for the case whe E-TFCI E-TFCI ec,boost ad Table 1.B.2B, for the case whe E-TFCI > E- TFCI ec,boost. BlackBerry Exhibit 1006, pg. 12

13 13 TS V8.0.0 ( ) The referece gai factors are derived from the quatised amplitude ratios A ed which is traslated from Δ E-DPDCH sigalled by higher layers. The traslatio of Δ E-DPDCH ito quatized amplitude ratios A ed = β ed /β c is specified i Table 1B.1 for the case whe E-TFCI E-TFCI ec,boost ad Table 1.B.2A for the case whe E-TFCI > E-TFCI ec,boost Table 1B.1: Quatizatio for Δ E-DPDCH for E-TFCI E-TFCI ec,boost Sigalled values for Δ E-DPDCH Quatized amplitude ratios A ed = β ed/β c / / / / / / / / / / / / / / / / / / / / / / / / /15 4 9/15 3 8/15 2 7/15 1 6/15 0 5/15 BlackBerry Exhibit 1006, pg. 13

14 14 TS V8.0.0 ( ) Table 1B.2: Quatizatio for β ed,k /β c for E-TFCI E-TFCI ec,boost Quatized amplitude ratios β ed,k/β c 168/15 150/15 134/15 119/15 106/15 95/15 84/15 75/15 67/15 60/15 53/15 47/15 42/15 38/15 34/15 30/15 27/15 24/15 21/15 19/15 17/15 15/15 13/15 12/15 11/15 9/15 8/15 7/15 6/15 5/15 BlackBerry Exhibit 1006, pg. 14

15 15 TS V8.0.0 ( ) Table 1B.2A: Quatizatio for Δ E-DPDCH for E-TFCI > E-TFCI ec,boost Sigalled values for Δ E-DPDCH Quatized amplitude ratios A ed = β ed/β c / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / /15 0 8/15 BlackBerry Exhibit 1006, pg. 15

16 16 TS V8.0.0 ( ) Table 1B.2B: Quatizatio for β ed,k /β c for E-TFCI > E-TFCI ec,boost Quatized amplitude ratios β ed,k/β c 377/15 336/15 267/15 299/15 237/15 212/15 189/15 168/15 150/15 134/15 119/15 106/15 95/15 84/15 75/15 67/15 60/15 53/15 47/15 42/15 38/15 34/15 30/15 27/15 24/15 21/15 19/15 17/15 15/15 13/15 11/15 8/15 The HARQ offsets Δ harq to be used for support of differet HARQ profile are cofigured by higher layers as specified i Table 1B.3. Table 1B.3: HARQ offset Δ harq Sigalled values for Power offset values Δ harq Δ harq [db] After weightig, the real-valued spread sigals shall be mapped to the I brach or the Q brach accordig to the iq ec value for the E-DPCCH ad to iq ed,k for E-DPDCH k ad summed together. The E-DPCCH shall always be mapped to the I brach, i.e. iq ec = 1. The IQ brach mappig for the E-DPDCHs depeds o N max-dpdch ad o whether a HS-DSCH is cofigured for the UE; the IQ brach mappig shall be as specified i table 1C. BlackBerry Exhibit 1006, pg. 16

17 17 TS V8.0.0 ( ) Table 1C: IQ brach mappig for E-DPDCH N max-dpdch HS-DSCH cofigured E-DPDCH k iq ed, k 0 No/Yes E-DPDCH 1 1 E-DPDCH 2 E-DPDCH 3 1 E-DPDCH 4 1 No E-DPDCH 1 j E-DPDCH Yes E-DPDCH 1 1 E-DPDCH 2 j j j NOTE: I case the UE trasmits more tha 2 E-DPDCHs, the UE the always trasmits E-DPDCH 3 ad E-DPDCH 4 simultaeously PRACH PRACH preamble part The PRACH preamble part cosists of a complex-valued code, described i subclause PRACH message part Figure 2 illustrates the priciple of the spreadig ad scramblig of the PRACH message part, cosistig of data ad cotrol parts. The biary cotrol ad data parts to be spread are represeted by real-valued sequeces, i.e. the biary value "0" is mapped to the real value +1, while the biary value "1" is mapped to the real value 1. The cotrol part is spread to the chip rate by the chaelisatio code c c, while the data part is spread to the chip rate by the chaelisatio code c d. c d β d PRACH message data part I I+jQ S r-msg, PRACH message cotrol part Q S c c β c j Figure 2: Spreadig of PRACH message part After chaelisatio, the real-valued spread sigals are weighted by gai factors, β c for the cotrol part ad β d for the data part. At every istat i time, at least oe of the values β c ad β d has the amplitude 1.0. The β-values are quatized ito 4 bit words. The quatizatio steps are give i subclause After the weightig, the stream of real-valued chips o the I- ad Q-braches are treated as a complex-valued stream of chips. This complex-valued sigal is the scrambled by the complex-valued scramblig code S r-msg,. The 10 ms scramblig code is applied aliged with the 10 ms message part radio frames, i.e. the first scramblig chip correspods to the begiig of a message part radio frame. BlackBerry Exhibit 1006, pg. 17

18 18 TS V8.0.0 ( ) Void 4.3 Code geeratio ad allocatio Chaelisatio codes Code defiitio The chaelisatio codes of figure 1 are Orthogoal Variable Spreadig Factor (OVSF) codes that preserve the orthogoality betwee a user s differet physical chaels. The OVSF codes ca be defied usig the code tree of figure 4. C ch,1,0 = (1) C ch,2,0 = (1,1) C ch,2,1 = (1,-1) C ch,4,0 =(1,1,1,1) C ch,4,1 = (1,1,-1,-1) C ch,4,2 = (1,-1,1,-1) C ch,4,3 = (1,-1,-1,1) SF = 1 SF = 2 SF = 4 Figure 4: Code-tree for geeratio of Orthogoal Variable Spreadig Factor (OVSF) codes I figure 4, the chaelisatio codes are uiquely described as C ch,sf,k, where SF is the spreadig factor of the code ad k is the code umber, 0 k SF-1. Each level i the code tree defies chaelisatio codes of legth SF, correspodig to a spreadig factor of SF i figure 4. The geeratio method for the chaelisatio code is defied as: C ch,1,0 = 1, C C ch,2,0 ch,2,1 C = C ch,1,0 ch,1,0 C C ch,1,0 ch,1,0 1 = C C C C C C ch,2 ( + 1),0 ch,2 ( + 1),1 ch,2 ( + 1), 2 ch, 2 ( + 1),3 : ch,2 ( + 1), 2 ( + 1) 2 ch, 2 ( + 1),2 ( + 1) 1 C ch,2 C ch,2 C ch, 2 = C ch, 2 : C ch,2 C ch,2,0,0,1,1,2 1,2 1 C C C C C C ch, 2,0 ch, 2,0 ch,2,1 ch,2,1 : ch,2,2 1 ch,2,2 1 BlackBerry Exhibit 1006, pg. 18

19 19 TS V8.0.0 ( ) The leftmost value i each chaelisatio code word correspods to the chip trasmitted first i time Code allocatio for dedicated physical chaels NOTE: Although subclause has bee reorgaized i this release, the spreadig operatio for DPCCH ad DPDCH remais uchaged as compared to the previous release Code allocatio for DPCCH/DPDCH For the DPCCH ad DPDCHs the followig applies: - The DPCCH shall always be spread by code c c = C ch,256,0. - Whe oly oe DPDCH is to be trasmitted, DPDCH 1 shall be spread by code c d,1 = C ch,sf,k where SF is the spreadig factor of DPDCH 1 ad k= SF / 4. - Whe more tha oe DPDCH is to be trasmitted, all DPDCHs have spreadig factors equal to 4. DPDCH shall be spread by the the code c d, = C ch,4,k, where k = 1 if {1, 2}, k = 3 if {3, 4}, ad k = 2 if {5, 6}. If a power cotrol preamble is used to iitialise a DCH, the chaelisatio code for the DPCCH durig the power cotrol preamble shall be the same as that to be used afterwards Code allocatio for HS-DPCCH The HS-DPCCH shall be spread with code c hs as specified i table 1D. Table 1D: chaelisatio code of HS-DPCCH N max-dpdch Chaelisatio code c hs (as defied i subclause 4.2.1) 0 C ch,256,33 1 C ch,256,64 2,4,6 C ch,256,1 3,5 C ch,256, Code allocatio for E-DPCCH/E-DPDCH The E-DPCCH shall be spread with chaelisatio code c ec = C ch,256,1. E-DPDCH k shall be spread with chaelisatio code c ed,k. The sequece c ed,k depeds o N max-dpdch ad the spreadig factor selected for the correspodig frame or sub-frame as specified i [7]; it shall be selected accordig to table 1E. Table 1E: Chaelisatio code for E-DPDCH N max-dpdch E-DPDCH k Chaelisatio code C ed,k 0 E-DPDCH 1 C ch,sf,sf/4 if SF 4 C ch,2,1 if SF = 2 E-DPDCH 2 C ch,4,1 if SF = 4 C ch,2,1 if SF = 2 E-DPDCH 3 E-DPDCH 4 C ch,4,1 1 E-DPDCH 1 C ch,sf,sf/2 E-DPDCH 2 C ch,4,2 if SF = 4 C ch,2,1 if SF = 2 NOTE: Whe more tha oe E-DPDCH is trasmitted, the respective chaelisatio codes used for E-DPDCH 1 ad E-DPDCH 2 are always the same. BlackBerry Exhibit 1006, pg. 19

20 20 TS V8.0.0 ( ) Code allocatio for PRACH message part The preamble sigature s, 0 s 15, poits to oe of the 16 odes i the code-tree that correspods to chaelisatio codes of legth 16. The sub-tree below the specified ode is used for spreadig of the message part. The cotrol part is spread with the chaelisatio code c c (as show i subclause ) of spreadig factor 256 i the lowest brach of the sub-tree, i.e. c c = C ch,256,m where m = 16 s The data part uses ay of the chaelisatio codes from spreadig factor 32 to 256 i the upper-most brach of the sub-tree. To be exact, the data part is spread by chaelisatio code c d = C ch,sf,m ad SF is the spreadig factor used for the data part ad m = SF s/ Void Void Scramblig codes Geeral All uplik physical chaels shall be scrambled with a complex-valued scramblig code. The dedicated physical chaels may be scrambled by either a log or a short scramblig code, defied i subclause The PRACH message part shall be scrambled with a log scramblig code, defied i subclause There are 2 24 log ad 2 24 short uplik scramblig codes. Uplik scramblig codes are assiged by higher layers. The log scramblig code is built from costituet log sequeces defied i subclause , while the costituet short sequeces used to build the short scramblig code are defied i subclause Log scramblig sequece The log scramblig sequeces c log,1, ad c log,2, are costructed from positio wise modulo 2 sum of chip segmets of two biary m-sequeces geerated by meas of two geerator polyomials of degree 25. Let x, ad y be the two m-sequeces respectively. The x sequece is costructed usig the primitive (over GF(2)) polyomial X 25 +X The y sequece is costructed usig the polyomial X 25 +X 3 +X 2 +X+1. The resultig sequeces thus costitute segmets of a set of Gold sequeces. The sequece c log,2, is a chip shifted versio of the sequece c log,1,. Let 23 0 be the 24 bit biary represetatio of the scramblig sequece umber with 0 beig the least sigificat bit. The x sequece depeds o the chose scramblig sequece umber ad is deoted x, i the sequel. Furthermore, let x (i) ad y(i) deote the i:th symbol of the sequece x ad y, respectively. The m-sequeces x ad y are costructed as: Iitial coditios: - x (0)= 0, x (1)= 1, =x (22)= 22,x (23)= 23, x (24)=1. - y(0)=y(1)= =y(23)= y(24)=1. Recursive defiitio of subsequet symbols: - x (i+25) =x (i+3) + x (i) modulo 2, i=0,, y(i+25) = y(i+3)+y(i+2) +y(i+1) +y(i) modulo 2, i=0,, Defie the biary Gold sequece z by: - z (i) = x (i) + y(i) modulo 2, i = 0, 1, 2,, The real valued Gold sequece Z is defied by: + 1 if z ( i) = 0 Z ( i) = for i = 0,1,,2 1 if z ( i) = BlackBerry Exhibit 1006, pg. 20

21 21 TS V8.0.0 ( ) Now, the real-valued log scramblig sequeces c log,1, ad c log,2, are defied as follows: c log,1, (i) = Z (i), i = 0, 1, 2,, ad c log,2, (i) = Z ((i ) modulo (2 25 1)), i = 0, 1, 2,, Fially, the complex-valued log scramblig sequece C log,, is defied as: C ( + j ) i ( 1) clog,2 ( 2 / 2) ( i) = clog,1, ( i) 1, log, i where i = 0, 1,, ad deotes roudig to earest lower iteger. c log,1, MSB LSB c log,2, Figure 5: Cofiguratio of uplik scramblig sequece geerator Short scramblig sequece The short scramblig sequeces c short,1, (i) ad c short,2, (i) are defied from a sequece from the family of periodically exteded S(2) codes. Let be the 24 bit biary represetatio of the code umber. The :th quaterary S(2) sequece z (i), , is obtaied by modulo 4 additio of three sequeces, a quaterary sequece a(i) ad two biary sequeces b(i) ad d(i), where the iitial loadig of the three sequeces is determied from the code umber. The sequece z (i) of legth 255 is geerated accordig to the followig relatio: - z (i) = a(i) + 2b(i) + 2d(i) modulo 4, i = 0, 1,, 254; where the quaterary sequece a(i) is geerated recursively by the polyomial g 0 (x)= x 8 +3x 5 +x 3 +3x 2 +2x+3 as: - a(0) = modulo 4; - a(i) = 2 i modulo 4, i = 1, 2,, 7; - a(i) = 3a(i-3) + a(i-5) + 3a(i-6) + 2a(i-7) + 3a(i-8) modulo 4, i = 8, 9,, 254; ad the biary sequece b(i) is geerated recursively by the polyomial g 1 (x)= x 8 +x 7 +x 5 +x+1 as b(i) = 8+i modulo 2, i = 0, 1,, 7, b(i) = b(i-1) + b(i-3) + b(i-7) + b(i-8) modulo 2, i = 8, 9,, 254, ad the biary sequece d(i) is geerated recursively by the polyomial g 2 (x)= x 8 +x 7 +x 5 +x 4 +1 as: d(i) = 16+i modulo 2, i = 0, 1,, 7; d(i) = d(i-1) + d(i-3) + d(i-4) + d(i-8) modulo 2, i = 8, 9,, 254. The sequece z (i) is exteded to legth 256 chips by settig z (255) = z (0). BlackBerry Exhibit 1006, pg. 21

22 22 TS V8.0.0 ( ) The mappig from z (i) to the real-valued biary sequeces c short,1, (i) ad c short,2, (i),, i = 0, 1,, 255 is defied i Table 2. Table 2: Mappig from z (i) to c short,1, (i) ad c short,2, (i), i = 0, 1,, 255 z (i) c short,1,(i) c short,2,(i) Fially, the complex-valued short scramblig sequece C short,, is defied as: C ( i) = cshort,1, ( i mod 256) 1, ( + j ) i ( 1) cshort,2 ( 2( mod 256) / 2) short, i where i = 0, 1, 2, ad deotes roudig to earest lower iteger. A implemetatio of the short scramblig sequece geerator for the 255 chip sequece to be exteded by oe chip is show i Figure d(i) mod mod additio multiplicatio mod b(i) mod 4 + z (i) Mapper c short,1,(i) c short,2,(i) a(i) mod Figure 6: Uplik short scramblig sequece geerator for 255 chip sequece Dedicated physical chaels scramblig code The code used for scramblig of the uplik dedicated physical chaels may be of either log or short type. The :th uplik scramblig code, deoted S dpch,, is defied as: S dpch, (i) = C log, (i), i = 0, 1,, 38399, whe usig log scramblig codes; where the lowest idex correspods to the chip trasmitted first i time ad C log, is defied i subclause The :th uplik scramblig code, deoted S dpch,, is defied as: S dpch, (i) = C short, (i), i = 0, 1,, 38399, whe usig short scramblig codes; where the lowest idex correspods to the chip trasmitted first i time ad C short, is defied i subclause PRACH message part scramblig code The scramblig code used for the PRACH message part is 10 ms log, ad there are 8192 differet PRACH scramblig codes defied. BlackBerry Exhibit 1006, pg. 22

23 23 TS V8.0.0 ( ) The :th PRACH message part scramblig code, deoted S r-msg,, where = 0, 1,, 8191, is based o the log scramblig sequece ad is defied as: S r-msg, (i) = C log, (i ), i = 0, 1,, where the lowest idex correspods to the chip trasmitted first i time ad C log, is defied i subclause The message part scramblig code has a oe-to-oe correspodece to the scramblig code used for the preamble part. For oe PRACH, the same code umber is used for both scramblig codes, i.e. if the PRACH preamble scramblig code used is S r-pre,m the the PRACH message part scramblig code is S r-msg,m, where the umber m is the same for both codes Void Void PRACH preamble codes Preamble code costructio The radom access preamble code C pre,, is a complex valued sequece. It is built from a preamble scramblig code S r-pre, ad a preamble sigature C sig,s as follows: - C pre,,s (k) = S r-pre, (k) C sig,s (k) ( π π j + ) e 4 2 k, k = 0, 1, 2, 3,, 4095; where k=0 correspods to the chip trasmitted first i time ad S r-pre, ad C sig,s are defied i ad below respectively Preamble scramblig code The scramblig code for the PRACH preamble part is costructed from the log scramblig sequeces. There are 8192 PRACH preamble scramblig codes i total. The :th preamble scramblig code, = 0, 1,, 8191, is defied as: S r-pre, (i) = c log,1, (i), i = 0, 1,, 4095; where the sequece c log,1, is defied i subclause The 8192 PRACH preamble scramblig codes are divided ito 512 groups with 16 codes i each group. There is a oeto-oe correspodece betwee the group of PRACH preamble scramblig codes i a cell ad the primary scramblig code used i the dowlik of the cell. The k:th PRACH preamble scramblig code withi the cell with dowlik primary scramblig code m, k = 0, 1, 2,, 15 ad m = 0, 1, 2,, 511, is S r-pre, (i) as defied above with = 16 m + k Preamble sigature The preamble sigature correspodig to a sigature s cosists of 256 repetitios of a legth 16 sigature P s (), =0 15. This is defied as follows: - C sig,s (i) = P s (i modulo 16), i = 0, 1,, The sigature P s () is from the set of 16 Hadamard codes of legth 16. These are listed i table 3. BlackBerry Exhibit 1006, pg. 23

24 24 TS V8.0.0 ( ) Table 3: Preamble sigatures Preamble Value of sigature P 0() P 1() P 2() P 3() P 4() P 5() P 6() P 7() P 8() P 9() P 10() P 11() P 12() P 13() P 14() P 15() Void 4.4 Modulatio Modulatig chip rate The modulatig chip rate is 3.84 Mcps Modulatio Modulatio of the complex-valued chip sequece geerated by the spreadig process is show i Figure 7 below: cos(ωt) Complex-valued chip sequece from spreadig operatios S Split real & imag. parts Re{S} Im{S} Pulseshapig Pulseshapig -si(ωt) The pulse-shapig characteristics are described i [3]. Figure 7: Uplik modulatio BlackBerry Exhibit 1006, pg. 24

25 25 TS V8.0.0 ( ) 5 Dowlik spreadig ad modulatio 5.1 Spreadig Figure 8 illustrates the spreadig operatio for all physical chael except SCH. The spreadig operatio icludes a modulatio mapper stage successively followed by a chaelisatio stage, a IQ combiig stage ad a scramblig stage. All the dowlik physical chaels are the combied as specified i sub subclause The o-spread dowlik physical chaels, except SCH, AICH, E-HICH ad E-RGCH cosist of a sequece of 3- valued digits takig the values 0, 1 ad "DTX". Note that "DTX" is oly applicable to those dowlik physical chaels that support DTX trasmissio. dowlik physical chael S P Modulatio Mapper C ch,sf,m I Q I+jQ S dl, S j NOTE: Figure 8: Spreadig for all dowlik physical chaels except SCH Although subclause 5.1 has bee reorgaized i this release, the spreadig operatio as specified for the DL chaels i the previous release remais uchaged Modulatio mapper Table 3A defies which of the IQ mappig specified i subclauses ad may be used for the physical chael beig processed. Table 3A: IQ mappig Physical chael HS-PDSCH, S-CCPCH* All other chaels (except the SCH) IQ mappig QPSK, 16QAM or 64QAM QPSK * For MBSFN FACH trasmissios, QPSK ad 16QAM ca be used QPSK For all chaels, except AICH, E-HICH ad E-RGCH, the iput digits shall be mapped to real-valued symbols as follows: the biary value "0" is mapped to the real value +1, the biary value "1" is mapped to the real value 1 ad "DTX" is mapped to the real value 0. For the idicator chaels usig sigatures (AICH), the real-valued iput symbols deped o the exact combiatio of the idicators to be trasmitted as specified i [2] subclauses , ad For the E-HICH ad the E-RGCH the iput is a real valued symbol sequece as specified i [2] Each pair of two cosecutive real-valued symbols is first coverted from serial to parallel ad mapped to a I ad Q brach. The defiitio of the modulatio mapper is such that eve ad odd umbered symbols are mapped to the I ad Q brach respectively. For all QPSK chaels except the idicator chaels usig sigatures, symbol umber zero is BlackBerry Exhibit 1006, pg. 25

26 26 TS V8.0.0 ( ) defied as the first symbol i each frame or sub-frame. For the idicator chaels usig sigatures, symbol umber zero is defied as the first symbol i each access slot QAM I case of 16QAM, a set of four cosecutive biary symbols k, k+1, k+2, k+3 (with k mod 4 = 0) is serial-to-parallel coverted to two cosecutive biary symbols (i 1 = k, i 2 = k+2 ) o the I brach ad two cosecutive biary symbols (q 1 = k+1, q 2 = k+3 ) o the Q brach ad the mapped to 16QAM by the modulatio mapper as defied i table 3B. The I ad Q braches are the both spread to the chip rate by the same real-valued chaelisatio code C ch,16,m. The chaelisatio code sequece shall be aliged i time with the symbol boudary. The sequeces of real-valued chips o the I ad Q brach are the treated as a sigle complex-valued sequece of chips. This sequece of chips from all multicodes is summed ad the scrambled (complex chip-wise multiplicatio) by a complex-valued scramblig code S dl,. The scramblig code is applied aliged with the scramblig code applied to the P-CCPCH. Table 3B: 16QAM modulatio mappig i 1q 1i 2q 2 I brach Q brach QAM I case of 64QAM, a set of six cosecutive biary symbols k, k+1, k+2, k+3, k+4, k+5 (with k mod 6 = 0) is serial-toparallel coverted to three cosecutive biary symbols (i 1 = k, i 2 = k+2, i 3 = k+4 ) o the I brach ad three cosecutive biary symbols (q 1 = k+1, q 2 = k+3, q 3 = k+5 ) o the Q brach ad the mapped to 64QAM by the modulatio mapper as defied i table 3C. The I ad Q braches are the both spread to the chip rate by the same real-valued chaelisatio code C ch,16,m. The chaelisatio code sequece shall be aliged i time with the symbol boudary. The sequeces of real-valued chips o the I ad Q brach are the treated as a sigle complex-valued sequece of chips. This sequece of chips from all multicodes is summed ad the scrambled (complex chip-wise multiplicatio) by a complex-valued scramblig code S dl,. The scramblig code is applied aliged with the scramblig code applied to the P-CCPCH. BlackBerry Exhibit 1006, pg. 26

27 27 TS V8.0.0 ( ) Table 3C: 64QAM modulatio mappig i 1q 1i 2q 2 i 3q 3 I brach Q brach i 1q 1i 2q 2 i 3q 3 I brach Q brach Chaelisatio For all physical chaels (except SCH) the I ad Q braches shall be spread to the chip rate by the same real-valued chaelisatio code C ch,sf,m, i.e. the output for each iput symbol o the I ad the Q braches shall be a sequece of SF chips correspodig to the chaelisatio code chip sequece multiplied by the real-valued symbol. The chaelisatio code sequece shall be aliged i time with the symbol boudary IQ combiig The real valued chip sequece o the Q brach shall be complex multiplied with j ad summed with the correspodig real valued chip sequece o the I brach, thus resultig i a sigle complex valued chip sequece Scramblig The sequece of complex valued chips shall be scrambled (complex chip-wise multiplicatio) by a complex-valued scramblig code S dl,. I case of P-CCPCH, the scramblig code shall be applied aliged with the P-CCPCH frame boudary, i.e. the first complex chip of the spread P-CCPCH frame is multiplied with chip umber zero of the scramblig code. I case of other dowlik chaels, the scramblig code shall be applied aliged with the scramblig code applied to the P-CCPCH. I this case, the scramblig code is thus ot ecessarily applied aliged with the frame boudary of the physical chael to be scrambled Chael combiig Figure 9 illustrates how differet dowlik chaels are combied. Each complex-valued spread chael, correspodig to poit S i Figure 8, may be separately weighted by a weight factor G i. The complex-valued P-SCH BlackBerry Exhibit 1006, pg. 27

28 28 TS V8.0.0 ( ) ad S-SCH, as described i [2], subclause , may be separately weighted by weight factors G p ad G s. All dowlik physical chaels shall the be combied usig complex additio. Differet dowlik Physical chaels (poit S i Figures 8) G 1 G 2 Σ P-SCH G P Σ (poit T i Figure 11) S-SCH G S Figure 9: Combiig of dowlik physical chaels 5.2 Code geeratio ad allocatio Chaelisatio codes The chaelisatio codes of figure 8 are the same codes as used i the uplik, amely Orthogoal Variable Spreadig Factor (OVSF) codes that preserve the orthogoality betwee dowlik chaels of differet rates ad spreadig factors. The OVSF codes are defied i figure 4 i subclause The chaelisatio code for the Primary CPICH is fixed to C ch,256,0 ad the chaelisatio code for the Primary CCPCH is fixed to C ch,256,1.the chaelisatio codes for all other physical chaels are assiged by UTRAN. With the spreadig factor 512 a specific restrictio is applied. Whe the code word C ch,512,, with =0,2,4.510, is used i soft hadover, the the code word C ch,512,+1 is ot allocated i the cells where timig adjustmet is to be used. Respectively if C ch,512,, with =1,3,5.511 is used, the the code word C ch,512,-1 is ot allocated i the cells where timig adjustmet is to be used. This restrictio shall ot apply i cases where timig adjustmets i soft hadover are ot used with spreadig factor 512. Whe compressed mode is implemeted by reducig the spreadig factor by 2, the OVSF code used for compressed frames is: - C ch,sf/2,/2 if ordiary scramblig code is used. - C ch,sf/2, mod SF/2 if alterative scramblig code is used (see subclause 5.2.2); where C ch,sf, is the chaelisatio code used for o-compressed frames. For F-DPCH, the spreadig factor is always 256. For HS-PDSCH, the spreadig factor is always 16. For HS-SCCH, the spreadig factor is always 128. Chaelisatio-code-set iformatio over HS-SCCH is mapped i followig maer: the OVSF codes shall be allocated i such a way that they are positioed i sequece i the code tree. That is, for P multicodes at offset O the followig codes are allocated: C ch,16,o C ch,16, O+P-1 The umber of multicodes ad the correspodig offset for HS-PDSCHs mapped from a give HS-DSCH is sigalled by HS-SCCH. BlackBerry Exhibit 1006, pg. 28

29 29 TS V8.0.0 ( ) For E-HICH ad for E-RGCH, the spreadig factor shall always be 128. I each cell, the E-RGCH ad E-HICH assiged to a UE shall be cofigured with the same chaelisatio code. For E-AGCH, the spreadig factor shall always be Scramblig code A total of = 262,143 scramblig codes, umbered 0 262,142 ca be geerated. However ot all the scramblig codes are used. The scramblig codes are divided ito 512 sets each of a primary scramblig code ad 15 secodary scramblig codes. The primary scramblig codes cosist of scramblig codes =16*i where i= The i:th set of secodary scramblig codes cosists of scramblig codes 16*i+k, where k=1 15. There is a oe-to-oe mappig betwee each primary scramblig code ad 15 secodary scramblig codes i a set such that i:th primary scramblig code correspods to i:th set of secodary scramblig codes. Hece, accordig to the above, scramblig codes k = 0, 1,, 8191 are used. Each of these codes are associated with a left alterative scramblig code ad a right alterative scramblig code, that may be used for compressed frames. The left alterative scramblig code correspodig to scramblig code k is scramblig code umber k , while the right alterative scramblig code correspodig to scramblig code k is scramblig code umber k The alterative scramblig codes ca be used for compressed frames. I this case, the left alterative scramblig code is used if <SF/2 ad the right alterative scramblig code is used if SF/2, where c ch,sf, is the chaelisatio code used for o-compressed frames. The usage of alterative scramblig code for compressed frames is sigalled by higher layers for each physical chael respectively. I case F-DPCH is cofigured i the dowlik, the same scramblig code ad OVSF code shall be used i F-DPCH compressed frames ad ormal frames. The set of primary scramblig codes is further divided ito 64 scramblig code groups, each cosistig of 8 primary scramblig codes. The j:th scramblig code group cosists of primary scramblig codes 16*8*j+16*k, where j=0..63 ad k=0..7. Each cell is allocated oe ad oly oe primary scramblig code. The primary CCPCH, primary CPICH, PICH, MICH, AICH ad S-CCPCH carryig PCH shall always be trasmitted usig the primary scramblig code. The other dowlik physical chaels may be trasmitted with either the primary scramblig code or a secodary scramblig code from the set associated with the primary scramblig code of the cell. I MBSFN operatios, the S-CCPCH carries FACH oly ad shall always be trasmitted usig the primary scramblig code. The same primary CCPCH, primary CPICH, MICH ad S-CCPCH may be trasmitted from multiple cells usig the same primary scramblig code whe part of MBSFN operatios. The mixture of primary scramblig code ad o more tha oe secodary scramblig code for oe CCTrCH is allowable. I compressed mode durig compressed frames, these ca be chaged to the associated left or right scramblig codes as described above, i.e. i these frames, the total umber of differet scramblig codes may exceed two. I the case of CCTrCH of type of HS-DSCH the all the HS-PDSCH chaelisatio codes ad HS-SCCH that a sigle UE may receive shall be uder a sigle scramblig code (either the primary or a secodary scramblig code). I each cell, the F-DPCH, E-RGCH, E-HICH ad E-AGCH assiged to a UE shall be cofigured with same scramblig code as the assiged phase referece (primary or secodary CPICH). I each cell the UE may be cofigured simultaeously with at most two scramblig codes. The scramblig code sequeces are costructed by combiig two real sequeces ito a complex sequece. Each of the two real sequeces are costructed as the positio wise modulo 2 sum of chip segmets of two biary m- sequeces geerated by meas of two geerator polyomials of degree 18. The resultig sequeces thus costitute segmets of a set of Gold sequeces. The scramblig codes are repeated for every 10 ms radio frame. Let x ad y be the two sequeces respectively. The x sequece is costructed usig the primitive (over GF(2)) polyomial 1+X 7 +X 18. The y sequece is costructed usig the polyomial 1+X 5 +X 7 + X 10 +X 18. The sequece depedig o the chose scramblig code umber is deoted z, i the sequel. Furthermore, let x(i), y(i) ad z (i) deote the i:th symbol of the sequece x, y, ad z, respectively. BlackBerry Exhibit 1006, pg. 29

30 30 TS V8.0.0 ( ) The m-sequeces xad y are costructed as: Iitial coditios: - x is costructed with x (0)=1, x(1)= x(2)=...= x (16)= x (17)=0. - y(0)=y(1)= =y(16)= y(17)=1. Recursive defiitio of subsequet symbols: - x(i+18) =x(i+7) + x(i) modulo 2, i=0,, y(i+18) = y(i+10)+y(i+7)+y(i+5)+y(i) modulo 2, i=0,, The :th Gold code sequece z, =0,1,2,,2 18-2, is the defied as: - z (i) = x((i+) modulo (2 18-1)) + y(i) modulo 2, i=0,, These biary sequeces are coverted to real valued sequeces Z by the followig trasformatio: + 1 if z ( i) = 0 Z ( i) = for i = 0,1,,2 1 if z ( i) = 1 Fially, the :th complex scramblig code sequece S dl, is defied as: - S dl, (i) = Z (i) + j Z ((i ) modulo (2 18-1)), i=0,1,, Note that the patter from phase 0 up to the phase of is repeated I Q Figure 10: Cofiguratio of dowlik scramblig code geerator Sychroisatio codes Code geeratio The primary sychroisatio code (PSC), C psc is costructed as a so-called geeralised hierarchical Golay sequece. The PSC is furthermore chose to have good aperiodic auto correlatio properties. Defie: - a = <x 1, x 2, x 3,, x 16 > = <1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, 1, -1, -1, 1> BlackBerry Exhibit 1006, pg. 30

31 31 TS V8.0.0 ( ) The PSC is geerated by repeatig the sequece a modulated by a Golay complemetary sequece, ad creatig a complex-valued sequece with idetical real ad imagiary compoets. The PSC C psc is defied as: - C psc = (1 + j) <a, a, a, -a, -a, a, -a, -a, a, a, a, -a, a, -a, a, a>; where the leftmost chip i the sequece correspods to the chip trasmitted first i time. The 16 secodary sychroizatio codes (SSCs), {C ssc,1,,c ssc,16}, are complex-valued with idetical real ad imagiary compoets, ad are costructed from positio wise multiplicatioof a Hadamard sequece ad a sequece z, defied as: - z = <b, b, b, -b, b, b, -b, -b, b, -b, b, -b, -b, -b, -b, -b>, where - b = <x 1, x 2, x 3, x 4, x 5, x 6, x 7, x 8, -x 9, -x 10, -x 11, -x 12, -x 13, -x 14, -x 15, -x 16 > ad x 1, x 2,, x 15, x 16, are same as i the defiitio of the sequece a above. The Hadamard sequeces are obtaied as the rows i a matrix H 8 costructed recursively by: H k H = H H k 1 k 1 0 = (1) H H k 1 k 1, k 1 The rows are umbered from the top startig with row 0 (the all oes sequece). Deote the :th Hadamard sequece as a row of H 8 umbered from the top, = 0, 1, 2,, 255, i the sequel. Furthermore, let h (i) ad z(i) deote the i:th symbol of the sequece h ad z, respectively where i = 0, 1, 2,, 255 ad i = 0 correspods to the leftmost symbol. The k:th SSC, C ssc,k, k = 1, 2, 3,, 16 is the defied as: - C ssc,k = (1 + j) <h m (0) z(0), h m (1) z(1), h m (2) z(2),, h m (255) z(255)>; where m = 16 (k 1) ad the leftmost chip i the sequece correspods to the chip trasmitted first i time Code allocatio of SSC The 64 secodary SCH sequeces are costructed such that their cyclic-shifts are uique, i.e., a o-zero cyclic shift less tha 15 of ay of the 64 sequeces is ot equivalet to some cyclic shift of ay other of the 64 sequeces. Also, a o-zero cyclic shift less tha 15 of ay of the sequeces is ot equivalet to itself with ay other cyclic shift less tha 15. Table 4 describes the sequeces of SSCs used to ecode the 64 differet scramblig code groups. The etries i table 4 deote what SSC to use i the differet slots for the differet scramblig code groups, e.g. the etry "7" meas that SSC C ssc,7 shall be used for the correspodig scramblig code group ad slot. BlackBerry Exhibit 1006, pg. 31