Micro-inductors integrated on silicon for power supply on chip

Transcription

1 Journal of Magnetism and Magnetic Materials 316 (27) e233 e237 Micro-inductors integrated on silicon for power supply on chip Ningning Wang, Terence O Donnell, Saibal Roy, Paul McCloskey, Cian O Mathuna Tyndall National Institute, Lee Maltings, Prospect Row, Cork, Ireland Available online 24 February 27 Abstract This paper discusses the technologies required to produce magnetics on silicon for power supply on chip. Prototypes of microinductors have been fabricated using techniques such as thick copper coil deposition and improved magnetic materials. The measured maximum Q factor and inductance value are 5 at 2.5 MHz and 38 nh/mm 2, respectively. The impact of seed layers and core overlap has been identified to be significant at high frequencies. Using the validated analytical model, the electrical performance of micro-inductors in a buck converter can be predicted and efficiency of 85.9 with a power density of 15.8 W/cm 2 can be achieved. r 27 Elsevier B.V. All rights reserved. PACS: Pq; 85.7.Ay; 85.7.Kh; þj Keywords: Integrated inductors; Power supply on chip 1. Introduction One of the main difficulties in the miniaturization of power conversion circuits is the reduction of the size of the energy storage and transfer devices, i.e. inductors and transformers, which are essential in the circuit but normally occupy a significant fraction of the volume ð3%þ of the power converters. Micro-fabrication techniques enable the fabrication of these devices on the silicon substrate, with processes similar to those used for integrated circuits (IC) and power devices, which would pave the way for monolithic power converters. This paper discusses technology for the integration of the magnetic components on to the silicon, with a view to the eventual concept of power supply on a chip (PSOC), as shown in Fig. 1. Over the last 2 years, there has been significant research into the fabrication of micro-inductors and transformers on silicon using IC or MEMS type fabrication techniques. To achieve a reasonable enhancement of the inductance, magnetic material is usually used to form a magnetic core in the power inductors. Various approaches to deposit the magnetic core layers have been demonstrated, such as Corresponding author. Tel.: ; fax: address: nwang@tyndall.ie (N. Wang). screen printing, sputtering and electroplating [1 11]. Although the Q factors of micro-machined inductors using electroplated thin-film magnetic materials are generally lower than those realized using sputtering or screenprinting techniques, electro-deposition is a more economical approach for forming a considerably thick core ð1s mmþ. The low Q factor is mainly caused by the conductivity of the electroplated magnetic material, which causes the eddy current loss in the magnetic core to become significant when the operating frequency increases. In this paper the measured characteristics for several micro-inductors fabricated using mainly electroplating techniques are presented. The measurements are compared to models of the inductor and discrepancies between the measured and modeled results have been further investigated to reveal loss mechanisms not originally accounted for in the models. Finally, the models are applied to investigate the major loss mechanisms for the inductors when used in a power conversion application. 2. Fabrication Fig. 2 shows the schematic of a micro-inductor integrated on a silicon substrate. The cross-sections of fabricated micro-inductors are shown in Fig. 3(a) and (b). The fabricated micro-inductor consists of a racetrack /$ - see front matter r 27 Elsevier B.V. All rights reserved. doi:116/j.jmmm

2 e234 ARTICLE IN PRESS N. Wang et al. / Journal of Magnetism and Magnetic Materials 316 (27) e233 e237 shaped copper coil sandwiched between the magnetic cores [12,13]. The substrate is a silicon wafer with a layer of insulation (BCB Benzocyclobutane, approximately 5 mm thick). A seed layer of Ti/Cu is deposited by sputtering on the insulation. A layer of magnetic material (Ni 45 Fe 55 )is electroplated and patterned (layer 1) on top of the seed layer. This layer is further insulated by a patterned layer of BCB (layer 2). The Cu-windings are then deposited using electroplated copper on top of a Ti/Cu seed layer (layer 3). These windings are covered by a layer of SU8 (epoxy type photoresist) to isolate them from the top magnetic layer Fig. 1. Power supply built with: (a) discrete component; (b) integrated magnetics, control circuit, power switches and discrete capacitors; (c) PSOC with complete integration. (layer 4). Finally, the top magnetic layer is electroplated (layer 5) to obtain a closed magnetic path. The specifications of the micro-inductors fabricated are listed in Table 1. The gapped inductors have the same geometry as the ungapped ones, except that a 2 mm gap is introduced in the bottom core layer of the gapped inductors. 3. Characterization As shown in Fig. 4, the measured inductance of the fabricated inductors at low frequency is within a range of nh and shows a fairly flat response up to a frequency of 3 MHz. The gapped inductors ( and ) have lower inductance than the ungapped ones ( and ) as expected. The measured Q factors of the micro-inductors are shown in Fig. 5, a maximum quality factor of 5 at 2.5 MHz has been achieved on and a maximum inductance value of 38 nh/mm 2 has been achieved on. As shown in Fig. 6, the measured DC saturation current of the ungapped micro-inductors is.6 A. The gapped.25.2 magnetic core insulator II race-track shaped Cu windings silicon substrate insulator I Fig. 2. Schematic of a micro-machined inductor Fig. 4. Measured inductance of the fabricated micro-inductors. Fig. 3. (a) Ungapped micro-inductor on Si; (b) gapped micro-inductor on Si. Table 1 Specifications of the micro-inductors fabricated Inductors A1 A2 B1 B2 Winding width, mm Winding thickness, mm Winding spacing, mm Bottom core thickness, mm Top core thickness, mm Core length, mm Gap, mm N/A 2 N/A 2 DC resistance, O Q_Factor Fig. 5. Measured Q factors of the fabricated micro-inductors.

3 N. Wang et al. / Journal of Magnetism and Magnetic Materials 316 (27) e233 e237 e DC Current (A) Fig. 6. DC saturation current of the micro-inductors Fig. 8. Inductance comparison between measurements and model. L (uh) Rdc (Ohms) Fig. 7. Comparison of the inductance and DC resistance of microinductors. inductors has a 2 mm gap in the bottom core, which leads to a higher saturation current value of approximately 1 A. Quality factor Q is an important characteristic to evaluate an inductor. However, for power inductors, to achieve the lowest DC resistance is also highly desired, especially when the AC ripple current is relatively small compared to the DC component of the current. This has been further delineated in the loss analysis of devices in a converter circuit, later in the Modeling section. Hence, one of the major goals of our work is to achieve the lowest possible DC resistance with sufficient inductance, which will allow the device to operate at multi-mhz range. Fig. 7 shows the comparison of the inductance and DC winding resistance of different micro-fabricated inductors. 4. Modeling An analytical model for micro-inductors has been developed to predict the inductance and resistance of the micro-inductors. The analytical model includes a winding loss model, core eddy current loss model and core hysteresis loss model. Since the generated field in transformers is 1D, various 1D methods, such as Dowell s method and Ferreira s methods were employed for analysis of the conductive losses in transformers. These methods are no longer applicable for micro-inductors having closed core structure because the generated field is 2D and hence a significant difference in magnetic field distribution was found between inductors with closed magnetic core and transformers inside the winding area. We developed a 2D method [14] to calculate the AC resistance of microinductors. Higher accuracy over 1D methods has been achieved due to the incorporation of 2D field effects. The core eddy current loss model uses conventional 1D method [15] and the core hysteresis loss is calculated using the Steinmetz equation [16]. The measured results have been compared to the model calculations and finite element method (FEM) simulations, as shown in Fig. 8. For both the FEM model and the analytic model the geometry parameters were obtained from the cross-sections of the fabricated samples. As shown in Fig. 8, the simulations match very well with the model prediction. Both the model and FEM accurately predict the inductance of and at low frequencies. However, discrepancies are observed at high frequencies, which are believed to be due to differences between the idealized structure used in the analytic model and the real structure of the device. In particular both the FEM and analytic model assume that the magnetic core consists of a continuous film of magnetic material, which encloses the windings. In the real structure the core has feet, i.e. regions where the top core overlap the bottom core, as shown in Fig. 3(b). These overlap regions are approximately 5 mm in length. The core also has a thin ð:2 mmþ copper layer underneath the magnetic material, which is used as the seed layer for the core electrodeposition. The differences between the models and measurements are believed to be due to the seed-layer effect and the core overlap portion effect. More detailed FEM simulations, incorporating the seed layer and the core feet have been carried out and the simulation results are plotted in Fig. 9. The core overlap portions and seed layers introduce

4 e236 ARTICLE IN PRESS N. Wang et al. / Journal of Magnetism and Magnetic Materials 316 (27) e233 e E+4 1.E+5 1.E+6 1.E+7 1.E+8 Fig. 9. Core overlap and seed layers impacts. Fig. 11. Losses of in a Buck converter operating at 5 MHz. Fig. 1. Eddy currents circulating within the seed layers. some extra eddy current losses in the core, which cause the inductance to decrease at a lower frequency. The eddy current path in the core feet is shown in Fig. 1, simulated using 3D FEM. These impacts can be minimized using relatively more resistive materials for the seed layers and shortening the length of core overlap portion. 5. Loss analysis and improvements The inductors are developed for the application in a PSOC, i.e. a DC DC Buck converter. Given typical converter parameters, such as 3.6 V input voltage, 1.2 V output voltage,.5 A load DC current, the electrical performance of micro-inductors can be predicted using the validated analytical model [14 16]. Taking the device for an example, all the losses for the inductor operating in the Buck converter at 5 MHz were calculated and shown in Fig. 11. The predicted inductor efficiency is 85.9% and the power density is 15.8 W/cm 2. The largest loss shown in Fig. 11 is the winding DC conduction loss. Thus, the reduction of the DC resistance is the priority in future works. The core material also needs to be improved to reduce the core losses. In particular, higher resistivity, lower coercivity, high saturation flux density and high anisotropy field magnetic materials are required for high frequency applications. In order to further enhance the inductance and reduce the current ripple ratio in the application to reduce the AC losses, core lamination techniques can be employed to fabricate micro-inductors [17]. The inductances of devices with a laminated core can be about twice that of the corresponding single layer core devices at low frequencies while the footprint area and DC resistance still maintain the same. 6. Conclusions Measured results for fabricated micro-inductors have been presented. The measured maximum Q factor is 5 at 2.5 MHz and inductance value is 38 nh/mm 2, respectively. Good agreement has been achieved between measured results and models at low frequencies. The seed layers and core overlap have significant impacts on the frequency responses of the micro-inductors at high frequencies. However, these impacts can be minimized using less conductive materials for the seed layers and shortening the core overlap. Using the analytical model, the device performance in a Buck converter can be predicted and efficiency of 85.9 with a power density of 15.8 W/cm 2 can

5 N. Wang et al. / Journal of Magnetism and Magnetic Materials 316 (27) e233 e237 e237 be achieved. Thus, magnetics-on-silicon, presents an opportunity to create the power supply-on-a-chip (PSOC). Acknowledgements This work has been funded by Enterprise Ireland (EI) under the Advanced Technology and Technology Development phase of Commercialization Program. References [1] Y. Fukuda, et al., IEEE Trans. Magn. 39 (23) 257. [2] T. Sato, et al., in: Proceedings of International Power Electronics Conference, Tokyo, 2, p. 33. [3] E.J. Brandon, et al., IEEE Trans. Magn. 39 (23) 249. [4] C.H. Ahn, et al., IEEE Trans. Ind. Electron. 45 (1998) 866. [5] J.W. Park et al, IEEE Trans. Magn. 39 (5) (23) [6] J.Y. Park, et al., IEEE Trans. Magn. 35 (5) (1999) [7] S. Roy, et al., J. Magn. Magn. Mater (25) [8] K. Kawabe, et al., IEEE Trans. Magn. 2 (5) (1984) 184. [9] O. Oshiro, et al., IEEE Trans. Magn. 23 (5) (1987) [1] M. Yamaguchi, et al., IEEE Trans. Magn. 28 (5) (1992) 315. [11] M. Yamaguchi, et al., IEEE Trans. Magn. 31 (6) (1995) [12] M. Brunet, et al., IEEE Trans. Magn. 38 (5) (22) [13] N. Wang, et al., J. Magn. Magn. Mater (25) [14] N. Wang, et al., Proceedings of the 4th International UPEC, September 25, p [15] R. M. Bozorth, Ferromagnetism, ISBN , p [16] Ch.P. Steinmetz, Proceedings of IEEE 72 (2) (1984) [17] T. O Donnell, et al., APEC, February 24, p. 939.