Modeling and Control of a Cascaded NPC/H-Bridge Inverter with LCL Filter in PV- Grid Application

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1 Moeling an Control of a Cascae NPC/H-Brige Inverter with C Filter in P- Gri Application T. Wanjekeche *, D..Nicolae * * Department of Electrical Engineering Tshwane University of Technology Pretoria, South Africa Wanjekeche@yahoo.com, nicolaev@tut.ac.za A.A.Jimoh Department of Electrical Engineering Tshwane University of Technology Pretoria, South Africa JimohAA@tut.ac.za Astract The output voltage an current of renewale energy sources such as Photo- voltaic are not controlle. Conseuently P- Gri interface system is employe conition output voltage an current into the gri. This call for efficient an well esigne control strategies to ensure reliaility, staility an uality power output. This paper proposes nine- level cascae NPC/H-rige inverter as the P- Gri interface. Cascae NPC/H-Brige inverter is moele an a control law for realizing nine- level output with reuce harmonic content is evelope. Moeling is easily achieve y consiering the whole inverter as having four cascae three level legs, two positive an two negative. Then a mathematical moel is formulate for C filters assuming that the resistances associate with the inuctances have negligile effect on the system steay state variales. Finally a control techniue is evelope for the whole system an its roustness teste y carrying out several simulations tests in MATAB uner ifferent operating conitions. Keywors- Cascae NPC/H-Brige; inverter; P gri interface; C filter; PWM I. INTODUCTION Gri connecte P systems are nowaays recognize for their clean power generation, the main ojective of gri connecte P system is to maximize power generation an injection to the gri ut at the same time ensuring reliaility, staility an uality power output. This calls for innovative ut also more reliale, stale an cost effective power converters for interfacing P moules to the gri []- []. Multilevel inverter is an effective solution for increasing power an reucing harmonics content of an ac waveform. This is ecause multilevel inverter has several avantages over the conventional two level inverters such as high voltage rating ase on conventional power switches, etter output voltage waveform which is close to sine wave with reuce harmonic content an less v/t, an finally higher output power is easily achieve [3] [5]. Base on these avantages various circuits an topologies an moulation strategies have een reporte for etter utilization of multilevel voltage source inverters. Multilevel topologies are classifie into three categories, namely; the NPC inverter [6], The Flying Capacitor (FC) [7] an the cascae inverters with separate voltage sources (also calle H-rige converters) [8]. A cascae multilevel inverter is a special kin of multilevel inverter uilt to synthesize a esire AC voltage from several levels of DC voltages [9]. arious switching strategies have een evelope to fit iverse topologies an applications. For PWM control methos the stuy is focuse on harmonic elimination PWM moulation, multicarrier SPWM control, carrier phase shifte SPWM, an space vector moulation [0]-[]. Cascae multilevel inverter have een the suject of research in the last several years, where the DC levels were consiere to e ientical in that all of them were atteries, solar cells, ultra capacitors, etc. Their limitation is several isolate DC sources for P application which makes it more expensive an for ioe clampe there is prolem of capacitor voltage alancing especially for voltage levels eyon five. Base on the aove isavantages the two topologies are comine to realize a hyri topology calle NPC/H-Brige inverter [3], ut still past research has also concentrate on realizing a five level NPC/H-Brige inverter without cascaing the rige [4]; this fails to aress the principle of realizing a general cascae n- level NPC/H-Brige. This paper iscusses the esign of the control system for a nine- level cascae NPC/H-rige inverter interface with the gri through an C filter. The system will e escrie an analyze using mathematical moels; seconly evelopment of new an improve Phase shifte PWM techniue will e formulate an teste on the moel. Finally a control scheme will e esigne an its roustness teste using simulation. II. DESCIPTION OF THE MAIN STAGES OF A NINE EE CASCADED NPC/H-BIDGE MUTIEE INETE The moel scheme of the Cascae NPC/H-Brige inverter for P- Gri application is as shown in fig.. The system consist of two P arrays of same current an voltage ratings, the nine level cascae NPC/H-rige inverter, the C filter an AC gri represente y a sinusoial voltage source. The area of interest to e iscusse in this paper is the moeling of the inverter, the C filter an the effect of the output voltage of the inverter on the gri voltage an current. The uiling lock of the propose topology consists of two ientical NPC cascae cells. The inverter phase voltage an is the sum of the two cascae cells, i.e., /0/$ IEEE IPEC

2 if oth S & S T = 0 otherwise if oth S & S T = otherwise are ON are ON () 3 ( 4) T 3 = if oth S & S 0 otherwise are ON (5 ) if oth S & S are ON T = otherwise The euivalent switching function in each NPC leg is; ( 6) Fig.. Scheme of cascae NPC/H-rige inverter ase P- Gri interface. an = 0 0 Using appropriate switching techniue, five ifferent voltage outputs (,, 0, - an ) are generate on the ac terminal of the cascae moel. A. Control Techniue For a nine level cascae NPC/H-rige inverter eight power switches are controlle to supply sinusoial output voltage with low current harmonic an low Total Harmonic Distortion (THD). Because of the moularity of the topology, one cell is use for analysis. To prevent the top an ottom power switche in each inverter leg from conucting at the same time, the constraints of power switches can e expresse as S i an S i S i S i Where i =,. = 3 = 4 et T = S & S T = S 3 & S 3 T 3 = S & S T 4 = S 3 & S 4 The four vali expressions are given y; () ( ) if T = K a = 0 if S = if T = if T 3 = K = 0 if S = ( 8 ) if T 4 = For the control techniue state aove, the voltage levels for the two legs of one of the leg is given y euations (9) an (0) [5]. Euation (9) is for one leg of the cell a = K a K a K a K a Similarly for the secon leg the expression is given y; K K = K K () 7 (9) (0 ) An finally the voltage output for a nine level cascae NPC/H-Brige inverter is given as; K a K K ( ) a K 0= ( ) () Assuming that = = 3 = 4 =, the switching states are as shown in tale. For a nine level cascae NPC/h-rige inverter, there are vali switching states though tow of the switching states are short circuits an thus cannot compensate the DC capacitor as current o not pass through either of the four DC- link capacitors. 335

3 TABE SWITCHING SCHEME FO ONE PHASE EG OF A NINE EE CASCADED NPC/H- BIDGE INETE C filter. When compare with other topologies (i.e or C filter, the C filter has the avantage of proviing etter ecoupling etween the filter an gri impeance (reucing the epenence on gri parameters) an a lower ripple current stress across the gri inuctance (since the current ripple is reuce y the capacitance, the impeance at the gri sie suffers less stress when compare with the C topology). The selection of the type of inuctors an capacitors is a compromise etween performance, size an cost [6]. The values of the filter are shown in tale 3. For the three phase inverter sie the C filter is compose of three inuctances f-x an three capacitors star- connecte. f-x is the on- state resistance of the IGBT.The gri ranch of the filter inclues the coupling impeance f an f. The filter for a alance system is shown in fig. 4 B. Propose Hyri PWM Control An improve strategy for realizing nine level output is propose in this paper. The paper uses the principle of ecomposition where each leg is treate inepenently an gives a three level output. Positive an negative legs are connecte together ack to ack an they share the same voltage source E as shown in fig. an the nine level output with reuce harmonic content is as shown in fig.3. The propose hyri techniue is the comination of carrier phase shifte PWM an PD. In each cell carriers vcr an vcr in phase ut vertically ispose an moulating wave phase shifte y π are use. Finally a nine- level PWM output is achieve y using the same two carriers ut phase shifte y π/4 an moulating wave phase shifte y π. The switching states for one phase leg of a nine- level NPC/H-rige inverter is shown in tale, as can e seen there several reunant states which can e utilize in DC voltage alance, this is not within the scope of this paper. The control strategy has two avantages as compare to multicarrier PWM approach. First for an N-level cascae NPC/H-rige PWM inverter, we can use a switching freuency of 4N times less to achieve the same spectrum as multicarrier approach, Seconly the multicarrier PWM approach reuires 8 carriers to achieve nine level output, ut the propose control strategy reuires only one carrier phase shifte y (n-)π/4 where n is the numer of series connecte NPC/H-Brige inverter. III. MODEING OF THE C FITE The output voltage generate y the inverter has highfreuency harmonics ue to the switching of the power semiconuctor evices. In orer to inject clean energy into the gri, these harmonics has to e reuce. The moel uses an Fig.. Simulation moel for a nine level NPC/H-Brige consisting of four ecompose 3- level leg () Fig. 3. (a) Waveform an () Spectrum for a nine- level cascae NPC/H- Brige inverter phase voltage (f m=50hz, f sw, ev=500hz, m f=40, m a=0.9) (a) 336

4 TABE 3 C COMPONENT PAAMETE Symol Parameter alue f Inverter sie inuctance 0.45 mh f intern resistance of f, inverter sie inuctance 0mΩ C Filter capacitance 9.4μF f Gri sie inuctance 0.5mH f intern resistance of f, gri sie inuctance mω Damping resistor in series with C(not shown).6ω compose of PI Delay Saturation representing also the limit of the inverter [-30, 88] C transfer function. The resultant transfer function is iscretize using zero- orer hol at sampling freuency of 0 khz. Tuning of the PI gain is one using Tustin a tool provie y MATAB. With proper tuning a gain K p =.75 is otaine an fig. 8 shows the root locus of current controller Magnitue(B) Boe Diagram f f f f I f I s Phase(eg) i I c C s Freuency (ra/sec) Fig.5 Boe iagram of the C filter Fig. 4. C filter From the mathematical expression for the filter whish is not inclue here ecause of space limitation the gri current to inverter voltage transfer function is given y C 3 i S ( f f C S ( f f f f ) C s = i C S( C ) f f f f f f Neglecting the effect of f an f, euation () is simplifie to; C i s = 3 ( S f f C S ( f f ) i C S( f f () (3) /3 /3 / D i N I D i 3 N 3 3N, I, 3N, D N i N I 4 4 D4N, i N I, 4, D N i 5, 5N, I D5N, i 5N, I i f D i I D i 3 3 3, I, 3, D 4 i 4I D4, i I, 4, D5, i 5, I D5, i 5, I D i I D i 3 3 3, I, 3, D4 i 4I D4, i I, 4, D5, i 5, I D5, i 5, I D - D - i f D ω i f, f ω f, is f f f f - i s c s i c ωc c f ω i f, f ω i f, s f f f - is c s ic ωc c Fig. 6 Small signal moel of the NPC/H-rige inverter ase P-Gri interface in co-orinate With euation (3) the oe plot is plotte an can e seen in fig. 5 _ref (pu) Error Out PI_rec_v 0 Error Out PI_rec_i -K- I CONTO SCHEME In [7], using the evelope small signal moel of the cascae NPC/H-Brige inverter shown in fig. 6, the complete control iagram in synchronous rotating - frame is shown in fig. 7. For the gri current control, there are two main control loops, i s for the reactive power control an i s for the active power control. The tuning for the compensators is only mae for one loop assuming that oth of them have the same ynamics. Cross axis ecoupling terms an fee forwar terms are use to ecouple the gri voltage from the output of the controllers [8]. Open loop transfer function for a current controller is 3 s-x is-x (pu) P ac 0 S/Q TXi Is_ref Step Iorer (pu) ac 0 S/Q TX em Iso_ref em Ki Error Out PI_rec_i Error Out PI_rec_i0 Fig.7. Complete control iagram of the NPC/H-rige inverter in synchronous - rotating reference frame -K- Ki Scope g0 Q/S TX ac ac 337

5 Imaginary Axis oot ocus 0.9π/T π/t π/t 0.9π/T 0.8π/T 0.7π/T 0.5π/T 0.6π/T 0.4π/T π/T π/T π/T π/T PI controller forces the gri current to e in phase with the gri voltage after t= 0.08s as shown in fig. 0(c) This ensures that moel operates at unity power factor. In fig. 0 (), the effect of change on loa on i, i ref an i, i ref is shown. It is clearly shown that all regain the values after the isturance π/T 0.π/T π/T 0.3π/T 0.6π/T 0.4π/T 0.5π/T eal Axis Fig.8. oot ocus of current controller SIMUATION ANAYSIS To check the valiity of the esign an analysis, MATAB simulations using simulink is one on the moel shown in fig. 9 with ifferent DC voltages an loas. Using the C parameters given in tale 3, other parameters neee are as follows; = 500, P(kW) = 500 kw. Supply voltage ( s ) = 600, f= 60 Hz Sampling freuency = khz. Q(kAr) (a) P(kW) () Gri voltage Gri current (c) Fig.9. Complete simulation moel of cascae NPC/H-rige inverter ase P- application i i ref To check the roustness of the control scheme, when DC voltage from the P source is changing, The DC us voltage in increase at t= 0.05s as shown in fig. 0 (a), This increases the inverter output voltage making it larger than the gri voltage an thus reactive power is supplie to the network as shown in fig.0 ().At t= 0.08s DC us voltage is reuce as shown. This reuces inverter output voltage making it lower than gri voltage, thus the inverter asors reactive power from the network. However the DC voltage regains its 500 after.5 cycles, the results shows excellent ynamic response of the system with suen changes in P source. The esigne i () Fig.0. Transient simulation of (a) DC us voltage () active an reactive power (c) Gri current an voltage () - Gri current an their references ue to suen change of DC voltage i ref 338

6 Fig.. Transient simulation of gri voltage an current ue to suen change of loa. Fig. shows the effect on change of loa on the operation of the moel. From fig. 0 (a), the inverter is operate at constant DC voltage at no loa for the first three cycles, then at t = 0.05, an (00kW an 00 kar) loa is switche on, it can e seen that the gri voltage is smoother after 0.05s ecause harmonics are filtere y the leakage reactance. I CONCUSION Avance, well esigne an properly controlle power converters are neee in orer to facilitate the integration of renewale energy sources into the gri. This paper emonstrates with proper moeling of the converter, the operating characteristic an the control techniue to e applie on the moel can e easily foun. The tuning of the PI controller an esign of the C filter resulte in the roustness of the control scheme an proper tracking of the gri current reference. The improve phase shifte PWM Techniue has prove that with proper phase shifting of the carrier signals, an improve voltage output with reuce harmonic content is achieve. Detaile simulation results have emonstrate that the control scheme has fast ynamic response for generating or asoring reactive power as emane y the loa. with varying DC voltages, the moel s parameters retains their original values in the shortest time possile, this shows that the control scheme applie on this moel is a preferre choice for otaining a sinusoial voltage output with a varying DC source (photovoltaic cells). [4] J. oriuez, Jih-sheng ai an Fang Zheng Peng, Multilevel inverters: a survey of topologies, control an applications, IEEE Transactions on In. Electron., vol. 49, pp , 00 [5] B.P.Mcgrath, D.G.Holmes, an T.Meynar, euce PWM harmonic istortion for multilevel inverters operating over a wie moulation range, IEEE Trans. Power Electron., ol., No.4, pp , Jul. 006 [6] A. Naae, I. Takahashi, an H. Akagi, A New Neutral-point Clampe PWM inverter, IEEE Trans. In. Applicat., vol. IA-7, pp , Sept./Oct. 98 [7] T. A. Meynar an H. Foch, Multilevel Conversion: High oltage Choppers an oltage- Source Inverter, IEEE Power Electronics Specialists Conference, pp , 99 [8] F. Z. Peng, J. S. ai, J. W. McKeever, J. ancoevering, A Multilevel oltage-source Inverter with Separate DC Sources for Static ar Generation, IEEE Transactions on Inustry Applications, vol. 3, no. 5, pp , Sept. 996 [9] J. S. ai, F. Z. Peng, Multilevel Converters - A New Bree of Power Converters, IEEE Transactions on Inustry Applications, vol. 3, no. 3, pp , May 996 [0] G.Garrara, S. Garella, M. Marcheson,. Salutari, an G. Sciutto, A new multilevel PWM metho: A theoretical analysis, IEEE, Trans. power electronics, vol. 7, no.3, pp , july.99 [] D.G. Holmes an B.P. McGrath, Opportunities for harmonic cancellation with carrier- ase PWM for two level an multilevel cascae inverters, IEEE Trans. In. Appl., vol. 37, no., pp [] Wang iiao, Huang Yushui, iu Zhaoshen, etc., esearch on Multicarrier PWM Techniue for Multi-level Converters, Journal of Zhejiang University (Engineering Science), 005, 39(7), pp [3] Kai Ding, Yun-ping Zou, Zhan Wang, A New Dioe-Clamp Cascae Multi-level Converter, presente at the 9th Annual Conference of the IEEE Inustrial Electronics Society(IECON '03), ol.3, Nov. -6, 003, irginia, USA, pp [4] C.M.Wu, W.H. au an H.Chung, A five-level neutral-point-clampe H-rige PWM inverter with superior harmonics suppression: A theoretical analysis, ISACS 99, proceeings of the 999 IEEE international symposium, vol. 5, pp.98-0, 999. [5] T. Wanjekeche, A.A. Jimoh an D.. Nicolae, A Novel Multilevel 9- level inverter ase on 3 level NPC/H-Brige topology for Photovoltaic application INTENATIONA EIEW OF EECTICA ENGINEEING-IEE ol. 4, No.5, pp Sept., 009 [6] T. Wanjekeche, Design an analysis of sinusoial pulse with moulation techniues for voltage source inverter in UPS application, M. Eng thesis, Dept of Electrical Eng., Harin Institute of Technology, Shenzhen Grauate school- china, 006 [7] T. Wanjekeche, an D.. Nicolae, A.A. Jimoh, Complete analysis of multilevel inverter ase on three level NPC/H-Brige topology for photovoltaic application, a paper sumitte to IECON, 00 [8] F.B. Martin P. Kazmierkowski, amu Krishnan, Control in power electronics. EFEENCES [] S. Kjaer, J. Peersen, an F. Blaajerg, A review of single-phase gri connecte inverters for photovoltaic moules, IEEE Trans. In. Appl., vol. 4, no. 5, pp , Sep./Oct [] S. Khajehoin, A. Bakhshai, an P. Jain, A novel topology an control strategy for maximum power point trackers an multi-string gri connecte P inverters, in Proc. 3r Annu. IEEE APEC, Fe. 008, pp [3] S. Kouro, J. eolleo an J. oriuez, euce switching freuency moulation algorithm for high power multilevel inverters, IEEE Trans. In. Electr., vol.54, no.5, pp , Oct.,