FD5T Series FD51xxT KHz CMOS Clock Oscillator March 2009

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FD5T Series FD51xxT-32.768KHz Pletronics FD51T Series is a quartz crystal controlled precision square wave generator Output frequency 32.768KHz Selectable low jitter or spread spectrum output.

2 x 5 mm LCC Ceramic Package Stability is much better than an XY cut watch crystal Very fast Start-up time, <10mS Low power 1.8V, 2.5 or 3.3V LVCMOS outputs Designed for high density SMD needs Vdd 1.

1 FD5T Series FD51xxT KHz Pletronics FD51T Series is a quartz crystal controlled precision square wave generator Output frequency KHz Selectable low jitter or spread spectrum output. Device characteristics may be either factory or field programmable Tape and Reel or cut tape packaging is available 3.2 x 5 mm LCC Ceramic Package Stability is much better than an XY cut watch crystal Very fast Start-up time, <10mS Low power 1.8V, 2.5 or 3.3V LVCMOS outputs Designed for high density SMD needs Vdd 1.8V (5) Vddout (6) Optional Vcontrol S2/SCL (1) S1/SDA (2) Ground (3) Reference oscillator optional Voltage controlled - Programming control - eeprom - SDA/SCL Registers - Sx Control PLL Multiplier #1 optional Spread Spectrum optional Bypass Mode MUX #1 Divider #1 /1 to /1023 Y1 (4) Out Pletronics Inc. certifies this device is in accordance with the RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives. Pletronics Inc. guarantees the device does not contain the following: Cadmium, Hexavalent Chromium, Lead, Mercury, PBB s, PBDE s Weight of the Device: 0.09 grams Moisture Sensitivity Level: 1 As defined in J-STD-020C Second Level Interconnect code: e4 Absolute Maximum Ratings: Parameter Unit V DD -0.5V to +2.5V V DDOUT -0.5V to +4.6V Vi Input Voltage -0.5V to V DD + 0.5V Vo Output Voltage -0.5V to V DDOUT + 0.5V Io Continuous Output Current +_ 50 ma Tj Maximum Junction Temperature 125 o C Thermal Resistance, Junction to Case 50 o C/Watt Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty. Production processsing does not necessarily include testing of all parameters. Copyright 2009, Pletronics Inc.

2 Description: The FD51xxT K is derived from the PLE FD51T series Programmable which is a modular PLL-based low cost, high-performance oscillator. The frequency output is set to KHz. The FD51xxT K base frequency is a MHz AT cut fundamental mode crystal. The FD5T has a separate output supply pin, V DDOUT, for either 1.8, 2.5 or 3.3V output logic levels. The device supply, V DD which provides power to all the internal circuits, is nominally 1.8V. The PLL is only utilized to support Spread Spectrum Clocking (SSC), in all other cases the PLL is disabled to reduce power. SSC may be programmed to be either center-spread or down-spread. This is an important technique to reduce electro-magnetic interference (EMI). The device supports non-volatile eeprom programming for easy customization of the device. As shipped, the device is pre-programmed. However, the FD51xxT K may be reprogrammed to a different configuration. Reprogramming may be either prior to assembly, or in-circuit via a 2-wire SDA/SCL I 2 C bus. In-circuit programming is not allowed if the VCXO function is needed. Two programmable control inputs, S1 and S2, may be used to control various aspects of FD51xxT K operation including selection of alternative frequency set(s), selection of SSC functionality, output tri-state and power-down. Reference Oscillator The VCXO input has a limited voltage range, the VCXO is associated with the internal 1.8V core. A resistor in series with the Vcontrol input will permit interfacing to 3.3V analog circuits, the voltage range that changes the frequency will still be limited but the larger voltages swings will not cause problems. The VCXO function is only enabled (internally connected) if the part number indicates a VCXO specification. When the VCXO function is enabled the I 2 C programming mode will be disabled. PLL Multiplier The PLL Multiplier is enabled when tight tolerances are needed or when the spread spectrum function is needed. Spread Spectrum The PLL has its individual Spread Spectrum (SS) function that can be enabled. This permits the modulation of the output frequency by a user-set amount. Divider Section The dividers operate on the output of the PLL. The divider on the PLL can divide by 1 through 1023 and is set to 750 in this case. There is only 1 setting allowed per divider. These are not set by the Sx input state. The dividers add very little jitter to the output signals. Multiplexers MUX #1 selects the input to the Divider #1, this can be the reference oscillator signal or the output from

3 PLL Multiplier #1. The device can make only one of the setting of connections shown in the block diagram (only one pattern stored in eeprom). Control Inputs The two inputs, S1/SDA and S2/SCL can be configured in two ways. 1) Used as 2 user inputs to permit up to 4 states, Sx input setting. 2) The SDA and SCL become clock and data inputs to write to the FD5T internal setting memory. The interface follows the I 2 C protocol. If the SDA and SCL are not set then the internal eeprom sets the operation. (Not allowed if the VCXO function is specified.) Standard Configuration S1 S2 Output SS PLL Low Low Tri State --- Disable High Low KHz ±1% centered Enable Low High KHz ±2% centered Enable High High KHz none Disable

4 PART NUMBER: FD T L E K -YYY Packaging code or blank T250 = 250 per Tape and Reel T500 = 500 per Tape and Reel T1K = 1000 per Tape and Reel Output Frequency KHz Optional Enhanced Operating temperature Range Blank = Temp. range -20 o C to +70 o C E = Temp. range -40 o C to +85 o C Blank = V DDOUT 3.3V, 2.5V and 1.8V device L = V DDOUT 1.8V only - high output drive level device Series Model Frequency Stability for fixed frequency oscillator 45 = +_ 50 ppm 15 = +_ 15 ppm 1 44 = +_ 25 ppm 10 = +_ 10 ppm 1 20 = +_ 20 ppm Frequency Pull Ability for VCXO option enabled 99 = +_ 100 ppm Absolute Pull Range (APR) 75 = +_ 25 ppm Absolute Pull Range (APR) 50 = +_ 50 ppm Absolute Pull Range (APR) 1 = 1 output 1 PLL version Series Model 1 In these cases the PLL will be enabled and the power dissipation will be higher. Part Marking: PLE FD51 Marking Legend: PLE = Pletronics K YMD = Date of Manufacture (year-month-day) YMD All other marking is internal factory codes Codes for Date Code YMD Code Code A B C D E F G H J K L M Year Month JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC Code A B C D E F G Day Code H J K L M N P R T U V W X Y Z Day

5 Electrical Specification over the specified temperature range, Item Min Max Unit Condition Frequency Accuracy 45" ppm For all supply voltages, load changes, 44" aging for 1 year, shock, vibration and temperatures 20" " " Start-up Time ms Recommended Operating Conditions Device Supply Voltage V DD V Output Supply Voltage V DDOUT V Output Supply Voltage L V DDOUT V Low Level Input voltage % of V DD High Level Input voltage % of V DD Input Voltage Range, S1, S V V TH is 0.5 * V DD Input current for: S1, S2 0 5 µa V IN = V DD ; V DD = 1.9V -4 0 µa V IN = 0.0V D ; V DD = 1.9V Output Current, V DDOUT = 3.3V ma Output Current, V DDOUT = 2.5V ma Output Current, V DDOUT = 1.8V ma Output Current L, V DDOUT = 1.8V ma Output Load, LVCMOS pf Higher loads can be used LVCMOS Output Parameters for V DDOUT = 3.3v Output High, V DDOUT = 3.3V V I OH = -0.1 ma V I OH = -8.0 ma V I OH = ma Output Low, V DDOUT = 3.3V V I OH = +0.1 ma V I OH = +8.0 ma V I OH = ma Rise & Fall Time ns V DDOUT = 3.3v, 20-80%, 10pF Load I DD (no PLL enabled) ma I DD (PLL enabled) -- 9 ma SS option or 15ppm or 10 ppm stability I DDOUT -- 5 ua 10pF Load Output Symmetry % at 50% point of V DDOUT Peak-to-Peak Jitter (1) ps (No SS and PLL disabled)

6 Item Min Max Unit Condition LVCMOS Output Parameters for V DDOUT = 2.5v Output High, V DDOUT = 2.5V V I OH = -0.1 ma V I OH = -6.0 ma V I OH = ma Output Low, V DDOUT = 2.5V V I OH = +0.1 ma V I OH = +6.0 ma V I OH = ma Rise & Fall Time ns V DDOUT = 2.5v, 20-80%, 10pF Load Output Symmetry % at 50% point of V DDOUT I DD (no PLL enabled) ma I DD (PLL enabled) -- 9 ma SS option or 15ppm or 10 ppm stability I DDOUT -- 4 ua 10pF Load Peak-to-Peak Jitter (1) ps (No SS and PLL disabled) LVCMOS Output Parameters for V DDOUT = 1.8v Output High, V DDOUT = 1.8V V I OH = -0.1 ma V I OH = -3.0 ma V I OH = -6.0 ma Output Low, V DDOUT = 1.8V V I OH = +0.1 ma V I OH = +3.0 ma V I OH = +6.0 ma Rise & Fall Time ns V DDOUT = 1.8v, 20-80%, 10pF Load Output Symmetry % at 50% point of V DDOUT I DD (no PLL enabled) ma I DD (PLL enabled) -- 9 ma SS option or 15ppm or 10 ppm stability I DDOUT ua 10pF Load Peak-to-Peak Jitter (1) ps (No SS and PLL disabled) LVCMOS Output Parameters for V DDOUT = 1.8v L Version Output High, V DDOUT = 1.8V V I OH = -0.1 ma V I OH = -4.0 ma V I OH = -8.0 ma Output Low, V DDOUT = 1.8V V I OH = +0.1 ma V I OH = +4.0 ma V I OH = +8.0 ma Rise & Fall Time 0.7 ns V DDOUT = 1.8v, 20-80%, 10pF Load

7 Item Min Max Unit Condition Output Symmetry % at 50% point of V DDOUT I DD (no PLL enabled) ma I DD (PLL enabled) -- 9 ma SS option or 15ppm or 10 ppm stability I DDOUT -- 3 ua 10pF Load Peak-to-Peak Jitter (1) ps (No SS and PLL disabled) VCXO Function Vcontrol Input Range Usable 0.5 V DD - 0.5V V The slope is positive Vcontrol Input Range Allowed - Direct connect to Vcontrol - Limit current to +_ 3mA V DD 4.0 Pull Ability specified in the P.N Linearity % (1) 10,000 cycles V The slope is positive Recommend >=1K ohm to Vcontrol

Load Circuit and Test Waveform Symmetry Vhigh 90% * Vcc 50% * Vcc 10% * Vcc Vlow Ground Trise Tfall Reliability: Environmental Compliance Parameter Condition Mechanical

Condition A ESD Rating Model Minimum Voltage Conditions Human Body Model 1500 MIL-STD-883 Method 3115 Charged Device Model 1000 JESD 22-C101 Package Labeling Label is 1" x 2.

8 Load Circuit and Test Waveform Symmetry Vhigh 90% * Vcc 50% * Vcc 10% * Vcc Vlow Ground Trise Tfall Reliability: Environmental Compliance Parameter Condition Mechanical Shock MIL-STD-883 Method 2002, Condition B Vibration MIL-STD-883 Method 2007, Condition A Solderability MIL-STD-883 Method 2003 Thermal Shock MIL-STD-883 Method 1011, Condition A ESD Rating Model Minimum Voltage Conditions Human Body Model 1500 MIL-STD-883 Method 3115 Charged Device Model 1000 JESD 22-C101 Package Labeling Label is 1" x 2.6" (25.4mm x 66.7mm) Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Courier New Font is Arial Bar code is 39-Full ASCII (Label will show FD51xxT K)

9 Mechanical: Inches mm A _ _0.15 B _ _ C max 1.35 max D E F G Contacts: Gold 11.8 µinches 0.3 µm minimum over Nickel 50 to 350 µinches 1.27 to 8.89 µm 1 Typical dimensions Not to Scale H I J R 0.10R K R 0.20R Pad Functions: Pad Function Note 1 2 S1/SDA S2/SCL Serial Data Clock (optional V control - VCXO) Serial Data S2 S1 Input to select 1 of 4 preprogrammed functions of the outputs (optional) 3 Ground (GND) 4 Out (Y3) Crystal reference frequency divided by 1 through 1023 PLL1 frequency divided by 1 through V DD 1.8V, powers internal circuitry of the oscillator. Bypass capacitor required near the package pin. 6 V DDOUT 1.8V, 2.5V or 3.3V supply for the output buffers. Sets CMOS output level. Bypass capacitor required near the package pin. All unused inputs should be pulled high

10 Reflow Cycle (typical for lead free-processing) FD51xxT KHz Temperature ( C) C±10 C 260 C Maximum 10 Seconds Maximum 215 C±10 C 120 to 160 Seconds Approximately 50 Seconds Allowed rate of temperature change Maximum 4 C per second The part may be reflowed 2 times without degradation. Tape and Reel: available for quantities of 250 to 1000 per reel, cut tape for < 250 Constant Dimensions Table 1 Tape Size D0 D1 Min E1 P0 P2 S1 Min T Max T1 Max 8mm _ mm _ mm +_ _0.1 24mm Variable Dimensions Table 2 Tape Size B1 Max E2 Min F P1 T2 Max W Max Ao, Bo & Ko 16 mm _ _ Note 1 Note 1: Embossed cavity to conform to EIA-481-B Not to scale REEL DIMENSIONS A inches mm B inches mm Tape Width C mm / -0.2 D mm Reel dimensions may vary from the above

11 IMPORTANT NOTICE Pletronics Incorporated (PLE) reserves the right to make corrections, improvements, modifications and other changes to this product at any time. PLE reserves the right to discontinue any product or service without notice. Customers are responsible for obtaining the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to PLE s terms and conditions of sale supplied at the time of order acknowledgment. PLE warrants performance of this product to the specifications applicable at the time of sale in accordance with PLE s limited warranty. Testing and other quality control techniques are used to the extent PLE deems necessary to support this warranty. Except where mandated by specific contractual documents, testing of all parameters of each product is not necessarily performed. PLE assumes no liability for application assistance or customer product design. Customers are responsible for their products and applications using PLE components. To minimize the risks associated with the customer products and applications, customers should provide adequate design and operating safeguards. PLE products are not designed, intended, authorized or warranted to be suitable for use in life support applications, devices or systems or other critical applications that may involve potential risks of death, personal injury or severe property or environmental damage. Inclusion of PLE products in such applications is understood to be fully at the risk of the customer. Use of PLE products in such applications requires the written approval of an appropriate PLE officer. Questions concerning potential risk applications should be directed to PLE. PLE does not warrant or represent that any license, either express or implied, is granted under any PLE patent right, copyright, artwork or other intellectual property right relating to any combination, machine or process which PLE product or services are used. Information published by PLE regarding third-party products or services does not constitute a license from PLE to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from PLE under the patents or other intellectual property of PLE. Reproduction of information in PLE data sheets or web site is permissible only if the reproduction is without alteration and is accompanied by associated warranties, conditions, limitations and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. PLE is not responsible or liable for such altered documents. Resale of PLE products or services with statements different from or beyond the parameters stated by PLE for that product or service voids all express and implied warranties for the associated PLE product or service and is an unfair or deceptive business practice. PLE is not responsible for any such statements. Contacting Pletronics Inc. Pletronics Inc. Tel: th Ave. West Fax: Lynnwood, WA USA ple-sales@pletronics.com URL: Copyright 2009 Pletronics Inc

FD5T Series Programmable CMOS Clock Oscillator November 2008

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