PL XIN CLK XOUT VCON. Xtal Osc. Varicap. Low Phase Noise VCXO (17MHz to 36MHz) PIN CONFIGURATION FEATURES DESCRIPTION BLOCK DIAGRAM
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1 FEATURES PIN CONFIGURATION VCXO output for the 17MHz to 36MHz range Low phase noise 10kHz offset at MHz) LVCMOS output with OE tri-state control 17 to 36MHz fundamental crystal input Integrated high linearity variable capacitors 8mA drive capability at TTL output ±150 ppm pull range, max 5% (typ.) linearity Low jitter (RMS): 2.5ps period jitter 2.5 to 3.3V operation Available in 8-Pin SOP, 6-pin SOT23 GREEN/ RoHS compliant packages, or Die DESCRIPTION The is a low cost, high performance and low phase noise VCXO for the 17 to 36MHz range, providing less than -130dBc at 10kHz offset at MHz. The very low jitter (2.5 ps RMS period jitter) makes this chip ideal for applications requiring voltage controlled frequency sources. Input crystal can range from 17 to 36MHz (fundamental resonant mode). XIN VDD* VCON SOP-8L SOT23-6L XIN OE^ VDD VDD* VCON ^: Denotes internal Pull-up *: Only one VDD pin needs to be connected BLOCK DIAGRAM XIN VCON OE Xtal Osc Varicap Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 6/15/10 Page 1
2 39 mil DIE PAD LAYOUT 32 mil (812,986) DIE SPECIFICATIONS 1 XIN 2 VDD 3 VCON 8 OE^ VDD Name Size Reverse side Pad dimensions Thickness Value 39 x 32 mil 80 micron x 80 micron 8 mil 4 DIE ID: C500xxxxxx Y X (0,0) Note: ^ denotes internal pull up PACKAGE PIN AND DIE PAD ASSIGNMENT Name Pin# Die Pad Position SOP-8 SOT23-6 X (m) Y (m) Type Description XIN I Crystal input pin. VDD P VDD power supply pin. Only one VDD pin is necessary. VCON I Frequency control voltage input pin P Ground pin O Output clock pin. VDD P OE* I VDD power supply pin. Only one VDD pin is necessary. Output Enable input pin. Disables the output when low. Internal pull -up enables output by default if pin is not connected to low I Crystal output pin. Ref Clock input. * OE (Output Enable) pin is not available in SOT23-6L package, the output will always be enabled by the build in pull-up resister. Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 6/15/10 Page 2
3 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage V DD 4.6 V Input Voltage, dc V I -0.5 V DD +0.5 V Output Voltage, dc V O -0.5 V DD +0.5 V Storage Temperature T S C Ambient Operating Temperature* T A C Junction Temperature T J 125 C Lead Temperature (soldering, 10s) 260 C ESD Protection, Machine Model 200 V ESD Protection, Human Body Model 2 kv Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permane nt damage to the device and affect product reliability. These conditions represent a stress rating only, and functiona l operations of the device at these or any other conditions above the operational limits noted in this specification is not implied.* Note : Operating Temperature is guaranteed by design for all parts (COMME RCIAL and INDUSTRIAL), but tested for COMMERCIAL g rade only. 2. Voltage Control Crystal Oscillator PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS VCXO Stabilization Time * T VCXO STB From power valid 10 ms VCXO Tuning Range XTAL C 0 /C 1 < 250 0V VCON 3.3V 300 ppm Output Pullability VCON=1.65V, 1.65V 150 ppm VCXO Tuning Characteristic 100 ppm/v Pull Range Linearity 5 % Power Supply Rejection PWSRR Frequency change, V DD ±10% ppm VCON Pin Input Impedance 5000 k VCON Modulation BW 0V VCON 3.3V, -3dB 18 khz Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits. Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 6/15/10 Page 3
4 3. AC Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Input Crystal Frequency F in Fundamental Mode MHz Output Clock Rise/Fall Time t r / t f 0.8V to 2.0V, 10 pf load 1.15 t r / t f 0.3V to 3.0V, 15 pf load 3.7 Output Clock Duty Cycle % Output Enable/Disable Time t OE 5 ns Start-Up Time t SU 1 ms 4. Jitter and Phase Noise Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS RMS Period Jitter (1 sigma 1000 samples) Phase Noise, Relative to Carrier 5. DC Specifications Supply Current, Dynamic With capacitive decoupling between V DD and. ns 2.5 ps offset -100 dbc/hz offset -125 dbc/hz offset -142 dbc/hz offset -150 dbc/hz offset -150 dbc/hz PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Supply Current, Output Disabled 27MHz, 15pF Load, 3.3V I DD 27MHz, 15pF Load, 2.5V I DD_ O E 27MHz, 3.3V, OE=Low MHz, 2.5V, OE=Low 1 Operating Voltage V DD V Output Low Voltage,CMOS V OL C I OL = +4mA 0.4 V Output High Voltage, CMOS V O HC I O H = -4mA V DD 0.4 V Output Drive Current For V OL <0.4V or V OH >2.4V ma VCXO Control Voltage VCON 0 V DD V ma ma Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 6/15/10 Page 4
5 6. Crystal Specifications PARAMETERS SYMBOL MIN. TYP. MAX. UNITS Crystal Loading Rating (VCON = 1.65V, 3.3V Operation) C L ( x ta l) 7.8 (see note Crystal Loading Rating (VCON = 1.25V, 2.5V Operation) below) 8.9 pf Maximum Sustainable Drive Level 200 W Operating Drive Level 50 W Max C0 5 pf C0/C ESR R S 30 Ω Note: The crystal must be such that it oscil lates (parallel resonant) at nominal frequency when presented a C Load as specified above. If the crystal requires more load to be at nominal frequency, the additional load must be added externally. This however may reduce the pull range. Note that the Clo ad values above are for the IC only, and do not include PCB parasitics. Crystal specifications for Cload include PCB parasiti cs. PACKAGE INFORMATION (GREEN PACKAGE COMPLIANT) SOP-8L Symbol Dimension in MM Min. Max. A A A B C D E H L e 1.27 BSC A1 e b D A2 A C E H L SOT23-6 L Symbol Dimension in MM Min. Max. A A A b c D E H L e 0.95 BSC A1 e Pin1 Dot D A2 A C b E H L Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 6/15/10 Page 5
6 ORDERING INFORMATION (GREEN PACKAGE) For part ordering, please contact our Sales Department: 2180 Fortune Drive, San Jose, CA 95131, USA Tel: (408) Fax: (408) PART NUMBER The order number for this device is a combination of the following: Part number, Package type and Operating temperature range X X - X Part Number Package Type D=Die W=Wafer S=SOP-8L T=SOT23-6L Shipping Option Blank=Tube R=Tape & Reel Temperature Range C=Commercial (0 C to 70 C) I=Industrial (-40 C to 85 C) Part / Order Number Marking* Package Option DC N/A Die (Waffle Pack) WC N/A WAFER SC P Pin SOP (Tube) SC SC-R LLLLL 8-Pin SOP (Tape and Reel) B17 TC-R 6-Pin SOT23 (Tape and Reel) LLL *Note: LLL and LLLLL represent the production lot number Micrel Inc., reserves the right to make changes in its products or specifications, or both at any time without notice. The in formation furnished by Micrel is believed to be accurate and reliable. However, Micrel makes no guarantee or warranty concerning the accuracy of said information and sha ll not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUP PORT POLICY: Micrel s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of Micrel Inc. Micrel Inc Fortune Drive San Jose, CA USA tel +1(408) fax +1(408) Rev 6/15/10 Page 6
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Features. Applications. Micrel Inc Fortune Drive San Jose, CA USA tel +1 (408) fax + 1 (408)
Revision 1.1 General Description The series is a low-power, small form-factor, high-performance OTP-based device and a member of Micrel s JitterBlocker, factory programmable jitter attenuators. The JitterBlocker
SERIALLY PROGRAMMABLE CLOCK SOURCE. Features
DATASHEET ICS307-02 Description The ICS307-02 is a versatile serially programmable clock source which takes up very little board space. It can generate any frequency from 6 to 200 MHz and have a second
MK5811C LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET
DATASHEET MK5811C Description The MK5811C device generates a low EMI output clock from a clock or crystal input. The device is designed to dither a high emissions clock to lower EMI in consumer applications.
PL V-3.3V Low-Skew 1-4 Differential PECL Fanout Buffer
-48 FEATURES Four differential 2.5V/3.3V LVPECL output pairs. Output Frequency: 1GHz. Two selectable differential input pairs. Translates any standard single-ended or differential input format to LVPECL
VVC4 Voltage Controlled Crystal Oscillator
C4 oltage Controlled Crystal Oscillator Features ectron s Smallest CXO, 5.0 X 3.2 X 1.2 mm High Frequencies to 77.70 MHz 5.0 or 3.3 operation Linearity 10% Tri-State Output for testing Low jitter < 1ps
MK VCXO-BASED FRAME CLOCK FREQUENCY TRANSLATOR. Features. Description. Block Diagram DATASHEET. Pullable Crystal
DATASHEET MK2059-01 Description The MK2059-01 is a VCXO (Voltage Controlled Crystal Oscillator) based clock generator that produces common telecommunications reference frequencies. The output clock is
The FS6128 is a monolithic CMOS clock generator IC designed to minimize cost and component count in digital video/audio systems.
PLL Clock Generator IC with VXCO 1.0 Key Features Phase-locked loop (PLL) device synthesizes output clock frequency from crystal oscillator or external reference clock On-chip tunable voltage-controlled
ICS553 LOW SKEW 1 TO 4 CLOCK BUFFER. Description. Features. Block Diagram DATASHEET
DATASHEET ICS553 Description The ICS553 is a low skew, single input to four output, clock buffer. Part of IDT s ClockBlocks TM family, this is our lowest skew, small clock buffer. See the ICS552-02 for
ICS LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET
DATASHEET ICS180-01 Description The ICS180-01 generates a low EMI output clock from a clock or crystal input. The device uses IDT s proprietary mix of analog and digital Phase Locked Loop (PLL) technology
ICS LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET
DATASHEET ICS180-51 Description The ICS180-51 generates a low EMI output clock from a clock or crystal input. The device uses IDT s proprietary mix of analog and digital Phase-Locked Loop (PLL) technology
MK LOW PHASE NOISE T1/E1 CLOCK GENERATOR. Features. Description. Block Diagram DATASHEET. Pullable Crystal
DATASHEET LOW PHASE NOISE T1/E1 CLOCK ENERATOR MK1581-01 Description The MK1581-01 provides synchronization and timing control for T1 and E1 based network access or multitrunk telecommunication systems.
ICS7151A-50 SPREAD SPECTRUM CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET
DATASHEET ICS7151A-50 Description The ICS7151A-50 is a clock generator for EMI (Electromagnetic Interference) reduction. Spectral peaks are attenuated by modulating the system clock frequency. Down or
Features. EXTERNAL PULLABLE CRYSTAL (external loop filter) FREQUENCY MULTIPLYING PLL 2
DATASHEET 3.3 VOLT COMMUNICATIONS CLOCK VCXO PLL MK2049-34A Description The MK2049-34A is a VCXO Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 khz
Programmable Low-Jitter Precision LVDS Oscillator
General Description The & series of high performance fieldprogrammable oscillators utilizes a proven silicon MEMS technology to provide excellent jitter and stability over a wide range of supply voltages
Features. 1 CE Input Pullup
CMOS Oscillator MM8202 PRELIMINARY DATA SHEET General Desription Features Using the IDT CMOS Oscillator technology, originally developed by Mobius Microsystems, the MM8202 replaces quartz crystal based
ICS650-40A ETHERNET SWITCH CLOCK SOURCE. Description. Features. Block Diagram DATASHEET
DTSHEET ICS650-40 Description The ICS650-40 is a clock chip designed for use as a core clock in Ethernet Switch applications. Using IDT s patented Phase-Locked Loop (PLL) techniques, the device takes a
NB3N502/D. 14 MHz to 190 MHz PLL Clock Multiplier
4 MHz to 90 MHz PLL Clock Multiplier Description The NB3N502 is a clock multiplier device that generates a low jitter, TTL/CMOS level output clock which is a precise multiple of the external input reference
DSC2022. Low-Jitter Configurable Dual LVPECL Oscillator. Features. General Description. Block Diagram. Applications
General Description The DSC2022 series of high performance dual output oscillators utilize a proven silicon MEMS technology to provide excellent jitter and stability while incorporating additional device
VX-805 Voltage Controlled Crystal Oscillator
VX-805 Voltage Controlled Crystal Oscillator VX-805 Description The VX-805 is a Voltage Control Crystal Oscillator that operates at the fundamental frequency of the internal crystal. The crystal is a high-q
Features. Applications
Ultra-Precision, 8:1 MUX with Internal Termination and 1:2 LVPECL Fanout Buffer Precision Edge General Description The is a low-jitter, low-skew, high-speed 8:1 multiplexer with a 1:2 differential fanout
PI6C49X0204A. Low Skew 1 TO 4 Clock Buffer. Features. Description. Block Diagram. Pin Assignment
Features ÎÎLow skew outputs (250 ps) ÎÎPackaged in 8-pin SOIC ÎÎLow power CMOS technology ÎÎOperating Voltages of 1.5 V to 3.3 V ÎÎOutput Enable pin tri-states outputs ÎÎ3.6 V tolerant input clock ÎÎIndustrial
Low-Jitter, 8kHz Reference Clock Synthesizer Outputs MHz
19-3530; Rev 0; 1/05 Low-Jitter, 8kHz Reference General Description The low-cost, high-performance clock synthesizer with an 8kHz input reference clock provides six buffered LVTTL clock outputs at 35.328MHz.
DSC400. Configurable Four Output, Low Jitter Crystal-less Clock Generator. General Description. Block Diagram. Applications.
DSC400 Configurable Four Output, Low Jitter Crystalless Clock Generator General Description The DSC400 is a four output crystalless clock generator. It utilizes Micrel s proven PureSilicon MEMS technology
MK74CB218 DUAL 1 TO 8 BUFFALO CLOCK DRIVER. Description. Features. Block Diagram DATASHEET. Family of IDT Parts
DTSHEET MK74CB218 Description The MK74CB218 Buffalo is a monolithic CMOS high speed clock driver. It consists of two identical single input to eight low-skew output, non-inverting clock drivers. This eliminates