Features. Pout: +9 dbm. Parameter Min. Typ. Max. Units

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1 Typical Applications Phase-Locked Oscillator for: SAT Radio Point-to-Point & Point-to-Multi-Point Radio Test Equipment & Industrial Controls Military End-Use Functional Diagram Features Pout: +9 dbm Phase Noise: -11 KHz Typ. Single Supply: 34 ma 28 ma 24 Lead 4x4mm QFN Package: 9 mm 2 General Description The HMC535LP4 & HMC535LP4E are GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC PLOs. The PLO s phase noise performance is excellent over temperature, shock, and process due to the oscillator s monolithic structure. Power output is +9 dbm typical from a +5 supply voltage. All functions (CO, Op-Amp, PFD, Prescaler) are fully integrated while providing allowances for off-chip customer specifi c loop components. The PLO MMIC accepts a single-ended or a differential reference oscillator input signal in the range of 23 to 24 MHz, and a digital Lock Detector (LD) output is provided to confi rm the status of the loop. The phase-locked oscillator is packaged in a leadless QFN 4 x 4 mm surface mount package. Electrical Specifications, T A = +25 C Power Supplies: CO oltage CO Current Op-Amp oltage Op-Amp Current Digital oltage Digital Current PLO Characteristics: RF Operating Freq. RF Power Reference Input Freq. Reference Input Power RF Phase Noise Locking Time Lock Detect Output Locked Unlocked Parameter Min. Typ. Max. Units cc1 Icc1 cc2 Icc2 cc3 Icc3 1 KHz offset Loop BW = 1 MHz ma ma ma GHz dbm MHz dbm dbc/hz μs ave ave - 162

2 Electrical Specifications, (Continued) CO Characteristics: RF Operating Freq. RF Power RF Tuning Sensitivity Tuning oltage Leakage Current RF Phase Noise RF Harmonics RF Pushing RF Pulling RF Drift Rate 3 db Modulator Bandwidth Phase Frequency Detector: REF Input Capacitance REF Input Resistance REF Input SWR Output High oltage Output Low oltage Phase Noise Op-Amp Characteristics: Input Offset oltage Input bias Current Large-Signal oltage Gain Common Mode Rejection Ratio Input Common Mode Range Power Supply Rejection Ratio Output oltage Swing Low Output oltage Swing High Gain Bandwidth Product Slew Rate Phase Margin Input oltage Noise Prescaler (Divider) Characteristics: Prescaler Division Phase Noise Parameter Min. Typ. Max. Units tune +2 to +9.5 tune to +2 tune +9.5 to + tune +2 to khz offset 1/2 F OP 3/2 F OP 4/2 F OP 5/2 F OP SWR 2:1 any phase T CO input Referenced to 5 Ohms CM = 2.5, 5.2 CM = 2.5, 5.2 Open Loop, No Load CM = 2.5 Frequency = 1 MHz CM = 2.5 Frequency = 1 MHz No Load, I SINK = 5 ma No Load I SOURCE = 5 ma Frequency = 6 MHz A = 1, No Load O = 1 Open Loop Frequency = 1 khz cc cc3 cc :1 cc GHz dbm MHz/ MHz/ MHz/ μa dbc/hz dbc dbc dbc dbc MHz/ MHz MHz/ C MHz pf Ohm dbc/hz m μa db db db MHz /μs Deg n / sqrt (Hz) dbc/hz - 163

3 PLO Performance Plots Reference 15 GHz BW = 1 MHz, Ref. Frequency = 234 MHz OUTPUT POWER (db) Center = 15 GHz Span = 6 MHz Res. Bandwidth = 1 khz ideo Bandwidth = 1 khz -75 dbc FREQUENCY (GHz) SSB PHASE NOISE (dbc/hz) 234 MHz GHz Locked RF Signal BW = 1 MHz, Ref. Frequency = 234 MHz OUTPUT POWER (db) Phase Noise Performance Fref. = 234 MHz RF = 15 GHz Pref. = 5 dbm Center = 15 GHz Span = 5 MHz Res. Bandwidth = 3 khz ideo Bandwidth = 3 khz C FREQUENCY (GHz) OFFSET FREQUENCY (Hz) CO Performance Plots Frequency vs. Tuning oltage, T = 25 C Frequency vs. Tuning oltage, cc1 = OUTPUT FREQUENCY (GHz) cc= 4.75 cc= 5. cc= 5.25 OUTPUT FREQUENCY (GHz) C TUNING OLTAGE (OLTS) TUNING OLTAGE (OLTS) - 164

4 CO Performance Plots (continued) Sensitivity vs. Tuning oltage, cc1 = +5 6 Output Power vs. Tuning oltage, cc1 = SENSITIITY (MHz/OLT) C OUTPUT POWER (dbm) C TUNING OLTAGE (OLTS) SSB Phase Noise vs. Tuning oltage SSB PHASE NOISE (dbc/hz) khz offset 1 khz offset TUNING OLTAGE (OLTS) SSB Phase tune = +5 SSB PHASE NOISE (dbc/hz) C TUNING OLTAGE (OLTS) OFFSET FREQUENCY (Hz) Phase-Frequency Detector Performance Plots Error oltage vs. Temperature Pin = dbm, Fin = 235 MHz 1.2 SSB Phase Noise Performance Pin = dbm, T = 25 C ERROR OLTAGE (dc) C SSB PHASE NOISE (dbc/hz) p -p/2 p/2 p PHASE DIFFERENCE (rad) OFFSET FREQUENCY (Hz) - 165

5 Absolute Maximum Ratings cc1 cc2 cc3 Reference Input Power Outline Drawing +5.5 dc +13 dc +5.5 dc +13 dbm tune to +13 Channel Temperature 135 C Continuous Pdiss (T = 85 C) (derate 47 mw/ C above 85 C) 2.35 W Storage Temperature -55 to +5 C Operating Temperature -4 to +85 C v1.19 ELECTROSTATIC SENSITIE DEICE OBSERE HANDLING PRECAUTIONS Typical Supply Currents vs. 15 GHz Output cc1 () Icc1 (ma) cc2 () Icc2 (ma) cc3 () Icc3 (ma) Package Information NOTES: 1. LEADFRAME MATERIAL: COPPER ALLOY 2. DIMENSIONS ARE IN INCHES [MILLIMETERS] 3. LEAD SPACING TOLERANCE IS NON-CUMULATIE. 4. PAD BURR LENGTH SHALL BE.15mm MAXIMUM. PAD BURR HEIGHT SHALL BE.5mm MAXIMUM. 5. PACKAGE WARP SHALL NOT EXCEED.5mm. 6. ALL GROUND LEADS AND GROUND PADDLE MUST BE SOLDERED TO PCB RF GROUND. 7. REFER TO HITTITE APPLICATION NOTE FOR SUGGESTED LAND PATTERN. Part Number Package Body Material Lead Finish MSL Rating Package Marking [3] [1] H535 HMC535LP4 Low Stress Injection Molded Plastic Sn/Pb Solder MSL1 XXXX [2] H535 HMC535LP4E RoHS-compliant Low Stress Injection Molded Plastic 1% matte Sn MSL1 XXXX [1] Max peak refl ow temperature of 235 C [2] Max peak refl ow temperature of 26 C [3] 4-Digit lot number XXXX - 166

6 Pin Descriptions Pin Number Function Description Interface Schematic 1-3, 5, 6, N/C No Connection. These pins may be connected to RF/ DC ground. Performance will not be affected. 4 tune CO control voltage input. 7, 9 GND This pin must be connected to RF / DC ground. 8 RFOUT RF output (AC coupled). 1 cc1 CO Supply oltage, OP-AMP OUT Op-Amp output voltage. cc2 Op-amp Supply oltage, IN- Op-amp negative input voltage. 14 IN+ Op-amp positive input voltage

7 Pin Descriptions (Continued) Pin Number Function Description Interface Schematic 15 REF PFD reference input. (This pin must be DC blocked externally) 16 NREF PFD reference input compliment. (This pin must be DC blocked externally) 17 NU PFD not up output. 18 ND PFD not down output. 19 LD PFD lock detector output. 2 cc3 Digital circuitry supply voltage, +5. Package Base GND Package bottom has an exposed metal paddle that must be connected to RF / DC ground

8 Application Circuit - 169

9 Evaluation PCB The circuit board used in the fi nal application should use RF circuit design techniques. Signal lines should have 5 ohm impedance while the package ground leads and backside ground paddle should be connected directly to the ground plane similar to that shown. A sufficient number of via holes should be used to connect the top and bottom ground planes. The evaluation board should be mounted to an appropriate heat sink. The evaluation circuit board shown is available from Hittite upon request. - 17

10 List of Materials for Evaluation PCB [1] Item Description J1 - J3 PCB Mount SMA RF Connector J4 DC Pin C1, C4, C14, C μf Tantalum Capacitor C2, C3, C5, C15 1, pf Capacitor, 63 Pkg. C6, C11.1 μf Capacitor, 42 Pkg. C7, C8 33 pf Capacitor, 42 Pkg. C9, C1.1 μf Capacitor, 63 Pkg. C 18 pf Capacitor, 42 Pkg. C13.1 μf Capacitor, 42 Pkg. C17 22 pf Capacitor, 42 Pkg. R1, R4 432 Ohm Resistor, 42 Pkg. R2, R3 4.2 k Ohm Resistor, 42 Pkg. R5, R6 232 Ohm Resistor, 42 Pkg. R7, R9 1k Ohm Resistor, 42 Pkg. R8 62 Ohm Resistor, 42 Pkg. R1 Ohm Resistor, 42 Pkg. R k Ohm Resistor, 42 Pkg. R 549 Ohm Resistor, 42 Pkg. R13 1 k Ohm Resistor, 42 Pkg. R14 51 k Ohm Resistor, 42 Pkg. R Ohm Resistor, 42 Pkg. D1 Green LED, 63 Pkg. Q1 MMBT394, SOT26 Pkg. U1 HMC535LP4 / HMC535LP4E PLO U2 LM293MX PCB [2] Eval Board [1] Reference this number when ordering complete evaluation PCB [2] Circuit Board Material: Rogers