Research and Design on Digital PFC of 2kW On-board Charger
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1 Wrld Electrc Vehcle Jurnal Vl. 4 - ISSN WEVA Page0000 EVS5 Shenzhen, Chna, Nv 5-9, 00 esearch and Desgn n Dgtal PFC f kw On-bard Charger Xng Yun,, Huang Yu, Zhng Zamn and Zhang Tng, Cllege f Autmtve, Tngj Unversty Shangha 0805, Chna Shangha Fuel Cell Vehcle Pwertran C., td Shangha 0805, Chna Emal:xngyun@fcv-sh.cm Abstract Ths paper researches and desgns a dgtal cntrlled bst pwer factr crrectn (PFC) f kw n-bard charger wth the methd f cntnuus cnductn mde (CCM), whch s based n the DSP f TMS30F80. Multple-lp cntrl strategy wth the nstantaneus uter vltage lp and nner current lp s used n the PFC cnverter. The results cnfrm that dgtal cntrllers are able t be used fr hgh perfrmance PFC cnverters. Key wrds:dpfc,on-bard Charger,CCM,EV. Intrductn Electrc vehcles (EV) are majr develpment drectn f the future clear energy vehcles. Hwever, the chargng system s the premse and fundatn. In a brad sense, electrc car chargng devce refers t the general called f electrcal energy frm the publc pwer grd r the pwer devce that translate nt varus mdes f electrchemcal energy battery. Ths paper s manly n bard charger. Wth the ppularty f electrc vehcles, n-bard charger wll enter mre and mre famles. If the n-bard charger usng the methd f tradtnal dde brdge rectfer plus electrlytc capactr flter nt nly lw pwer factr (abut 0.7), but als cntans large amunts f nput current harmncs that wll cause harmnc pllutn n the grd. Pwer factr crrectn s necessary fr ac-t-dc swtched mde pwer supply n rder t cmply wth the requrements f nternatnal standards, such as IEC and IEEE-59. PFC can reduce the harmncs n the lne current, ncrease the effcency and capacty f pwer systems, and reduce custmers utlty blls. In rder t acheve unty pwer factr n the swtched mde pwer supply, many cntrl methds are explred, ncludng average current cntrl [], peak current cntrl [], hysteretc cntrl [3], nnlnear carrer cntrl [4], etc. All f these EVS5 Wrld Battery,Hybrd and Fuel Cell ElectrcVehcle Sympsum
2 Wrld Electrc Vehcle Jurnal Vl. 4 - ISSN WEVA Page00003 cntrl methds have been mplemented by the analg crcuts. Wth the develpment f dgtal technques, mre and mre cntrl algrthms are mplemented n pwer electrncs crcuts by the dgtal chps, such as mcrprcessrs r dgtal sgnal prcessrs (DSPs). One reasn s that dgtal cntrl can mplement mre cmplcated algrthms. Anther reasn s that dgtal cntrl has many advantages ver analg cntrl, ncludng prgrammablty, adaptablty, lw part cunt and reduced susceptblty t envrnmental varatns, etc [5]. In addtn, t s mre easly functn extensn. The purpse f ths paper s t ntrduce a dgtal PFC (DPFC) f KW n-bard charger. In ths paper, the structure f the bst PFC cnverter s presented. Furthermre, a desgn prcess fr bth the current and the vltage lps s presented. Fnally wavefrms are cnfrmed the perfrmance f the dgtal cntrllers.. Bst Pwer Factr Crrectn Crcut When cnvertng AC t DC, all pwer cnverters must meet PF standards (e.g., IEC ) gven a szable harmnc generatn f current [6]. The man apprach t ncrease the pwer factr s t cntrl the nput current s that t tracks the nput vltage wavefrm even f ts magntude s dfferent. In a bst cnverter the nductr s current s the nput current; therefre, nductr current cntrl can be appled t frce the nductr current t fllw a reference current that has the rectfed vltage wavefrm. In the bst tplgy the utput vltage V must always be greater than the nstantaneus lne vltage. Snce the unversal lne vltage s defned as an AC vltage that vares between 85 and 70 Vrms, an utput vltage frm 380 V t 400 V wll satsfy the desred range f peratn. The bulk capactr s usually chsen based n hld up tme requrements (between 6 and 0 ms [7]). The nductr, hwever, s selected s that the PFC pwer stage perates n cntnuus cnductn mde (CCM). 3. Pwer Stage n Cntnuus Cnductn Mde Fgure shws the bst PFC cnverter and ts cntrllers based n DSP. The pwer stage f the PFC s mdeled based n the behavr f the bst cnverter n CCM. Usng state space averagng, the bst cnverter n CCM can be explaned as n () thru (3) V DV v C c DI I V vc c V V D () () (3) Where, vc are small sgnal varatns f nductr current and capactr vltage, and I and Vc are the large sgnal nes. V, I, and D are the large sgnals f utput vltage, utput current dsturbance and duty cycle., C, c, and are cnverter nductr, cnverter capactr, capactr equvalent seres resstr and lad resstr. Ths mdel s used fr cnverter smulatn and ts small sgnal equvalent s used t fnd the pen lp transfer functns. Ths crcutry ncludes bst crcut, A/D and TMS30F80 cntrl systems. The cmplete PFC cntrl system ncludes three lps: a fast current lp, a slw vltage lp, and a lw-pass feed frward flter [8], The bjectve EVS5 Wrld Battery,Hybrd and Fuel Cell ElectrcVehcle Sympsum
3 Wrld Electrc Vehcle Jurnal Vl. 4 - ISSN WEVA Page00004 f the current lp s t frce the nput current t fllw the rectfed nput vltage wavefrm fr the pwer factr requrement. The vltage lp s used t regulate the utput vltage arund V by specfyng the ampltude f the nductr current. The feed-frward flter deals wth the energy unbalance that can eventually ccur n the system due t an abrupt varatn at the nput [8]. lp s ne tenth f the swtchng frequency. At frequences well abve lne frequency, the nput and utput vltages can be cnsdered cnstant. Usng the small-sgnal mdel f the averaged system f a bst cnverter, whle neglectng the seres resstance f the nductr and capactr, the transfer functn f the cntrl t nductr current can be derved as n (4) [0], AC AD Vn AD Kff PWM PID Iref vpid Zer Crss Detectn S PID D C C VO/IO + errer + AD - Vref DC/DC TMS30F808 Fgure : The bst PFC n CCM based n DSP d V D sc s s D D C (4) Ths transfer functn can be apprxmated at hgh frequences as shwn n (5): d V ˆ d ˆ s (5) The current lp blck dagram s shwn n fgure. 4. Dgtal Cntrl Desgn f ref + - e CA d Bst PFC The pwer stage specfcatns are: Input vltage: V =0VAC±5% PFC Output vltage: V = 380V PFC Output pwer: P = W Swtch frequency: FS = 0kHz Output flterng capactr: C = 40uF Bst nductance: =.mh 4.. Inner Current p Desgn T desgn a hgh perfrmance pwer factr crrectn crcut, t s necessary t decuple the system by separatng the pwer factr requrements and the utput vltage regulatn. The current lp bandwdth s t be much hgher than the lne frequency s that t s able t fllw the vltage wavefrm s fast varatns at ts zer crssng pnts [9]. On the ther hand, n a swtchng cnverter, the bandwdth shuld be much smaller than the swtchng frequency. The bandwdth f current Where CA K c Fgure : The current lp blck dagram K k pe j0 k K e j Kdek ek, Kp, K and Kd are prprtnalty ceffcent, Integral ceffcent and Dervatve ceffcent. Kc s the nductr s current gan. 4.. Outer Vltage p Desgn T smplfy analyss, the mdel f the vltage lp s based n three assumptns. The frst s that the current lp s deal, whch mples that the nput current s perfectly trackng the nput vltage wth unt pwer factr. The secnd s that the vltage lp s very slw t cmpensate fr the lne frequency vltage rpple f the utput vltage. The last EVS5 Wrld Battery,Hybrd and Fuel Cell ElectrcVehcle Sympsum 3
4 Wrld Electrc Vehcle Jurnal Vl. 4 - ISSN WEVA Page00005 assumptn s that the average nput pwer durng each cycle s equal t the utput pwer. The bandwdth f the vltage lp s much less than the ac lne frequency t mnmze the dstrtn that can be generated n the nput current due t the secnd harmnc that s prduced n the utput f the multpler, whch creates the current reference. Under the frst assumptn: ref K c K ff P V rms K V U K K V U sn t f sn t v ff f rms (6) (7) Where Kff, Kf are the feed frward gan and the nput vltage gan. Uv s the utput f vltage lp. P s nput pwer. Under the secnd assumptn: P P V I (8) The transfer functn f the vltage lp fr a resstve lad s shwn by (9), vˆ K vvrms vc vˆ V sc c vˆ c (9) Where s the utput f the vltage cmpensatr. The vltage lp blck dagram s shwn n fgure 3. v ceffcent, Integral ceffcent and Dervatve ceffcent. Kv s the utput vltage gan Sftware Structure Start System Intalzatn Varable Intalzatn Status detectr Interrupt Intalzatn Interrupt atency Start Y A/D Samplng Vltage lp PID U v Feld Prtectn A/D Samplng N Stp and Fault Dsplay Zer Crss Detectn Cmpensatn Calculate I ref Current lp PID PWM Feld esume Vref + - e VA vc K v Fgure 3: The vltage lp blck dagram Where VA K k pe j0 k Ke j Kd ek ek Kp, K and Kd are prprtnalty, V Fgure 4: The man prgram and the nterrupt servce subprgram. The cntrl prcedures by the man prgram and nterrupt servce subprgram, the prgram s nly ne nterrupt servce rutne t avd nterrupt nestng, and mprve the relablty f the prgram. Only the current lp s n the nterrupt prgram. The sftware structure s shwn n fgure esults EVS5 Wrld Battery,Hybrd and Fuel Cell ElectrcVehcle Sympsum 4
5 Wrld Electrc Vehcle Jurnal Vl. 4 - ISSN WEVA Page00006 The DPFC s part f n-bard charger. S the expermental data s based n the charger, where Kp=0.6, K =0.0 and Kd =0.05, Kp=0., K =0.09 and Kd = 0.005, Kff = The PFC utput vltage V (V = 380V) wavefrm s shwn n Fgure 5. The utput vltage rpple s 0V at full lad. Applcatns f dgtal cntrllers are becmng mre and mre wdespread n pwer electrnc cnverters. Ths paper ntrduces a DPFC f kw n-bard charger wth the methd f cntnuus cnductn mde. As shwn as Fgure 9, the pwer factr s 99.68% at full lad, and 93.38% at 0% lad. The results cnfrm that dgtal cntrllers are able t be used fr hgh perfrmance PFC cnverters. The charger s used n the Shangha Wrld Exp f clear energy vehcles. Fgure 5: The PFC utput vltage V wavefrm (50V/dv) The wavefrms f 0VAC and nductr current I are shwn n Fgure 6 at lght lad. The wavefrms f Vn and I are shwn n Fgure 7 at full lad. And the wavefrms f 0VAC vltage and current are shwn n Fgure 8 at full lad. Pwer factr 00% 99.68% 99.36% 98.40% 96.7% 95% 93.38% 90% 85% 80% 00% 90% 50% 30% 0% Fgure 9: The pwer factr change frm full lad t lght lad eference Fgure 6: 0VAC and nductr current I at lght lad (00V/dv, 4A/dv) Fgure 7: Vn and I wavefrm at Full lad (00V/dv, 4A/dv) Fgure 8: AC vltage and current wavefrm at full lad (00V/dv, 4A/dv) 6. Cnclusns [] P. C. Tdd, UC3854 cntrlled pwer factr crrectn crcut desgn, U-34, Unt rde Applcatn Nte, pp []. edl and B. P. Ersman, educng dstrtn n peak-current-cntrlled Bst pwer-factr crrectrs, n Prc. IEEE Appled Pwer Electrncs Cnf. Exp, 994, pp [3] J. Spangler and A. Behera, A cmparsn between hysteretc and fxed frequency Bst cnverters used fr pwer factr crrectn, n Prc. IEEE Appled Pwer Electrncs Cnf. Exp, 993, pp [4].Zane and D.Maksmvc, Nnlnear-carrer cntrl frhgh-pwer-factr rectfers based n up-dwn swtchng cnverters, IEEE Trans. Pwer Electrn., vl. 3, pp. 3, Mar [5]Wangfeng Zhang, uang Feng, Yan-Fe u. A Dgtal Pwer Factr Crrectn (PFC) Cntrl Strategy Optmzed fr DSP. IEEE EVS5 Wrld Battery,Hybrd and Fuel Cell ElectrcVehcle Sympsum 5
6 Wrld Electrc Vehcle Jurnal Vl. 4 - ISSN WEVA Page00007 TANSACTIONS ON POWE EECTONICS. Vl.6, NO.6, p [6]J. e Bunetel and M. Machmum, Cntrl f Bst unty Pwer Factr Crrectn Systems, IEEE Transactns n Pwer Electrncs 999, pp [7]I. D andau, 990 System Identfcatn and Cntrl Desgn. Prentce Hall, NJ. [8] TMS30F/C40x DSP Cntrllers eference ude: System and Perpherals, Texas Instruments nc [Onlne]Avalable: /spru357.pdf [9]Manjng Xe, 003: Dgtal Cntrl Fr Pwer Factr Crrectn. M.S. Thess, Center fr Pwer Electrncs Systems, Vrgna Plytechnc Insttute and State Unversty, Blacksburg, Vrgna, pp [0]. B. dley, Average small-sgnal analyss f the bst pwer factr crrectn crcut, VPEC Semnar Prceedngs, 989, pp Za-mn Zhng Clean Energy Autmtve Engneerng Center f Tngj Unversty, N.4800, Ca An ad, Jadng Dstrct Shangha 0805, P..C Tel: Fax: (0) Emal: zm_zhng@tngj.edu.cn Authr Xng Yun Shangha Fuel Cell Vehcle Pwertran C., td,, NO.6988, Jasng ad, N.Jadng Dstrct Shangha 0805,P..C Tel: Fax: (0) Emal:xngyun@fcv-sh.cm Huang Yu Shangha Fuel Cell Vehcle Pwertran C., td,, NO.6988, Jasng ad, N.Jadng Dstrct Shangha 0805,P..C Tel: Fax: (0) Emal:huangyu@fcv-sh.cm EVS5 Wrld Battery,Hybrd and Fuel Cell ElectrcVehcle Sympsum 6
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