Digital Control Double Loop Design. Tutorial April 2016-

Transcription

1 Tutorial April 2016-

2 How to Contact: This SmartCtrl Tutorial by Carlos III University is licensed under a Creative Commons Attribution 4.0 International License: You are free to: Share copy and redistribute the material in any medium or format Adapt remix, transform, and build upon the material for any purpose, even commercially. The licensor cannot revoke these freedoms as long as you follow the license terms. Under the following terms: Attribution You must give appropriate credit, provide a link to the license, andindicate if changes were made. You may do so in any reasonable manner, but not in any way that suggests the licensor endorses you or your use. No additional restrictions You may not apply legal terms or technological measures that legally restrict others from doing anything the license permits. Based on a work at SmartCtrl by Carlos III University of Madrid. GSEP Power Electronics Systems Group The software SmartCtrl described in this manual is furnished under a license agreement. The software may be used or copied only under the terms of the license agreement.

3 Table of contents 1. Introduction

4 1. Introduction SmartCtrl 1 is a general-purpose controller design software specifically for power electronics application. This tutorial is intended to guide you, step by step, to design the digital control loop of a buck converter and simulate it with PSIM. This document is the second part of the document Digital Control Loop Design. The Digital control feature is only available in the SmartCtrl 2.0 Pro. The design procedure begins with the design of the analog control loop. After that, the analog regulators are translated into the digital domain taking into account several specific parameters of the digital design. In this document, only the key points of the digital double loop (Buck LCS_VMC) are shown. For a more detailed tutorial about digital control design, please, refer to the tutorial entitled Digital Control Loop Design. (a) (b) (c) Figure 1 Inner loop parameters. 1 SmartCtrl is copyright by Carlos III University of Madrid, GSEP Power Electronics Systems Group, Spain - 3 -

5 First, the inner loop parameters are selected. In Figure 1 plant, sensor and regulator (modulator) parameters are shown. When designing the inner loop (current loop), it is used a Hall effect sensor as antialiasing filter. Since the quantity that is sampled (current trough the inductor) has a high ripple, when sampling under the Nyquist frequency (typically the switching frequency), antialiasing filter should be used, or an adequate synchronization with the ripple waveform must be ensured. In this case, the pole frequency of the Hall effect sensor is 10 khz ( Error! No se encuentra el origen de la referencia.c). It is taken into account in the loop design. After selecting plant, sensor and regulator (modulator) parameters, the cross over frequency fc and the phase margin PM desired for the inner control loop are selected using the graphical aid of the Solution Map (Figure 2). Figure 2 Solution map corresponding to the inner control loop design. Once inner loop is calculated, outer voltage loop can be defined. In Figure 3 outer voltage loop parameters are defined. In this case, the plant is already defined and the sensor has to be selected. Only the regulator type is chosen, since there is no modulator for the outer control loop. After selecting these parameters, cross over frequency fc and phase margin PM have to be selected for the outer loop in the Solution Map (Figure 4)

6 Figure 3 Outer loop sensor parameters sensor. Figure 4 Solution map corresponding to the outer loop control design At this point, analog control loop has been calculated. Then, by clicking in the Digital settings icon, the dialog box asking for digital loop parameters (sampling frequency, bits number and accumulated delay) appears. Note that different parameters can be used for the inner loop and the outer loop. In this case, both loops have the same sampling frequency (equal to the switching frequency), the same number of bits (16) and the same accumulated delay. By checking the check-box Calculate digital compensator and clicking in the OK button, both inner and outer digital regulators are calculated

7 Figure 5 Digital settings dialog box for both the inner and the outer loop The button export to PSIM (schematic) allows exporting the entire design to PSIM (see the document Digital control loop design for more detail. The result is shown in Figure 6. In this schematic, the additional elements to perform an AC analysis of the outer loop are shown

8 Figure 6 PSIM schematic corresponding to the double loop design. Additional elements to measure the outer voltage loop have been added. In order to simulate the digital open loop transfer function corresponding to the inner loop, more additional elements are added to the schematic. First, the outer loop is disabled, and then an adder, a sinusoidal voltage source and an AC probe are added to perform the AC sweep and measure the current loop

9 Loop measurement Disable Outer Loop Figure 7 Inner control loop measurement. Outer voltage is disabled. Comparison results between SmartCtrl and PSIM simulation are shown in Figure 8. Good agreement at low and medium frequencies is achieved

10 Outer Loop Inner Loop Figure 8 Comparison between simulation with PSIM (red)and SmartCtrl calculations (blue)