AC20W 12V. 20W/12Vdc, 5Vdc DUAL OUTPUT 115Vac INPUT POWER SUPPLY. Providing two isolated output voltages

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1 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY Providing two isolated output voltages and up to 0W con nuous output power, the AC0W V is op mized for 5Vac/ Hz single phase RTCA/ DO 60G airborne applica ons. The AC0W V is capable of providing up to 0W output during momentary input AC interrupt condi ons for greater than 00mSec. Weighing less than 6 ounces, the AC0W V is constructed on a mul layer PWB occupying ~5in. Component height is less than 0.70 except for the area of the supply containing holdup capacitors; in this area maximum height is less than.6. Interconnec on is accomplished using two ver cally mounted TE connectors. The AC0W V is designed and manufactured to stand up to the harsh opera ng environments encountered in today s aircra installa ons. FEATURES Efficiency: 74% typical at full rated output load Wide input range: 97 34Vac, Hz Inrush current limi ng: < 6Apk Size: 5 x 3 ; Weight: less than 6 ounces Two isolated DC outputs: +V (switched), +5Vstby (unswitched) Independent over current and over voltage protec on on each output Output DC valid status line (TTL) Over temperature fault signal (TTL) MTBF:,040,000 Hours, RIAC 7Plus, Aic category, 50 C case temperature, 65%DC, 90 Cycles/ year AC0W V SPECIFICATION, REV 04/06/6

2 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY STANDARD OUTPUTS PARAMETER OUTPUT VOLTAGE +V +5Vstby Voltage Regula on V ± % 5.05V ± 3% Output Current.65A 50mA Maximum Load 9.8W.W Minimum Load 50mA 0A Pk pk Ripple + Noise (0MHz) < 0mVpp < 50mVpp Overcurrent Trip point.0a 600mA SPECIFICATIONS RTCA/DO 60G, sec on 4, al tude/ temperature (opera ng) to 5,000 feet, category A equipment RTCA/DO 60G, sec on 6, humidity (opera ng) category A RTCA/DO 60G, sec on 7, shock (opera ng) category S, curve C RTCA/DO 60G, sec on 8, vibra on (opera ng) category S, curve C RTCA/DO 60G, sec on 5, magne c effect, category B RTCA/DO 60G, sec on 6, power input requirements for AC input, category A(WF) equip, excludes harmonic distor on RTCA/DO 60G, sec on 7, voltage spike, category B equipment RTCA/DO 60G, sec on 8, conducted suscep bility, category Z equipment RTCA/DO 60G, sec on 9, induced signal suscep bility, category Z equipment RTCA/DO 60G, sec on 0, conducted and radiated suscep bility, category T equipment RTCA/DO 60G, sec on, conducted and radiated emissions, category M equipment, with external power line EMI Opera ng temperature: 5 C to +70 C, no forced air required Storage temperature: 55 C to +85 C AC0W V SPECIFICATION, REV 04/06/6

3 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY INTERCONNECTION SUPPLY SIDE CONNECTORS AND PIN OUTS Connector J J Pin # TE P/N TE P/N n/c n/c Chassis Gnd DCRTN 3 n/c DCRTN 4 Line DCRTN 5 n/c +Vout 6 Neutral DCGOOD L 7 n/c 8 OUTPUTEN L 9 DCRTN 0 OVERTEMP L +Vout +5Vstby AC0W V SPECIFICATION, REV 04/06/6 3

4 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY MECHANICAL DIAGRAM DETAIL DIMS MOUNTING HOLES AND CONNECTORS.7.9 HIGHEST COMP X X.0 X.0.57 X.03 3X.3 OUTLINE OR DETAILED SOLIDWORKS DRAWING FURNISHED UPON REQUEST AC0W V SPECIFICATION, REV 04/06/6 4

5 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY ELECTRICAL SPECIFICATIONS UNLESS OTHERWISE SPECIFIED THE FOLLOWING TEST CONDITIONS APPLY: Ta = 5 C. CONSTANT ACTIVE LOADS APPLIED TO OUTPUTS, Vin = 5Vrms/ 400Hz. INPUT CHARACTERISTICS PARAMETER AC0W V REMARKS NOTES INPUT VOLTAGE RANGE 97 34Vrms Complies with normal/ abnormal input voltages for AC opera on per RTCA/DO 60G, Sec on 6, Category A EFFICIENCY (FULL LOAD) 74% typical Full rated output load (W) EFFICIENCY (50% LOAD) 70% typical Half rated output load (0.5W) INPUT CURRENT 50mArms at 5Vrms Full rated output load (W) INRUSH CURRENT < 6Apk Cold start START UP TIME <750mSec Outputs within regula on CONDUCTED EMISSIONS RTCA/DO 60G, Sec on Category M equipment, Requires external power line filter (such as Schaffner p/n FN030 06) QUIESCENT POWER.5W typical Pout = 0W STORAGE TEMPERATURE RANGE 55 C TO +00 C Non opera onal OPERATING TEMPERATURE RANGE 5 C TO +70 C Q, Q4, CR9 mounted to external surface; no external airflow required OUTPUTEN L Pull to <Vdc with respect to DCRTN in order to enable the +V output Internally pulled high to 5Vstby through 5.k pull up resistor. Pull to <Vdc with respect to DCRTN in order to enable +V output. 5Vstby output is unaffected by this signal AC0W V SPECIFICATION, REV 04/06/6 5

6 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY OUTPUT CHARACTERISTICS PARAMETER AC0W V REMARKS NOTES RATED OUTPUT POWER W Con nuous OUTPUT VOLTAGE TOLERANCE +V ± % +5.05V ± 3% See "STANDARD OUTPUTS" table TEMPERATURE STABILITY COEFFICIENT 0.0% / C Maximum output voltage dri with temperature OUTPUT RIPPLE + NOISE (pk pk) <0mVpp: +Voutput <50mVpp: +5Vstby output 0MHz Bandwidth MINIMUM OUTPUT LOAD +V output/ 50mA Supply requires a small minimum load in order to regulate the V output properly. No damage or overvoltage will occur within the supply if minimum load is not provided LINE REGULATION <0.5% Individual output devia on for ± 0% step change in input voltage LOAD REGULATION (TRANSIENT LOAD RECOVERY) Outputs remain within regula on limits 50% step change in individual output load currents HOLD UP TIME Pout = W Uninterrupted ride through for momentary power interrupt ISOLATION VOLTAGE INPUT TO OUTPUT ISOLATION VOLTAGE INPUT TO CHASSIS 500Vac No arcing or damage for 60 second test dura on 500Vac No arcing or damage for 60 second test dura on DC OUTPUT STATUS DCGOOD L Transi ons to TTL high (4V min) upon detec on of +V output measuring low by 6% for greater than msec. Secondary side referenced (w/ respect to DCRTN), 0mSec delay me, TTL level, ma max source current; 6mA max sink current OUTPUT OVERVOLTAGE PROTECTION (non latching) +V output is limited to 5% of nominal set point Pulse by pulse protec on, 4mSec fault to ac va on delay, auto restart OUTPUT OVERVOLTAGE PROTECTION (latching) +V set point = 5V +5Vstby set point = 6.V Supply will shutdown and remain disabled un l input AC power is recycled if OVP set points are detected internally OVERTEMP L STATUS SIGNAL Transi ons to 0.5V max level upon detec ng an internal opera ng temperature of +00 C +/ 7 C Supply provides status signal OVERTEMP L that asserts low when supply PWB temperature is sensed at 00 C, with ~ C hysteresis. OVERTEMP L signal is secondary side referenced w/ respect to DCRTN), capable of sinking 6mA Notes:. Ensured by design, not 00% tested in produc on.. 00% tested for specifica on compliance in produc on. AC0W V SPECIFICATION, REV 04/06/6 6

7 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY OUTPUT CHARACTERISTICS PARAMETER PFC00W V PBF REMARKS NOTES RATED OUTPUT POWER 00W Con nuous. Observe maximum allowable baseplate temperature; see applica on informa on for details. OUTPUT VOLTAGE.Vdc +/ % Minimum load to full load (00W). OUTPUT OVERCURRENT THRESHOLD 9A typical, 9.5A maximum Output voltage will foldback, auto recovery. No damage will occur to module during indefinite output short circuit condi ons. TEMPERATURE STABILITY COEEFICIENT 0.05% / C Output voltage varia on with temperature (500uV / C). OUTPUT RIPPLE + NOISE 80mVpp maximum 0MHz bandwidth. 00mVpp typical. Can be reduced with external capacitors, see applica on notes. LINE REGULATION <0.5% Output devia on for +/ 0% step change in input voltage. LOAD REGULATION Output remains in regula on 50% step change in output load. Full load to half load or half load to full load. 0uSec rise/fall me. MINIMUM LOAD 0A No minimum load is necessary. HOLD UP TIME 5mSec nominal No external hold up capacitor a ached. Requires external 50V rated capacitors to extend hold up me. May be affected by warm start delay, see applica on sec on for details. MAXIMUM EXTERNAL HOLD UP CAPACITANCE 800uF Specified in order to not overstress the internal inrush current limi ng circuit ISOLATION VOLTAGE INPUT TO CHASSIS 500Vac, 60Hz No arcing or damage for 60 second test dura on (3.0mArms max leakage)., 5 ISOLATION VOLTAGE INPUT TO OUTPUT 500Vac, 60Hz No arcing or damage for 60 second test dura on (3.0mArms max leakage)., 6 ISOLATION VOLTAGE OUTPUT TO CHASSIS 500Vdc No arcing or damage for 60 second test dura on (00Mohm min). DCPWRFAIL L (DP) Transi ons to TTL low (0.5Vmax) when Vdc output is detected outside of proper regula on window TTL level, 3mA max sink current. Time to ac va on on a fault is msec typical,.5msec maximum. AC0W V SPECIFICATION, REV 04/06/6 7

8 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY OUTPUT CHARACTERISTICS CONTINUED CONTINUED PARAMETER PFC00W V PBF REMARKS NOTES DCPWRFAIL L (DP) Transi ons to TTL low (0.5Vmax) when Vdc output is detected outside of proper regula on window TTL level, 3mA max sink current. Time to ac va on on a fault is msec typical,.5msec maximum. ACPWRFAIL L (AP) Transi ons to TTL low (0.5Vmax) upon detec on of invalid input AC ( 89Vrms from 0% 00% load) TTL level, 6mA max sink current, 5mSec maximum delay me to ac vate on loss of input AC. PFC 00Vdc OUTPUT 00Vdc ± 3% 0W Pout < 00W., 3 MINIMUM DC/DC CONVERTER OPERATING VOLTAGE 95Vdc Minimum amplitude for PFC output that will guarantee proper output regula on for the V output. OUTPUT OVERVOLTAGE PROTECTION 3.6V ± 3% Pulse by pulse protec on (inner loop), auto restart. OUTPUT OVERVOLTAGE PROTECTION (PFC 00Vdc OUTPUT) 46V ± 3% PFC output is clamped to this level if control loop regula on is lost, auto recovery. Notes:. Ensured by design, not 00% tested in produc on.. 00% tested for specifica on compliance in produc on Vdc PFC output voltage tolerance is +/ 5% for Pout < 0W. 4. May require small external inductor, common mode inductor or X capacitor installed on power lines for full compliance when installed in upper level assembly, see applica on sec on for details. 5. When performing input to chassis isola on voltage tes ng at the module level it is recommended to e the primary referenced terminals: Line, Neutral, LI, DD, +00V and PSRTN together and hi pot all of these with respect to chassis ground. 6. When performing input to output isola on voltage tes ng at the module level it is recommended to e the primary referenced terminals: Line, Neutral, LI, DD, +00V and PSRTN together and hi pot all of these with respect to all of the secondary referenced terminals which are also ed together (this includes AP, DP, GD, VO, SB, S+ and S ). AC0W V SPECIFICATION, REV 04/06/6 8

9 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY EFFICIENCY CURVE 85.0% 80.0% 75.0% Efficiency (%) 70.0% 65.0% 5Vrms 60.0% 55.0% Pout (Watts) AC0W V SPECIFICATION, REV 04/06/6 9

10 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY APPLICATIONS INFORMATION E E E3 F LINE A / 5Vac NEUT CHAS L RN mH /.5A L SUMIDA CDRH7 80uH /.55A C 00pF 50Vac C 00pF 50Vac C7 0.0uF 50Vac L N C IC PFC00W-V, -PbF AP DP GD V GD V ACPWRFAIL-L (TTL) DCPWRFAIL-L (TTL) Vout C3 C4 470uF uf 5V 5V DGND E4 E5 E6 E7 S+ PSRTN +00V mtg mtg mtg3 mtg4 S- C5 000pF 50Vac Ch/u 50Vdc C8 00pF 50Vac C6 000pF 50Vac C9 00pF 50Vac Typical Applica on Circuit AC0W V SPECIFICATION, REV 04/06/6 0

11 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY HOLD UP TIME The PFC00W series module provides two interconnec ng pins in order to extend hold up me with external capacitors. In order to extend module hold up me, polarized 50V (minimum) electroly c capacitors must be connected externally between the module s +00Vpin and PSRTN pin. Required external capacitance can be determined using the following formula: E = P * (t + t restart ) = (0.90) * {½ C h/u (total) (Vi Vf )} Where, P = output power (Wa s) t = desired hold up me (Seconds) t restart = warm start delay of approximately 0mSec upon reapplica on of input AC C h/u (total) = total hold up capacitance (Farads), includes internal 35uF (minimum) and external capacitance C h/u (ext) = external hold up capacitance (Farads) 0.90 factor cons tutes internal DC/DC converter efficiency Vi = Minimum PFC voltage of 94Vdc (00Vdc 3%) Vf = 00Vdc E = P * (t + t restart ) = (0.90) * {½ C h/u (Vi Vf )} In order to hold up 00W external power for 00mSec requires: C h/u (total) = {(00W) (00mSec + 0mSec)} {(/) (0.90) (94V 00V )} = 770uF C h/u (ext) = C h/u (total) 35uF = 770uF 35uF = 735uF (minimum) Use of 05 C, 50Vdc, 0% tolerance snap mount aluminum electroly c capacitors is recommended. For the example above, a total nominal capacitance of 0uF would be necessary to assure the required capacitance of 770uF was achieved. Warm start delay occurs for AC power interrupts greater than 5mSec as a result of combina on of me to reac vate PFC control circuitry, reini a on of PFC so start cycle and reaching module power limit. PLACEMENT, FLATNESS AND MOUNTING The PFC00W series modules may be flush mounted and soldered to a PCB. The baseplate (topside) may be mounted to a flat surface for heatsinking or to a stand alone heatsink. If moun ng the baseplate to a flat surface a thermal interface pad is recommended as some warpage of the module s aluminum baseplate may exist. Warpage of the baseplate surface (including bow and twist) occurs in the manufacturing of the internal thermal clad circuit board and is a result of high temperatures required during the lamina on process as well as during the panel cu ng process. Baseplate warpage is limited to 0.04 per 5 unit length. Temperature ac vated thermally conduc ve interface pads, such as Chomeric s T75 series, are suitable interface pads for this applica on. The PFC00W module contains 4 corner threaded #4 moun ng holes (see mechanical diagram for details). The standard moun ng hole configura on is par ally threaded; threaded approximately 0.44 through from the baseplate side of the module. AC0W V SPECIFICATION, REV 04/06/6

12 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY SOLDERING INFORMATION In order to minimize mechanical force exerted on the module pins, the module should be mechanically fastened to the printed circuit board prior to soldering each of the I/O pins. The pins are soldered internally to the module s horizontal through hole circuit board using a high temperature solder that allows for applica on of high heat for long me dura ons when soldering the module to an external circuit board without concern for re flow of the internal solder joints. The allowable heat applica on versus me dura on curve is shown below and should be adhered to in order to prevent re flow of the module pins internal solder joints IRON Solder Temperature (C) DIP SOLDER Solder Time (seconds) ROUTING CONSIDERATIONS Assure there is at least 4.mm between primary referenced and secondary referenced signals. Secondary referenced signals include AP, DP, V, V, GD, SB, S+ and S. Avoid rou ng secondary referenced signals directly beneath module on component layer. REMOTE SENSE LINES Remote sense capability is provided in order to margin up the V output to overcome small system level voltage drops in traces and connectors. If using the remote sense lines, the maximum allowable system level voltage drop (or combined differen al voltage between Vout and +SNS and DGND and SNS) is 700mV. Exceeding this amplitude may force the module s overvoltage protec on circuit to ac vate. If not using the remote sense line feature at a remote point of load, each sense line should be terminated at the output pins of the module (+SNS to Vout and SNS to DGND). Remote sense lines should be connected directly to the +V and DGND power forms prior to any addi onal induc ve filter elements that may be included. AC0W V SPECIFICATION, REV 04/06/6

13 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY CAPACITIVE LOADING AND PROPER POWER UP CONSIDERATIONS Avoid applying full (8.4A) load current to the module s output prior to allowing the output to reach at least 6Vdc to avoid module latchup when star ng. Module latch up can occur under certain power up modes (e.g., low line) if the module enters internal power limit prior to its internal bias voltages reaching minimum opera ng levels. If implemen ng ac ve loading on the modules output (constant current sink), assure that the turn on voltage of the ac ve load instrument is set to at least 6Vdc. If implemen ng external bulk capacitors on the module s V output, assure proper power up under all input line and output load condi ons. EMI CONSIDERATIONS Use of a chassis ground plane beneath module on first internal circuit board layer (beneath component layer) of PCB is recommended. Assure that sufficient isola on distance exists between chassis plane and each of the modules input and output pins such that there is at least 4.mm between primary referenced and secondary referenced signals. Although the PFC00W series modules contain internal common mode and differen al mode input filtering the use of a small external induc ve based line filter is recommended for EMI compliance. See applica on circuit for suggested filter arrangement. Reduce or eliminate line to line capacitance (C7) for applica ons opera ng at low power levels (<50W output) as it may have an adverse effect on input current harmonic distor on at higher line frequencies (e.g., 800Hz). If external hold up capacitors are more than 3 inches away from module, 000pF decoupling capacitors (line to earth rated) should be installed between +00V signal and chassis ground and PSRTN signal and chassis ground in close proximity to respec ve module terminals. In order to reduce differen al switching noise on the DC output voltage, adding a parallel combina on of low ESR electroly c and MLCC ceramic capacitors from V/V to GD is recommended. Recommended low ESR electroly c capacitors include Panasonic FC or FM series for the V output and AVX Flexiterm for the MLCC capacitors. AC0W V SPECIFICATION, REV 04/06/6 3

14 AC0W V 0W/Vdc, 5Vdc DUAL OUTPUT 5Vac INPUT POWER SUPPLY THERMAL CONSIDERATIONS There is no dera ng required for module output power up to the module baseplate temperature of 00 C. Beyond this temperature the module will shutdown. In order to assure the baseplate temperature remains below 00 C addi onal heatsinking or forced airflow may be required. In order to es mate baseplate temperature and whether external heatsinking or airflow is necessary, apply the following formulas: T baseplate = T ambient + (P diss )(Ө s a ) Where: T baseplate = module baseplate temperature in C, T ambient = ambient air temperature in C, Ө s a = thermal resistance from module baseplate to ambient air in C/W without external heatsink, eff = efficiency from curve, P diss = {(P out eff) P out } in wa s As an example, Assume a desired output power of 00W at nominal line opera on (5Vrms) with a maximum ambient temperature of 70 C. The following formula would apply: T baseplate = 70 C + {(00W / 0.8) 00W)} (3.4 C/W) = 45 C Therefore either an external heatsink would be required or forced airflow such that Ө s a was reduced to: Ө s a < {(T baseplate T ambient ) P diss } Ө s a < {00 C 70 C} {(00W / 0.8) 00W)} <.37 C/W AC0W V SPECIFICATION, REV 04/06/6 4