High-speed CAN Transceiver ATA6660

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1 Features Usable for Automotive 12 /24 and Industrial Applications Maximum High-speed Data Transmissions up to 1 MBaud Fully Compatible with ISO Controlled Slew Rate Standby Mode TXD Input Compatible to 3.3 Short-circuit Protection Overtemperature Protection High oltage Bus Lines Protection, -40 to +40 High Speed Differential Receiver Stage with a Wide Common Mode Range, -10 to +10, for High Electromagnetic Immunity (EMI) Fully Controlled Bus Lines, and to Minimize Electromagnetic Emissions (EME) High ESD Protection at, HBM 8 k, MM 300 Description The ATA6660 is a monolithic circuit based on the Atmel s Smart Power BCD60-III technology. It is especially designed for high speed CAN-Controller (CAN-C) differential mode data transmission between CAN-Controllers and the physical differential bus lines. High-speed CAN Transceiver ATA6660 Figure 1. Block Diagram 3 CC 1 TXD TXD input stage Overtemperature and Short circuit protection Driver 8 RS Constant slope/ standby 7 4 RXD Receiver 6 5 REF Reference oltage 0.5*CC 2 GND Rev. 1

2 Pin Configuration Figure 2. Pinning SO8 TXD GND CC RXD RS REF Pin Description Pin Symbol Function 1 TXD Transmit data input 2 GND Ground 3 CC Supply 4 RXD Receive data output 5 REF Reference output 6 Low level CAN input/output 7 High level CAN input/output 8 RS Switch standby mode/normal mode Functional Description oltage Protection and ESD Slope Control Overcurrent Protection The ATA6660 is a monolithic circuit based on Atmel s Smart Power BCD60-III technology. It is especially designed for high-speed differential mode data transmission in harsh environments like automotive and industrial applications. Baudrate can be adjusted up to 1 Mbaud. The ATA6660 is fully compatible to the ISO11898, the developed standard for high speed CAN-C (Controller Area Network) communication. High protection circuitry on both line pins, (Pin 7) and (Pin 6), allow bus line s in the range of -40 to +40. ESD protection circuitry on line pins allow HBM = 8 k, MM = 300. The implemented high protection on bus line output/input pins (7/6) makes the ATA6660 suitable for 12 automotive applications as well as 24 automotive applications. A fixed slope is adjusted to prevent unsymmetrical transients on bus lines causing EMC problems. Controlled bus lines, both and signal, will reduce radio frequency interference to a minimum. In well designed bus configurations the filter design costs can be reduced dramatically. In the case of a line shorts, like to GND, to CC, integrated short current limitation allows a maximum current of I _SC or I _SC. If junction temperature rises above 165 C an internal overtemperature protection circuitry shuts down both output stages, the receiver will stay activated. 2 ATA6660

3 ATA6660 Standby Mode High-speed Receiver TXD Input Transmitter Split Termination Concept The ATA6660 can be switched to standby mode by forcing the RS > 0.87 CC. In standby mode the supply current will reduce dramatically, supply current during standby mode is typical 600 µa (I CC_stby ). Transmitting data function will not be supported, but the oppertunity will remain to receive data. A high-speed comparator is listening for activities on the bus. A bus signal will force the output RXD to a low level in typical t drxdl = 400 ns. If the RS pin is not connected, causing through a broken connection to the controller, the ATA6660 will switch to standby mode automatically. In normal mode a fast receiver circuitry combined with a resistor network is able to detect differential bus line s rec_th > 0.9 as bit, differential bus line s rec_th < 0.5 as recessive bit. The wide receiver common mode range, -10 to +10, combined with a symmetrical differential receiver stage offers high immunity against electromagnetic interference. A typical hysteresis of 70 m is implemented. Dominant differential bus s forces RXD output (Pin 4) to low level, recessive differential bus s to high level. The input stage Pin 1 (TXD) is compatible for 3.3 output levels from new controller families. Pull-up resistance (25 k ) forces the IC to recessive mode, if TXD-Pin is not connected. TXD low signal drives the transmitter into state. A integrated complex compensation technique allows stable data transmission up to 1 MBaud. Low level on TXD input forces bus line s to 3.5, to 1.5 with a termination resistor of 60. In the case of a line short circuit, like to GND, to CC, integrated short current limitation circuitry allows a maximum current of 150 ma. If junction temperature rises above typical 163 C an internal overtemperature protection shuts down both output stages, the receive mode will stay activated. With a modified bus termination (see Figure 5) a reduction of emission and a higher immunity of the bus system can be achieved. The one 120 resistor at the bus line end nodes is split into two resistors of equal value, i.e., two resistors of 60 The resistors for the stub nodes is recommended with two resistors of 1,3 k for example 8 stub nodes and 2 bus end nodes) Notice: The bus load of all the termination resistors has to stay within the range of 50 to 65 The common mode signal at the centre tap of the termination is connected to ground via a capacitor of e.g., C split = 10 nf to 100 nf. A seperate ground lead to the ground pin of the module connector is recommended. 3

4 Absolute Maximum Ratings Parameters Symbol Conditions Min. Max. Unit Supply CC DC at Pins 1, 4, 5 and 8 TXD, REF, RS, -0.3 CC +0.3 RXD DC at Pins 6 and 7, 0 < CC < 5.25 ; no time limit Transient at Pins 6 and Storage temperature T Stg C Operating ambient temperature T amb C ESD classification All pins HBM ESD S.5.1 MM JEDEC A115A ESD classification Pin 6, 7 versus Pin 2 HBM 1.5 k, 100 pf MM 0, 200 pf ±3000 ±200 ±8000 ±300 Thermal Resistance Parameters Symbol alue Unit Thermal resistance from junction to ambient R thja 160 K/W Truth Table CC TXD RS Bus State RXD 4.75 to < 0.3 CC Dominant to (or floating) < 0.3 CC 0.5 CC 0.5 CC Recessive to 5.25 X > 0.87 CC 0.5 CC 0.5 CC Recessive 1 RS (Pin 8) Functionality Slope Control Mode oltage and Current Levels RS > 0.87 CC Standby I RS < 10 µa RS < 0.3 CC Constant slope control I RS 500 µa 4 ATA6660

5 ATA6660 Electrical Characteristics CC = 4.75 to 5.25 ; T amb = -40 C to +125 C; R Bus = 60 Ω; unless otherwise specified All s referenced to ground (Pin 2); positive input current. No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* 1 Supply Current Supply current Supply current recessive TXD = 0 TXD = 5 3 I vcc_dom ma A 3 I vcc_rec ma A Supply current standby 1.3 RS = 5 3 I vcc_stby µa A 2 Transmitter Data Input TXD HIGH level input LOW level input HIGH level input current TXD = 5 TXD = 0 1 TXDH 2 CC +0.3 A 1 TXDL A TXD = CC 1 I IH -1 0 µa A LOW level input 2.4 TXD = 0 1 I IL µa A 3 Receiver Data Output RXD High level output Low level output Short current at RXD I RXD = -100 µa 4 RXDH 0.8 CC CC A I RXD = 1 ma 4 RXDL CC A TXD = 5 RXD = 0 Short current at RXD 3.4 TXD = 0 RXD = 5 4 Reference Output oltage REF Reference output normal mode Reference output standby mode RS = 0 ; -50 µa < I5 < 50 µa RS = 5 ; -5µA < I5 < 5 µa 5 DC Bus Transmitter ; Recessive bus I O()(reces) I O()(reces) output 4 I RXDs ma A 4 I RXDs2 2 6 ma A 5 ref_no 0.45 CC CC A 5 ref_stby 0.4 CC CC A TXD = CC ; no load 6, 7 ; A -40 < ; < 40 ; 0 < CC < , 7 I O_reces ma A TXD = 0 6, A output 5.4 TXD = 0 6, A *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 5

6 Electrical Characteristics (Continued) CC = 4.75 to 5.25 ; T amb = -40 C to +125 C; R Bus = 60 Ω; unless otherwise specified All s referenced to ground (Pin 2); positive input current. No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* 5.5 Differential bus output ( ) TXD = 0 ; = 45 to 60 ; CC = 4.9 6, 7 diff dom A 5.6 TXD = CC ; no load 6, 7 diff rec m A Short-circuit current Short-circuit current = -10 TXD = 0 = 18 TXD = 0 6 DC Bus Receiver ; Differential receiver threshold normal mode Differential receiver threshold stand-by mode Differential input hysteresis and common mode input resistance Differential input resistance Matching between and common mode input resistance, input capacitance Differential input capacitance, input leakage input current 7 Thermal Shut-down Shut-down junction temperature for / Switch on junction temperature for / Temperature hysteresis -10 < < < < +10 6, 7 I _SC ma A 6, 7 I _SC ma A 6, 7 rec_th A RS = CC 6, 7 rec_th_stby A CC = 0 = 3.5 = 1.5 6, 7 diff(hys) 70 m A 6, 7 R i k A 6, 7 R diff k A 6, 7 R i_m % A 6, 7 C i 20 pf D 6, 7 C diff 10 pf D 6, 7 I LI(); I LI() 250 µa A T J(SD) C B T J(SD) C B T Hys 10 K B *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 6 ATA6660

7 ATA6660 Electrical Characteristics (Continued) CC = 4.75 to 5.25 ; T amb = -40 C to +125 C; R Bus = 60 Ω; unless otherwise specified All s referenced to ground (Pin 2); positive input current. No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* 8 Timing Characteristics Normal Mode, RS 0.3 CC (see Figure 3) Delay TXD to bus active Delay TXD to bus inactive Delay TXD to RXD, recessive to Delay TXD to RXD, to recessive Difference between Delay TXD to RXD to Delay recessive t d(txd- BUS_ON) t d(txd- BUS_OFF) 6, 7 t d_activ(txd- RXD) t d_inactiv(txd- RXD) ns A ns A ns A ns A t diff = t d_activ(txd-rxd) t diff ns A - t d_inactiv(txd-rxd) 9 Timing Characteristics Stand-by Mode RS 0.87 CC Bus to RXD low in stand-by mode Wake up time after stand-by mode (time delay between standby to normal mode and to bus ) 10.1 Standby/Normal Mode Selecteable via RS (Pin 8) Input for normal mode Input current for normal mode Input for stand-by mode RS = CC 4 t drxdl ns A TXD = 0 6, 7 T wake_up 2 µs A RS from 0 to CC RS = CC 8 RS CC A 8 I RS -700 µa A 8 stby 0.87 CC A *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 7

8 Figure 3. Timing Diagrams HIGH TXD LOW 0.9 (bus activ) diff 0.5 recessive (bus inactive) HIGH RXD 0.3CC 0.7CC LOW t d (TXD_bus_on) t d (TXD_bus_off) t d_activ(txd_rxd) t d_inactiv (TXD_RXD) 8 ATA6660

9 ATA6660 Figure 4. Test Circuit for Timing Characteristics TXD 1 8 RS + 5 GND CC 2 3 ATA =62 C L =100pF RXD 4 5 ref C=47µF C=100nF C=15pF Figure 5. Bus Application with Split Termination Concept bus line end node C SPLIT =10nF CAN Controller + 5 TXD GND CC RXD ATA RS ref =60 =60 bus line stub node C=47µF C=100nF C=15pF =1,3k =1,3k CAN Controller + 5 TXD GND CC RXD ATA RS ref C SPLIT =10nF C=47µF C=100nF C=15pF =60 C SPLIT =10nF =60 bus line end node 9

10 Ordering Information Extended Type Number Package Remarks ATA6660 SO8 Package Information Package SO8 Dimensions in mm technical drawings according to DIN specifications ATA6660

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