Arduino Mega 2560 Microcontroller Built 3-Phase Seven Level Inverter

Transcription

1 Journal of Electrical and Electronics Engineering 3 Arduino Mega 260 Microcontroller Built 3-Phase Seven Level Inverter PAVANKUMAR Shriram Mehtre 1, GUNABALAN Ramachandiran 1, BISWAS Sitangshu Sekhar 2 1 VIT University, Tamil Nadu, India School of Electrical Engineering, VIT University Vandalur-Keelambakkam Road, Keelakottaiyur , Chennai, TamilNadu, India, gunabalan.r@vit.ac.in 2 Bharatiya Nabhikiya Vidyut Nigam Limited, Tamil Nadu, India Scientific Officer E (Design and R & D), BHAVINI Kalpakkam , Kanchipuram, TamilNadu, India. Abstract In this paper, the implementation of 3-phase seven level cascaded H-bridge inverter is discussed with Arduino microcontroller and harmonic analysis is performed using Fourier series. The multilevel inverters (MLI) give several benefits as reduced switching voltage stresses and the capability to operate in higher level voltage applications. A new and simple architecture Arduino Mega 260 microcontroller is employed to produce the control signals for the seven level cascaded H-bridge MLI switches. The computer simulation is carried out in PSIM environment and prototype experimental model is developed with TLP 20 driver ICs and power MOSFET switches to validate the simulation results. The THDs present in different voltage level inverters are mathematically analysed using Fourier series. Keywords: Fourier series; microcontroller; multilevel inverter; total harmonic distortion; I. INTRODUCTION Multilevel inverters (MLIs) are preferred for medium and high power industrial applications. The use of large number of switches and control circuits make the MLIs more expensive than three level inverters. While an inverter would transfer energy with the flip of one switch, with a MLI which would have to flip several switches, each switch requires separate control circuit. The most commonly used topology introduced is the series H-bridge MLI. This was followed by the diode clamped inverter which required bank of series capacitors [1]. After that flying capacitor inverter got invented in which the capacitors were floating instead of series connections. The vast advantage of the series connected H-bridge MLI is that it needs less number of passive components as compared to diode clamped and flying capacitor MLIs. The H-bridge MLI are taken overtone attention in a variety of applications because of the following features: 1) Higher output voltage and power levels 2) Obtaining medium output voltage levels using lower rating semiconductor switches 3) Easy replacement of faulty module 4) Ability to produce the desired output voltage with low total harmonic distortion (THD) It is very handy to control cascaded H-bridge inverters as compared to further MLIs because there is no need of any clamping diodes or flying capacitors. The weight and cost of cascaded H-bridge inverters is less than other MLIs. There are various modulation techniques which are used to control cascaded H-bridge inverter. As considering to this system, design of switching pattern turn into much complex therefore the cascaded H- bridge inverter topology have some limited applications. This cascaded H-bridge MLIs produce nearly sinusoidal output voltage with low switching frequency which significantly reduces the switching losses and total harmonic distortion. The control is complex in a cascaded H-bridge MLI because of increased no. of gate signals. Ample MLI topologies with different switching strategy were discussed in the literatures. Modulation technique without any trigonometric function for series connected MLI was designed and developed to make the control algorithm very simple [2]. The control signals were generated using FPGA and verified in both simulation and experimental results. SVPWM based simulation study for a seven level hybrid MLI was discussed in [3]-[4]. A modulation method for a seven level cascaded MLI combining the merits of carrier overlapping and switch frequency optional was discussed to reduce the THD, increase the amplitude of the fundamental output voltage []. Simulation study was performed in matlab environment. Symmetrical and asymmetrical 3-phase H- bridge MLI for induction motor drive with DTC control was presented and the pulses were generated using DSP processor [6]. Single dc source and low frequency transformer with least switching devices were developed for a series connected H-bridge inverter [7]. The THD of the seven level inverter was % in the simulation study. Diode clamped seven level MLI was used for

2 36 Volume 10, Number 2, October 2017 variable torque induction motor drive using multicarrier PWM control [8]. The circuit was complex compared with H-bridge inverter. To balance the capacitor voltages in flying capacitor MLIs, charging and discharging of the capacitors in the first and second half cycle, charging and discharging of the capacitors in the first half cycle alone was discussed [9]. Precharging of the capacitor is difficult in the above method. LabVIEW FPGA based seven-level H-bridge inverter for wind energy applications was presented in [10]. The simulation and experimental seven level voltage waveforms were provided. FPGA based cascaded seven level inverter employing 3-phase transformers were discussed with three control techniques to reduce the THD [11]. Simulation study on modified seven level MLI based DSTATCOM with less number of power electronic components were provided [12]. The utility input current THD was reduced in simulation, experimental results were not presented. Two 3-phase inverters connected in series to perform seven level output with single dc source and 3-phase delta-star transformer was proposed for utility equipment in metro substations [13]. A 16-bit dspic microcontroller was employed to produce the switching pulses for the inverter. Modular cascaded seven level H-bridge PV based inverter with MPPT was discussed with experimental results [14]. The control algorithms were not discussed in detail. Selective harmonic elimination to eradicate the th and 7 th order harmonics of a seven level MLI was presented with theoretical analysis and matlab simulation results [1]. Spartan-3E FPGA processor was used to generate the control signals for a modified reduced number of switches seven level inverter for medium voltage applications [16]. The circuit was bulky and expensive compared with the conventional seven level inverter. Modified fundamental switching frequency for harmonic mitigation using seven level cascaded H-bridge inverter for grid connected applications was discussed with simulation results [17]. Only a few literatures for MLI seven level H-bridge inverter are reviewed in this paper. FPGA [2, 10, 16], DSP processor [6], dspic microcontroller [14] were used for control signal generation and harmonic analysis was performed by graphical method. In this paper, a new and simple architecture Arduino Mega 260 microcontroller is employed to get the gate pulses for the MLI switches. The main objective of this paper is to design and validate Arduino Mega 260 microcontroller built 3-phase seven level cascaded H- bridge inverter with PSIM simulation and experimental results. Also to analyze the THDs present in different voltage level inverters using Fourier series. power can be easily scaled. Each module can provide three different voltage levels like zero, positive dc peak and negative peak dc voltages. Fig.1 and Fig. 2 show the block diagram and circuit arrangement of cascaded H- bridge inverter with 3- phase motor drive. The 3-phase seven level inverter consists of nine H-bridges. There are thirty six switches to construct the 3-phase seven level inverter; four switches in each H-bridge. These H-bridges are cascaded in series; there are three H-bridges in each phase. Each single module gives three levels as output. Same rating of dc voltage sources are used here, as variation in input voltages cause more losses due to high voltage stress on switches. MLI is designed by connection of these H-bridges in series to acquire stepped output voltage. If k bridges are connected in cascade, the output voltage level is (2k+1). The switching angle can be elected in such a way that there will be least harmonics distortion [10]. Table 1 shows the number of switches and dc sources required for different voltage levels. For a cycle, it is divided into 30 parts of angles each of 12ᵒ. The on and off positions of the switches of R-phase decide the output behaviour. Fig. 1 Block diagram of 3-phase seven level cascaded H- bridge inverter II. THREE PHASE SEVEN LEVEL CASCADED H- BRIDGE INVERTER The series connected H-bridge MLI is designed by capacitors and MOSFETs/IGBTs, require more number of components in each level. In this type of MLI, cascaded H-bridges are connected in cascade so that Fig. 2 Circuit diagram 3-phase seven level cascaded H-bridge inverter

3 Journal of Electrical and Electronics Engineering 37 TABLE 1 Estimation of number of switches for different voltage levels Voltage levels (p) Switches required [6(p-1)] DC sources required III. SIMULATION OF 3-PHASE SEVEN LEVEL CASCADED H-BRIDGE INVERTER Pulse width moodulation (PWM) technique is the most useful modulation technique to reduce the lower order harmonics. For multi triangular carrier SPWM technique, (n-1) carrier waves are necessary to operate and to control the active switching devices of n-level cascaded H-bridge inverter. The frequency and amplitude of all carrier waveforms should be same. Fig. 3 shows the PSIM simulink model circuit design of 3- phase seven level cascaded H-bridge inverter with PWM modulation technique [18-19]. In that, there are nine H- bridges containing twelve switches; each H-bridge having four MOSFETs. Separate dc sources are given to each bridge to avoid isolation problems. For 3-phase seven level cascaded H-bridge inverter simulation is designed in PSIM. A number of different level MLIs carrier-based PWM generation techniques have been developed by earlier technology as revenue to control the switching devices in the multilevel inverter. The maximum prevalent and simplest method uses multiple carrier signals and one modulation signal per phase. The PWM pulse generation method is shown in Fig. 4. There are six carrier triangular waveforms arranged by unit amplitude difference and compared with sinusoidal reference. The generated stepped waves are used as control signal to the MOSFETs. For the given motor specifications the 3-phase seven level cascaded H-bridge inverter is designed as follows: Input voltage = 100V dc, inverter output voltage = 41V ac, rated motor speed = 860 rpm. The subsequent output phase voltage waveform is shown in Fig.. The phase peak voltage is 300 V and the step voltage level is 100 V each. A 3-phase induction motor is connected at the load side and the steady state load current waveform is shown in Fig. 6. The speed of the motor shown in Fig. 7 for the given input phase voltage of 300 V, runs at 1000 rpm. Fig. 3 PSIM simulink model of 3-phase seven level cascaded H-bridge inverter Fig. 4 PWM pulse generation Fig. Output phase voltage of seven level cascaded H-bridge inverter Fig. 6 Output current of seven level cascaded H-bridge inverter

4 38 Volume 10, Number 2, October 2017 Fig. 7 Speed response of the induction motor fed by a seven level cascaded H-bridge inverter IV. EXPERIMENTAL IMPLEMENTATION OF 3- PHASE SEVEN LEVEL CASCADED H-BRIDGE INVERTER Arduino Mega 260 microcontroller is used to generate switching signals for inverter switches. But these signals have a voltage magnitude from 3 V to V. Signals with this low voltage magnitude will not turn on the switches so a circuitry that will keep the frequency of the signals same but increases the voltage magnitude is necessary. Generally driver circuit is used to give signals to switches from Arduino. Driver circuit will increase the voltage magnitude of signals in the range of 12 V to 1 V. This voltage level is sufficient to trigger MOSFET and it starts working as a switch. To make driver circuit for converter TLP 20 IC is used. It is easily available at low cost. Recommended operating condition for TLP 20 are as follows: 1) Input current should be between 7 ma to 10 ma 2) Supply voltage should be between 1 V to 20 V 3) Peak output current should be 0. V 4) The operating temperature should between -20 C to 80 C The required components with specific ratings and quantities for experimental fabrication is listed in Table 2. The gate pulses for the MOSFET switches can be generated by analog circuits but it will increase the intricacy of the circuit. The Arduino Mega 260 is used to generate control signal to MOSFET IRF 840 B. The main advantage is that it reduces the complexity of the circuit and the energy consumption. The Arduino Mega 260 microcontroller can be driven via the USB cable or with an external dc power supply. It can be operated on external dc supply of 6 V to 20 V. Seven tapping transformer is used to operate the TLP 20 as well as the power circuit through the rectifier BR 68. Input filter followed by rectifier circuit gives +1 V dc supply to the control circuit. The MOSFET IRF 840 B is mounted very nearer to enhance the gate pulses provided by TLP 20. The gate pulse waveforms are generated at 0 Hz and 10 Hz to get the desired step output voltage. The bridge rectifier BR68 is used to convert 12 V ac to dc voltage. There are nine bridge rectifiers with 800 V, 6 A rating to provide supply to the power circuit. At the rectifier output, capacitor 470 μf is provided to enhance the dc supply. There are thirty six switches for those sufficient ports are available by assigning port pins to arduino pins inturn to physical output pins to respective phases. The arduino pin mapping is represented to write the program for desired operation. The mapping for all the 3-phases are shown in Fig. 8. There are nine H-bridges with thirty six switches with same number of driver circuits. Each H-bridge has four MOSFETs with 00 V, 32 A rating. Nine distinct dc supply of 12 V is fabricated by step down transformers with rectifier unit as supply unit to the control circuit. Separate dc sources are given to each bridge to avoid isolation problems. The 3-phase seven level inverter is so designed as three H-bridges connected in series form one phase. In each phase, there are three H-bridges cascaded in series connection, similar way all the 3-phases R, Y and B are constructed. TABLE 2 Hardware specifications Components Rating Quantity TLP 20 IC 1 V 36 Resistors 100 Ω, 10 Ω Capacitor (Input 470 μf, 2 V 36 filter) MOSFET 00 V, 32 A, N- 36 IRF840B channel Bridge Rectifier 800 V, 6 A 9 (BR68) Diode 1N V, 1 A 144 Transformer 230 V to 12 V 6 (7 tapping) Arduino Mega Dotted PCB - 12 The experimental set up of the 3-phase seven level cascaded H-bridge inverter is shown in Fig. 9. By connecting two H-bridges in series, five level stepped output voltage waveform in Fig. 10 is achieved. The seven level output voltage waveform is recorded for a single phase by connecting three H-bridges as shown in Fig. 11. The rms voltage is 30.8 V with a peak amplitude of 9.83 V, 0 Hz frequency. Fig. 8 Arduino pin mapping

5 Journal of Electrical and Electronics Engineering 39 V m bn = V m 3 2 3sin nx dx 6 { sin nx dx sin nx dx sin nx dx sin nx dx } 8 7 { sin nx dx + 2 sin nx dx + 3 sin nx dx sin nx dx bn = V m n sin nx dx} 10 (cos kn k=1 ) (3) (4) THD = 1 2 ( H H n=2 n ) 100 % () 1 Fig. 9 Experimental setup of 3-phase seven level cascaded H- bridge inverter Fig. 9 Output voltage of five level cascaded H-bridge inverter H n = a n 2 + b n 2 H 1 fundamaenta harmonic component The integral limit to find the coefficient of b n is given in Equation 4, for low and higher level inverters, the integral limit is divided according to the magnitude and the number of levels. From the coefficients of b n, the value of THDs for three level, five level, seven level and nine level inverter are determined. The co-efficient b 1 to b 0 are estimated to determine the total THD for better accuracy. Table 4 shows the percentage THD in different multilevel inverters. As per the IEEE standard 19, voltage THD should be below % for grid connected inverter for better power quality. It is observed that seven level inverter can be connected to the grid by adding filter which will improve power quality and establish an efficient power system. TABLE THD analysis for different multilevel inverters (6) Voltage levels THD % 3.87% % % V. CONCLUSIONS Fig.10 Output voltage of seven level cascaded H-bridge inverter THD analysis is performed to identify the different harmonic content present in the output stepped voltage waveform for different multilevel inverters using Fourier series. v(x) = a 0 + (a 2 n=1 n cos nx + b n sin nx) (1) The waveform is odd wave symmetry (odd function), hence a 0 & a n = 0. For odd function, b n = 1 2 v(x) sin nx dx (2) 0 Analysis of 3-phase seven level cascaded H-bridge inverter is discussed in detail. Simulation results are validated by experimental results for low power rating. Simple and efficient Arduino Mega 260 microcontroller is used to generate the control signals for the MOSFET switches. THD analysis was performed for different multilevel inverters using Fourier series to find the suitability of the inverter for grid connection and motor drives for pumping applications. The rms ac output voltage for each phase was 30V stepped wave, validated in simulation as well as prototype experimental model of 3-phase seven level cascaded H- bridge inverter. The inverter development for high power rating induction motor drive for pumping applications is under progress.

6 40 Volume 10, Number 2, October 2017 ACKNOWLEDGMENTS The authors gratefully acknowledge the research support from Bharatiya Nabhikiya Vidyut Nigam Limited (BHAVINI), Kalpakkam, TamilNadu, India REFERENCES [1] M. Malinowski, K. Gopakumar, J. Rodriguez, M. A. Perez, A Survey on cascaded multilevel inverters, IEEE Trans. Industrial Electronics, vol. 7, no. 7, pp , July [2] V. Naumanen, J. Luukko, T. Itkonen, O. Pyrhonen, J. Pyrhonen Modulation technique for series-connected H- bridge multilevel converters with equal load sharing, IET Power Electron., vol. 2, no. 3, pp , [3] C. I Nicolas-Villalva, I.Araujo-Vargas, N. Mondragon- Escamilla, A. J. Forsyth, A. Villarruel-Parra, A space vector PWM algorithm for a hybrid multilevel inverter, In: Proc. Power Electronics Congress, San Luis Potosi, Mexico, pp , [4] A. Villarruel-Parra, I.Araujo-Vargas, N. Mondragon- Escamilla, A. J. Forsyth, Control of a hybrid seven-level PWM inverter, In: Proc. Power Electronics Congress, San Luis Potosi, Mexico, pp , [] H. Zheng, B. Zhu, H. Zhang, L. Chen, Carrier overlapping-switch Frequency optional PWM method for cascaded multilevel inverter, In: Proc. International Conference on Electrical and Control Engineering, Wuhan, China, pp , [6] F. Khoucha, M. S. Lagoun, A. Kheloui, M. E. H. Benbouzid, A comparison of symmetrical and asymmetrical three-phase H-bridge multilevel inverter for DTC induction motor drives, IEEE Trans. on Energy Conv., vol. 26, no. 1, pp.64 72, March [7] Y. Suresh, A.K. Panda Performance of cascade multilevel H-bridge inverter with single DC source by employing low frequency three-phase transformers, In: Proc. Annual Conference on IEEE Industrial Electronics Society, Glendale, AZ, USA, pp , [8] S. E. Pravin, R. N. Starbell, Induction motor drive using seven level multilevel inverter for energy saving in variable torque load application, In: Proc. International Conference on Computer, Communication and Electrical Technology, pp , [9] A. Schiop, Capacitor voltage balancing control for flying capacitor multilevel inverter, Journal of Electrical and Electronics Engineering, vol. 7, no. 2, pp. 3-38, October [10] P. Samuel, N. Chandrashekhar, R. Gupta, Wind energy conversion based on seven-level cascaded H-bridge inverter using LabVIEW FPGA, In: Proc. International Conference on Power, Control and Embedded Systems, Allahabad, India, pp. 1-6, [11] Y. Suresh, A. K. Panda Research on a cascaded multilevel inverter by employing three-phase transformers, IET Power Electron., vol., no., pp , October [12] N. M. Iqubal, P. K. Paul, Current compensation using modified seven level multilevel inverter based DSTATCOM, in: Proc. International Conference on Green Energy, Trivandrum, India, pp , December [13] I. Araujo-Vargas, K. Cano-Pulido, J. Ramirez-Hernandez, N. Mondragon-Escamilla, Caren-Ivet Nicolas-Villalva, A. Villarruel-Parra, Francisco-Javier Perez-Pinal, A Single DC-source seven-level inverter for utility equipment of metro railway, power-land substations, IEEE Trans. on Industry Applications, vol. 0, no. 6, pp , [14] B. Xiao, L. Hang, J. Mei, C. Riley, L. M. Tolbert, B. Ozpineci, Modular cascaded H-bridge multilevel PV inverter with distributed MPPT for grid-connected applications, IEEE Trans. on Industry Applications, vol. 1, no. 2, pp , 201. [1] M. G. Fakhry, A. Massoud, S. Ahmed, Selective harmonic elimination for quasi seven-level operation of cascaded-type multilevel converters with unequal dc sources, In: Proc. First Workshop on Smart Grid and Renewable Energy, Doha, Qatar, pp. 1-, 201. [16] Anbarasan. P, Ramkumar. S, Thamizharasan. S, A new three phase reduced switch multilevel dc-link inverter for medium voltage applications, In: Proc. International Conference on Electrical, Computer and Communication Technologies, Coimbatore, India, pp. 1-4, 201. [17] M. Hajizadeh, S. H. Fathi, Fundamental frequency switching strategy for grid-connected cascaded H-bridge multilevel inverter to mitigate voltage harmonics at the point of common coupling, IET Power Electron., vol. 9, no. 12, pp , [18] J. Rodriguez, Jih-Sheng Lai, F. Z. Peng, Multilevel inverters: a survey of topologies, controls, and applications, IEEE Trans. on Industrial Electronics, vol. 49, no. 4, pp , [19] P. Lezana, R. Aceiton, C. Silva, Phase-disposition PWM implementation for a hybrid multicell converter, IEEE Trans. on Industrial Electronics, vol. 60, no., pp , May 2013.