PTH Vin single output. DC/DC CONVERTERS POLA Non-isolated 1. NEW Product

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1 PTH0 DC/DC CONVERTERS POLA Non-isolated 0 A output current V input voltage Wide-output voltage adjust. Vdc to 5.5 Vdc for suffix W and 0.8 Vdc to.8 Vdc for suffix L Auto-track sequencing* Margin up/down controls Efficiencies up to 94% Output ON/OFF inhibit Output voltage sense Point-of-Load-Alliance (POLA) compatible Available RoHS compliant The PTH0 is a next generation series of non-isolated dc-dc converters offering some of the most advanced POL features available in the industry. The primary new feature provides for sequencing between multiple modules, a function, which is becoming a necessity for powering advanced silicon including DSP s, FPGA s and ASIC s requiring controlled power-up and power-down. Other industry leading features include margin up/down controls and efficiencies up to 94%. The PTH0 has an input voltage of 0.8 Vdc to 3. Vdc and offers a wide output voltage range adjustable with external trim resistor, allowing for maximum design flexibility and a pathway for future upgrades. All specifications are typical at nominal input, full load at 5 C unless otherwise stated C in = 5 µf, C out = 0 µf YEAR WARRANTY SPECIFICATIONS OUTPUT SPECIFICATIONS Voltage adjustability Suffix W.-5.5 Vdc (See Note 4) Suffix L Vdc Setpoint accuracy ±.0% Vo Line regulation ±0 mv typ. Load regulation ± mv typ. Total regulation ±3.0% Vo Minimum load 0 A Ripple and noise Suffix W V o.5 V 5 mv pk-pk 0 MHz bandwidth V o >.5 V % V o (See Note 8) Suffix L V o.0 V 0 mv pk-pk V o >.0 V mv pk-pk Temperature co-efficient - ºC to 85 ºC ±0.5% Vo Transient response µs recovery time (See Note 5) Overshoot/undershoot 00 mv Margin adjustment ±5.0% Vo INPUT SPECIFICATIONS Input voltage range (See Note 3) Vdc Input current No load 0 ma typ. Remote ON/OFF (See Note ) Positive logic Start-up time V/ms Undervoltage lockout V typ. Track input voltage Pin 8 (See Note ) ±0.3 Vin International Safety Standard Approvals UL/cUL CAN/CSA-C. No /UL 9-, File No. E404 TÜV Product Service (EN9) Certificate No. B CB Report and Certificate to IEC9, Certificate No. US/89/UL EMC CHARACTERISTICS Electrostatic discharge Conducted immunity Radiated immunity GENERAL SPECIFICATIONS *Auto-track is a trade mark of Texas Instruments EN000-4-, IEC- EN EN Efficiency See Tables on page Insulation voltage Non-isolated Switching frequency Suffix W 3 khz typ. Over V in and I o ranges Suffix L khz typ. Approvals and EN9 standards UL/cUL9 Material flammability UL94V-0 Dimensions (L x W x H) 5. x 5.5 x 9.00 mm x 0.0 x in Weight 5 g (0.8 oz) MTBF Telcordia SR-33,09,000 hours ENVIRONMENTAL SPECIFICATIONS Thermal performance Operating ambient, - ºC to 85 ºC (See Note ) temperature Non-operating - ºC to 5 ºC MSL ( Z suffix only) JEDEC J-STD-00C Level 3 PROTECTION Short-circuit Auto reset 0 A typ. File Name: pth0.pdf Rev: 8 Jun 00

2 PTH0 DC/DC CONVERTERS POLA Non-isolated OUTPUT OUTPUT OUTPUT POWER INPUT OUTPUT CURRENT CURRENT EFFICIENCY REGULATION MODEL (MAX.) VOLTAGE VOLTAGE (MIN.) (MAX.) (MAX.) LINE LOAD NUMBER 55 W Vdc Vdc 0 A 0 A 88% ±0 mv ± mv PTH0L 55 W Vdc.-5.5 Vdc 0 A 0 A 94% ±0 mv ± mv PTH0W Part Number System with Options PTH0WAST Product Family Point of Load Alliance Compatible Input Voltage = V Output Current 0 = 0 A Mechanical Package Always 0 Packaging Options No Suffix = Trays T = Tape and Reel () Mounting Option (9) D = Horizontal Through-Hole (Matte Sn) H = Horizontal Through-Hole (Sn/Pb) S = Surface-Mount (3/3 Sn/Pb pin solder material) Z = Surface-Mount (95.5/3.8/0. Sn/Ag/Cu pin solder material) Pin Option A = Through-Hole Std. Pin Length (0. ) A = Surface-Mount Tin/Lead Solder Ball Output Voltage Code W = Wide, L = Low Voltage Output Voltage Adjustment of the PTH0 Series The ultra-wide output voltage trim range offers major advantages to users who select the PTH0. It is no longer necessary to purchase a variety of modules in order to cover different output voltages. The output voltage can be trimmed in a range of. Vdc to 5.5 Vdc for suffix W and 0.8 Vdc to.8 Vdc for suffix L. When the PTH0 converter leaves the factory the output has been adjusted to the default voltage of. V for the PTH0W and 0.8 V for the PTH0L. Remote ON/OFF. Active High ON: Pin 3 open; or V > Vin V OFF: Pin 3 ; or V < 0.8 V (min - 0. V). See Figures, and 3 for safe operating curves of PTH0W and Figures, and 8 for safe operating curves of PTH0L. 3 A 5 µf electrolytic input capacitor is required for proper operation. The capacitor must be rated for a minimum of 0 ma rms of ripple current. 4 An external output capacitor is not required for basic operation. Adding 3 µf of distributed capacitance at the load will improve the transient response. 5 A/µs load step, to 00% I omax, C out = 3 µf. If utilized will track applied voltage by ±0.3 V (up to Vo set point). Tape and reel packaging only available on the surface-mount versions. 8 The pk-pk output ripple voltage is measured with an external 0µF ceramic capacitor. See Figures 5 and 8 for Standard application schematic. 9 To order Pb-free (RoHS compatible) surface-mount parts replace the mounting option S with Z, e.g. PTH0WAZ. To order Pb-free (RoHS compatible) through-hole parts replace the mounting option H with D, e.g. PTH0WAD. EFFICIENCY TABLE - PTH0W (I O = 8 A) OUTPUT VOLTAGE EFFICIENCY Vo = 5.0 V 94% Vo = 3.3 V 9% Vo =.5 V % Vo =.0 V 88% Vo =.8 V 8% Vo =.5 V 85% Vo =. V 83% EFFICIENCY TABLE - PTH0L (I O = 8 A) OUTPUT VOLTAGE EFFICIENCY Vo =.8 V 88% Vo =.5 V 8% Vo =. V 84% Vo =.0 V 8% Vo = 0.8 V 9% File Name: pth0.pdf Rev: 8 Jun 00

3 PTH0 DC/DC CONVERTERS POLA Non-isolated 3 PTH0W Characteristic Data 00 LFM 00 LFM 0 LFM 00 LFM 00 LFM 0 LFM 0 0 Figure - Safe Operating Area for PTH0W Vin = V, Output Voltage = 5 V (See Note A) Figure - Safe Operating Area for PTH0W Vin = V, Output Voltage = 3.3 V (See Note A) 0 00 LFM 00 LFM 0 LFM EFFICIENCY (%) V 3.3V.5V.8V.V Figure 3 - Safe Operating Area for PTH0W Vin = V, Output Voltage =.8 V (See Note A) Figure 4 - Efficiency vs Load Current for PTH0W Vin = V (See Note B) Track Margin Down Margin Up A B SOA curves represent the conditions at which internal components are within the Artesyn derating guidelines. Characteristic data has been developed from actual products tested at 5 C. This data is considered typical data for the converter. Vin PTH0 (Top View) Inhibit Vo Sense Cin 5µF RSET %, 0.W Co 3µF (Optional) L Co O Ceramic A (Optional) D Figure 5 - Standard Application - All Models File Name: pth0.pdf Rev: 8 Jun 00

4 PTH0 DC/DC CONVERTERS POLA Non-isolated 4 PTH0L Characteristic Data LFM EFFICIENCY (%).8V.5V.V.0V 0.8V 0 Figure - Safe Operating Area for PTH0L Vin = V, Output Voltage.8 V (See Note A) Figure - Efficiency vs Load Current for PTH0L Vin = V (See Note B) Track Margin Down Margin Up A B SOA curves represent the conditions at which internal components are within the Artesyn derating guidelines. Characteristic data has been developed from actual products tested at 5 C. This data is considered typical data for the converter. Vin PTH0 (Top View) Inhibit Vo Sense Cin 5µF RSET %, 0.W Co 3µF (Optional) L Co O Ceramic A (Optional) D Figure 8 - Standard Application - All Models File Name: pth0.pdf Rev: 8 Jun 00

5 PTH0 DC/DC CONVERTERS POLA Non-isolated (3.8) 0.5 (3.8) (9.5) (5.) 0. (.35) (3.55) ø0.0 (.0) 5 Places (.) (5.5) 0.0 (.8) (Standoff Shoulder) TOP VIEW Dimensions in Inches (mm) Tolerances (unless otherwise specified) Places ±0.0 (±0.) 3 Places ±0.00 (±0.5) (9.00) MAX. SIDE VIEW Lowest Component 0.00 min. (0.5) Bottom side Clearance Host Board PIN CONNECTIONS PIN NO. FUNCTION Ground Vin 3 Inhibit* 4 Vo adjust Figure 9 - Plated Through-Hole Mechanical Drawing 5 Vo sense Ground 8 Track 0.5 (3.8) 0.5 (3.8) (9.5) (5.) (.35) (.) (5.5) (9.00) max.* *After solder reflow on customer board Solder Ball 0.0 (.0) 0 Places 9 Margin down* 0 Margin up* *Denotes negative logic: Open = Normal operation Ground = Function active TOP VIEW SIDE VIEW Dimensions in Inches (mm) Tolerances (unless otherwise specified) Places ±0.0 (±0.) 3 Places ±0.00 (±0.5) Figure 0 - Surface-Mount Mechanical Drawing Datasheet Artesyn Technologies 00 The information and specifications contained in this datasheet are believed to be correct at time of publication. However, Artesyn Technologies accepts no responsibility for consequences arising from printing errors or inaccuracies. The information and specifications contained or described herein are subject to change in any manner at any time without notice. No rights under any patent accompany the sale of any such product(s) or information contained herein. Please consult our website for the following items: Application Note File Name: pth0.pdf Rev: 8 Jun 00