Mismatch error correction for time interleaved analog-to-digital converter over a wide frequency range

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1 Misatch error correction for tie interleaved analog-to-digital converter over a wide frequency range Zouyi Jiang,,2 Lei Zhao,,2,a) Xingshun Gao,2, Ruoshi Dong,2, Jinxin Liu,2, and Qi An,2 State Key Laboratory of Particle Detection and Electronics, University of Science and Technology of China, Hefei 2326, China 2 Departent of Modern Physics, University of Science and Technology of China, Hefei 2326, China High-speed high-resolution Analog-to-Digital Conversion is the ey part for wavefor digitization in physics experients and any other doains. This paper presents a new fully digital correction of isatch errors aong the channels in Tie Interleaved Analog-to-Digital Converter (TIADC) systes. We focus on correction with wide-band input signal, which eans that we can correct the isatch errors for any frequency point in a broad band with only one set of filter coefficients. Studies were also ade to show how to apply the correction algorith beyond the base band, i.e. other Nyquist zones in the under-sapling situation. Structure of the correction algorith is presented in this paper, as well as siulation results. To evaluate the correction perforance, we actually conducted a series of tests with two TIADC systes. The results indicate that the perforance of both two TIADC systes can be greatly iproved by correction, and the Effective Nuber Of Bits (ENOB) is successfully iproved to be better than 9.5 bits and 5.5 bits for an input signal up to the bandwidth (-3dB) range in the.6-gsps 4-bit and the -Gsps 8-bit TIADC systes, respectively. Tests were also conducted for input signal frequencies in the second Nyquist zone, which shows that the correction algoriths also wor well as expected. I. INTRODUCTION High-speed wavefor digitization allows access to the ost detailed inforation of interesting signals, and is widely used in any doains, such as nuclear and particle physics experients, data counication 2, easureent instruents 3 and edical iaging 4. For high-speed wavefor digitization, the Tie- Interleaved Analog-to-Digital Converter (TIADC) is a well-nown technology to achieve higher saple rate based on current ADC technology. However, the isatches containing offset, gain and saple-tie errors aong all sub-adc channels decrease the perforance of Spurious Free Dynaic Range (SFDR) and ENOB, and liit the developent of TIADC technology. Previous published studies of isatch correction for TIADC technology have been widely incorporated into ultra-high speed ADC chip design and wavefor digitization syste. Analog correction is one of the isatch correction ethods, which can reduce or even eliinate the isatches. 5-7 It can correct isatches fro the source of isatch generation. But a high-precision feedbac circuit is essential, which is coplicated and difficult to design. Besides, it s also usually difficult to achieve the a) Author to who correspondence should be addressed: zlei@ustc.edu.cn purpose of copletely eliinating the isatches for the liitation of feedbac adjustent accuracy. Digital correction is the other isatch correction ethod, which is focused on the effects of isatch errors and eliinate or reduce the influence in the digital doain. Although the isatch errors still exist, its influence has been weaened or even eliinated after the digital correction. Lots of digital correction ethods have been presented in the early researches and articles, of which, two are corresponding to the isatch calibration ethods. One is applied in foreground calibration, suitable for the application with stable teperature and supply voltage. In these stable conditions, the isatches are stable and can be calibrated before operating. After calibrating the isatch errors, any correction ethods are applicable in the foreground calibration, such as the interpolation 8, fractional delay filter 9, Generation Wavelets, perfect reconstruction ethods and so on. With Loo-Up-Tables (LUTs), the correction eleents can calibrate the teperature dependence and design the correction paraeters before noral operation, which can extend the application conditions. The other one is used in bacground calibration. 2-2 The isatches are not needed to be nown before noral wor. The correction eleent not only corrects the isatch errors but also easures the isatches in tie. The self-adaptive ethod is a best choice in this situation.

2 In order to easure the isatches without interrupting the noral operation, Ref. 2 uses another sub-adc as a reference. In Ref. 3, it needs a special processing for the ADC input circuits and the spectru coponent of input signal is liited in Refs. 4 and 5. Although the self-adaptive ethod can be applied in a coplex operating condition, it uses too uch hardware resource to ipleent on Field Prograable Gate Arrays (FPGAs), Digital Signal Processors (DSPs) or even Application Specific Integrated Circuits (ASICs) for realtie correction with a high speed. And it is hard to follow the variation iediately when the input signal shape changes too fast. For the under-sapling situation, there are few articles discussing it. In Ref. 2, it gives a hardware correction ipleentation structure, but it is hard to apply at a very high sapling rate without a parallel structure. While in Ref. 22, it uses uch ore resource to ipleent the feedbac structure. The perfect reconstruction ethod is useful in the narrowband correction. In Ref.23, a ethod was proposed to address the issue for wide band correction, but no hardware ipleentation and verification was conducted, and it is only suitable for the input signal within the baseband. Besides, it uses both analog and digital filter bans, which aes its structure uch ore coplex and the analog part very sensitive to environental variation and noise. There are no articles jet discussing the perfect reconstruction applying in under-sapling. In this paper, we introduce a new fully digital ethod based on perfect reconstruction theory for broadband isatch correction not only in noral sapling but also in under-sapling ode. And we realize the isatch correction of the.6- Gsps 4-bit TIADC syste 24 and -Gsps 8-bit TIADC syste. II. DIGITAL CORRECTION A. Misatches in TIADC Syste In a TIADC syste, there are M sub-adcs. Each sub- ADC is sapling by a cloc with frequency of F s /M, where F s is the sapling frequency of the TIADC syste. And the phases of M sapling clocs are evenly distributed in the periodic of F s /M with a 2π/M phase shift. Then we can get the saples of the M ADCs in order, which is equivalent to get the saples by a signal ADC with sapling frequency of F s. For an instance, in a TIADC syste with four sub-adcs as shown in Fig., the phase shift between adjacent sub-adcs is 9 degrees, in the other words, the cloc phases are, 9, 8 and 27 degrees. Input signal 9 8 ADC ADC2 ADC3 ADC4 Cloc = fs/4 27 Fig.. The architecture of TIADC syste In an ideal condition, the input signal is distributed to the M sub-adcs with the sae aplitude and phase. But in the real syste, it is alost ipossible to achieve. The gain and delay isatches aong the M channels both exist. H (jω) is used to express the response of the real distribution circuits. And we also consider the tie shift of sapling cloc in H to ae all the sub-adcs sapling with the sae cloc to siplify the analysis. So the response of the analog circuits is presented as (), j t j TS t H j g e g e () where g is the gain of the th ( =,,, M-) channel consisting of the gain of ADC and the gain of the distributed circuits before ADC. t is the tie error with reference to the ideal saple tie. In this paper, g and t are both frequency dependent as shown in (2), where Ω is the frequency of input signal. The T s is the saple cloc period of the TIADC syste. And e jωts is represented the phase shift of sapling-cloc shown in Fig.. g g( ), t t( ) (2) After the th ADC, x [n] the digital output of this channel is given as (3) x[] n u() tn gu( nt TS t) o (3) where T is the real sapling cloc period, which is the ultiply of T s by M. And o is the offset of th channel, which is usual constant referring to the frequency of input signal and we do not discuss it in detail in the later part as it is easy to be corrected. The direct digital output of the TIADC syste is y[n], which is consisted of the digital outputs of M channel (x [n]) in order. With the suation forat, we can use an M up-sapling eleent and a delay eleent to get the ordered output saples as shown in Fig. 2, which is the scheatic diagra of TIADC syste consisting of both the analog-to-digital conversion and the recobination of digital output. Fig. 2. The scheatic diagra of TIADC principle

3 It is difficult to directly analyze the error of y[n], so we solve the proble in frequency doain later. Based on Fig.2 the DFT of y[n] is given as (4) when ignoring the offset error. In (4), ω is the digital frequency of the input signal and ω=ωt s. M j j jm Y( e ) DFT([]) y n e X ( e ) 2 M j ( U( j( )) ( e H ( j( 2 )))) S S S S S 2 M j( 2 M)( t U j g e TS ) j2 M e S S S MT T MT T MT ( ( ( )) ( )) MT T MT In an ideal condition (i.e. g =, t = ), (4) is equal to the Nyquist-Shannon Sapling Theore with a sapling cloc period of T S, which is alost ipossible to be achieved. Based on the analysis above, the ey of the correction is how to eliinate the pseudo spectru fro the digital output. However, both the gain and sapling-tie errors are contributed to the pseudo spectru and we can t separate the. And it is coplex to be expressed because of the frequency dependence of isatches, which aes the research ore challenging. B. Correction Method ) The basic structure of correction Referring to the research and contribution of the perfect reconstruction ethod 4, we use M filters to correct the gain and sapling-tie errors and reconstruct the output. The filter response is given as F (e jω ) and the correction structure is shown as Fig. 3,where the delay eleents are considering in the correction filters. Fig. 3. The bloc diagra of correction Coparing to Fig. 2, we can get the DFN(y[n]) as (5). 2 M j 2 j Y( e ) ( U( j( )) ( F ( e ) H ( j( )))) (5) MT T MT T MT S S S S S Considering the periodicity and syetry of the spectru of discrete digital signal, we usually tae care of the spectru in the base-band (i.e. ω ϵ [, π)). So in (5), we only need to calculate the su with finite nuber of the value of. And is deterined by the liiting condition expressed as (6). 2 (6) M Although the value of is related to the input frequency, the value of which we need consider in (5) is finite and the nuber is only M. So the perfect reconstruct condition is described as (7) fro which we can calculate (4) the coefficient of the correction filters. M j 2 F( e ) H( j( )) T S MT S jd (7) Me,, others M - integer For an instance, in a four-channel TIADC syste, the spectru is shown as Fig. 4, and the value of is also shown in it for the certain frequency ω. -2π =-,,,2 ω M= π π 2π Fig. 4. The spectru of TIADC digital output 2) Wide band correction In the narrow band noral sapling application, we can consider the isatch constant and then we can calculate the responses of M filters and then get both the analytic expression of the filters and the detailed filter coefficients through IDFT conversion. However, in the broad band application, we can t get the analytic solution. For this situation, we need another way to solve it. Referring to Ref. 23, we can use the N points (N should be chosen large enough) pulse response to replace the filter response F (e jω ). In other words, we just need to solve F (e jω ) (ω = 2πn/N, n =,, 2 N-), then we can get the filter responses within iniu ean square error. Here we can use this ethod to solve the perfect reconstruct condition. Although the responses (H (jω)) of input circuits are coplex and we can t get definite analytic expressions, we can obtain the isatches by interpolation through calibration. First, we can easure the isatches through injecting a sine wave signal to the TIADC syste. Then the easureent process is repeated with a series of frequencies. After these, we can get the response of input circuits at any frequency by interpolation calculation. After we get the input responses, we can calculate the filter response based on nuerical solution by solving the M equations in (7) in a series of frequencies, 2πn/N (n =,, 2 N-). N is the saples of input frequencies that we selected to calculate filter response. Although we can t get the absolute solution of filter responses by nuerical calculation, the accuracy is enough for coon high-speed ADC resolution. Then we can get the filter coefficients under the least ean square error approxiation through IDFT. An appropriate window is necessary to get a fewer order filter for the ipleentation in FPGA. The resolution is also applicable to the situation with constant isatches and the solution is siilar to the

4 perfect analytic solutions. 3) Correction in Under-Sapling Situation As under-sapling ethod is useful for reducing sapling rate, the correction in under-sapling for TIADC syste is also iportant. When considering the undersapling situation, we can still write the perfect reconstruct condition siilar to (7), just with a few differences on the value of. Fig. 6. Typical spectru of siulation in noral sapling. Before calibration; After calibration -5 Fig. 5. The spectru of TIADC digital output in under sapling Considering the periodicity and syetry, we just discuss it in the second Nyquist band in details. In this situation, the digital frequency range is ω ϵ [, π), and the liited condition is presented as (8). 2 2 (8) M In a four-channel TIADC syste, the spectru in under-sapling is shown as Fig. 5. And the value of is also shown in it for a certain frequency ω. No atter the isatches are constant or variable, it is difficult to get the analytic solutions. But the nuerical solution ethod for the wide band correction is still useable. The processing is siilar: firstly, calibrate the isatches in the second Nyquist band, secondly solve the perfect reconstruct condition and thirdly design the filter bans. 4) Siulation Results With the analysis above, we can siulate the correction process in Matlab. Fig. 6 and Fig. 7 are the typical spectru before correction and after correction in noral sapling and under-sapling. We can obviously find that the isatch errors are greatly suppressed by the correction process. Fig. 8 shows the siulation of the situation for two sine wave input signals. The siulation results show that the correction is woring well for iproving the perforance of TIADC syste within a wide range of frequency Signal Coponent Gain and Tie-sew Error Distortion Offset Error Distortion Noralized frequency (fs) Fig. 7. Typical spectru of siulation in under-sapling. Before calibration; After calibration Fig. 8. Typical spectru of siulation for two sine wave input signals in noral sapling. Before calibration; After calibration After the verification by siulation, we need to evaluate the perforance of the correction with the test data of TIADC syste using software. III. PERFORMANCE TEST RESULT After the analyzing and siulation, we have conducted a series of tests. To evaluate the perforance of our correction algorith, we use two different TIADC systes which had been designed: a.6-gsps 4-bit and a Gsps 8-bit TIADC syste. In our previous wor, we conducted isatch correction for a narrow band signal, which eans that we had to change the coefficients of the filters when switching input signal frequency. 24 Apparently,

5 there existed uch liitation for real application. In this paper, we eployed our new broad band correction algorith and verified the perforance through tests. In the tests, we used a high perforance RF signal source R&S SMA A to generate input test sinusoidal signals, which were further processed by external Band Pass Filters (BPFs) before fed to the TIADC syste under test. We obtained the dynaic perforance of these two systes based on the IEEE Std We ipleented our correction algoriths in the MATLAB platfor, with only one set of filter coefficients for input signal frequency in a wide band. Then we copared the syste perforance before and after correction. A. Results of the.6-gsps 4-bit TIADC Syste In the first TIADC syste, four 4-bit ADCs wor in parallel to obtain a syste sapling rate up to.6 Gsps. Fig. 9 shows the typical spectru before and after correction with a 2 MHz input sine wave signal. As we observe, the distortions caused by isatch errors are greatly suppressed. To confir the broad band correction effect, we eployed a straight forward test ethod, and used two sinusoidal input signals to see whether the isatch errors can be corrected. Fig. shows the test results, which agrees well with the siulation results in Fig. 8. Fig. 9. Typical spectru for single sine wave input signal in.6-gsps 4- bit TIADC syste. Before calibration; After calibration and conducted a series of tests. As shown in Fig., after correction, the ENOB perforance is greatly enhanced to be better than 9.5 bits, which is close to the single ADC (ADS5474 fro Texas Instruents Corporation) perforance according to its datasheet. The results indicate that with the wideband correction algorith proposed in this paper, good effect can be achieved over a wide input frequency range. We also plotted the perforance of the narrowband perfect reconstruction correction algorith for coparison, as the blac curve in Fig.. As shown in Fig., the narrow band correction exhibits good effect at the frequency point of 6 MHz, but the perforance deteriorates at other frequencies, especially with the increase of input signal frequency, and this is because the isatch errors change significantly in high frequency range. ENOB(bit) ENOB Gain(bit) After Narrowband Correction After Wideband Correction Before Correction 6MHz Input Frequency(MHz) Fig.. ENOB test results of.6-gsps 4-bit TIADC syste in the frequency range fro 5MHz to 6 MHz. ENOB test results; ENOB gain using different ethod. After the test in the first Nyquist zone, we tested the TIADC perforance in under-sapling situation. Due to the liitation of the ADC bandwidth (~6 MHz) in this TIADC syste, we had to switch down the sapling cloc frequency to MHz. Fig. 2 shows the results of typical spectru before and after correction, and it can be observed that the isatch errors are reduced obviously. The Fig. 3 also indicates that the ENOB is significantly iproved by the correction algorith, and better than 9.5 bits in the second Nyquist zone (up to 5 MHz), which is alost the sae with perforance in the ADC datasheet Noralized frequency (fs) Fig.. Typical spectru for two sine wave input signals in.6-gsps 4- bit TIADC syste. Before calibration; After calibration To obtain the systeatic perforance of our correction ethod, we tuned the input signal frequency, Fig. 2. Typical spectru of.6-gsps 4-bit TIADC syste for single sine wave input signal in under-sapling situation. Before calibration; After calibration

6 8 ENOB(bit) 9 After Correction Before Correction Input Frequency (MHz) Fig. 3. ENOB test results of.6-gsps 4-bit TIADC in under-sapling situation Fig. 5. Typical spectru for two sine wave input signals in -Gsps 8bit TIADC syste. Before calibration; After calibration B. Results of the -Gsps 8-bit TIADC Syste The -Gsps TIADC syste consists of two 5-Gsps 8bit EV8AQ6 Quad ADCs, each of which contains four.25-gsps Sub-ADC cores inside.26 Fig. 4, Fig. 5, and Fig. 6 show the typical frequency spectru with an input signal frequency of 2 MHz, frequency spectru of the signal with two input signal frequencies, and the ENOB results before and after correction. We can observe that the syste perforance can be greatly iproved by the correction algorith, and the ENOB is better than 6.5 bits up to GHz (7 bits fro 2 MHz to 6 MHz), which is alost the sae with the typical ADC perforance according to its datasheet. Siilarly, the ENOB deteriorates draatically in high frequency range using the narrow frequency band correction ethod with which the variation of isatches conducts poor correction effect in high frequency band Signal Coponent Gain and Tie-sew Error Distortion Offset Error Distortion -5 Fig. 6. ENOB test results of -Gsps 8-bit TIADC syste in the frequency range fro 2MHz to 6 MHz. ENOB test results; ENOB gain using narrowband and wideband correction. We tuned down the sapling speed of this TIADC syste to Msps, in order to verify the correction perforance in the under-sapling situation. As shown in Fig. 7 and Fig. 8, our correction algorith achieves good effects in the second Nyquist zone, and ENOB is enhanced by 2 bits after correction, which is also close to single ADC perforance. Of course, according to the architecture of our correction algorith, the correction is not only liited to the first and second Nyquist zones, but also can be applied in other frequency bands Noralized frequency (fs) Fig. 4. Typical spectru for single sine wave input signal in -Gsps 8bit TIADC syste. Before calibration; After calibration Signal Coponent Gain and Tie-sew Error Distortion Offset Error Distortion Noralized frequency (fs).9 Fig. 7. Typical spectru of -Gsps 8-bit TIADC for single sine wave input signal in under-sapling situation. Before calibration; After calibration

7 ENOB(bit) Fig. 8. ENOB test results of -Gsps 8-bit TIADC in under-sapling situation. IV. CONCLUSION We present a new fully digital isatch correction ethod for TIADC systes over a wide-band frequency range. Studies were ade to cover the base-band and under sapling situation. The correction algorith perforance was further verified through tests on two TIADC systes: a.6-gsps 4-bit and a -Gsps 8-bit syste. Test results indicate that this correction algorith can obviously iprove the perforance of TIADC syste over a broad frequency band both in the first and second Nyquist zones. ACKNOWLEDGMENTS This wor was supported in part by the National Natural Science Foundation of China under Grant 67573, in part by the Knowledge Innovation Progra of the Chinese Acadey of Sciences under Grant KJCX2-YW-N27, and in part by the CAS Center for Excellence in Particle Physics (CCEPP). X. Hu, L. Zhao, W. Zheng, S. Liu, and Q. An, "Data acquisition syste based on Tie-Interleaved Analog-to-Digital Conversion for Tie-of- Flight Mass Spectroeter," in Real Tie Conference (RT), 22 8th IEEE-NPSS, 22, pp Liu, Jin, and Vinod Muundagiri. "Study of ADC resolution and bandwidth requireent tradeoffs for high-speed data counications." Circuits and Systes (MWSCAS), 23 IEEE 56th International Midwest Syposiu on. IEEE, Zhao, Xiaodong, et al. "GPS-Disciplined Analog-to-Digital Converter for Phasor Measureent Applications." IEEE Transactions on Instruentation and Measureent (27). 4 Joly, Baptiste, Gérard Montarou, and Pierre-Etienne Vert. "Sapling Rate and ADC Resolution Requireents in Digital Front-End Electronics for TOF PET." IEEE Transactions on Nuclear Science (27).. 5 Duan Y, Alon E, A 2.8 Gs/s tie-interleaved adc with 25 GHz effective resolution bandwidth and 4.6 enob, IEEE Journal of Solid-State Circuits, 24, 49(8), pp Seo M, Rodwell M J W, Madhow U, A low coputation adaptive blind isatch correction for tie-interleaved ADCs, Circuits and Systes, 26. MWSCAS'6. 49th IEEE International Midwest Syposiu on. IEEE, 26,, pp Wang, Xiao, Fule Li, and Zhihua Wang. "A novel autocorrelation-based tiing isatch C alibration strategy in Tie-Interleaved ADCs." Circuits and Systes (ISCAS), 26 IEEE International Syposiu on. IEEE, Selva J. Functionally weighted Lagrange interpolation of band-liited signals fro nonunifor saples, IEEE Transactions on Signal Processing, 29, 57(), pp Johansson H, Lowenborg P. Reconstruction of nonuniforly sapled bandliited signals by eans of digital fractional delay filters, IEEE Transactions on signal processing, 22, 5(), pp Dilaghani, Mehdi Sefidgar, and Davud Aseani. "Correction of tiing sew error in TIADC's using second generation wavelets." Electrical Engineering (ICEE), 27 Iranian Conference on. IEEE, 27. Lee Y S, An Q. Calibration of tie-sew error in a M-channel tieinterleaved analog-to-digital converter, World Acadey of Science, Engineering and Technology, 25, 2, pp Salee S, Vogel C. Adaptive copensation of frequency response isatches in high-resolution tie-interleaved ADCs using a lowresolution ADC and a tie-varying filter, Circuits and Systes (ISCAS), Proceedings of 2 IEEE International Syposiu on. IEEE, 2, pp Jin H, Lee E K F. A digital-bacground calibration technique for iniizing tiing-error effects in tie-interleaved ADCs, IEEE Transactions on Circuits and Systes II: Analog and Digital Signal Processing, 2, 47(7), pp Salee S, Vogel C. Adaptive blind bacground calibration of polynoial-represented frequency response isatches in a two-channel tie-interleaved ADC, IEEE Transactions on Circuits and Systes I: Regular Papers, 2, 58(6), pp Liu, Husheng, and Hui Xu. "An Adaptive Blind Frequency-Response Misatches Calibration Method for Four-Channel TIADCs Based on Channel Swapping." IEEE Transactions on Circuits and Systes II: Express Briefs 64.6 (27): Matsuno J, Yaaji T, Furuta M, et al., All-digital bacground calibration technique for tie-interleaved ADC using pseudo aliasing signal, IEEE Transactions on Circuits and Systes I: Regular Papers, 23, 6(5), pp Jaal S M, Fu D, Singh M P, et al., Calibration of saple-tie error in a two-channel tie-interleaved analog-to-digital converter, IEEE Transactions on Circuits and Systes I: Regular Papers, 24, 5(), pp Jaal S M, Fu D, Chang N C J, et al. A -b 2-Msaple/s tieinterleaved analog-to-digital converter with digital bacground calibration, IEEE Journal of Solid-State Circuits, 22, 37(2), pp Mendel S, Vogel C. A copensation ethod for agnitude response isatches in two-channel tie-interleaved analog-to-digital converters, Electronics, Circuits and Systes, 26. ICECS'6. 3th IEEE International Conference on. IEEE, 26, pp Shahansoori A. Adaptive blind calibration of tiing offsets in a twochannel tie-interleaved analog-to-digital converter through Lagrange interpolation, Signal, Iage and Video Processing, 25, 9(5), pp Le Duc H, Nguyen D M, Jabbour C, et al. Hardware ipleentation of all digital calibration for undersapling TIADCs, Circuits and Systes (ISCAS), 25 IEEE International Syposiu on. IEEE, 25, pp Le Duc, Han, et al. "Fully Digital Feedforward Bacground Calibration of Cloc Sews for Sub-Sapling TIADCs Using the Polyphase Decoposition." IEEE Transactions on Circuits and Systes I: Regular Papers 64.6 (27): Velazquez S R, Nguyen T Q, Broadstone S R. Design of hybrid filter bans for analog/digital conversion, IEEE transactions on signal processing, 998, 46(4), pp Zhao L, Hu X, Feng C, et al. A.6-gsps high-resolution wavefor digitizer based on a tie-interleaved technique, IEEE Transactions on Nuclear Science, 23, 6(3), pp IEEE Standard for Terinology and Test Methods for Analog-to- Digital Converters, IEEE Standard 24-2, Jan Shaochun Tang, Research of Ultra-High-Speed High-Resolution Wavefor Digitization Based on Tie-Interleaved Technique, Ph.D. dissertation, Univ. Science and Technology of China, Hefei, 22, pp

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