Crosstalk and EMI Noise Investigation for a Coupled. Pair of Microstrip Lines (CPMLs) with a Break in Ground. Structure (BGS)

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1 Crosstalk and EMI Noise Investigation for a Coupled Pair of Microstrip Lines (CPMLs) with a Break in Ground Structure (BGS) Morteza Kazerooni 1, Ahmad Cheldavi 1 and Mahmoud Kamarei 2 1 College of Electrical Engineering, Iran University of Science and Technology, Tehran, Iran 2 Faculty of Electrical and Computer Engineering University of Tehran, Tehran, Iran Abstract In this paper, a simple approach has been proposed to determine parameters of CPMLs with BGS. A break or slot in the ground plane raises the impedance of microstrip lines. Firstly, the S-parameters of the transmission lines are obtained using an electromagnetic simulator. Then the L and C values are extracted using circuit modeling approaches. Measurements were performed using a vector network analyzer for the fabricated CPMLs. Results show that the parallel or crossed break with decoupling capacitors or ferrite beads enhances the noise isolation and lead to a reduction of signal reflection and the radiated emission. Frequency characteristics such as crosstalk, return loss and EMI radiated noise in the crossed break are degraded if capacitors or beads, are not used. Index Terms break in ground structure (BGS), coupled pair of microstrip lines (CPMLs), crosstalk effect, EMI noise, slot. I. INTRODUCTION Faster signal transients in high-density electronic systems are the current trend in new high-speed circuit design. Using a cheaper substrate with a smaller number of routing 1

2 layers is an attractive proposition at high frequencies. Routing on a severely sizeconstrained circuit board can inadvertently create non-ideal conditions such as a reference plane with breaks or slots produced by various power and ground islands. Electromagnetic problems such as crosstalk and EMI noise, which are usually ignored at relatively low frequencies in these circuits, are critical for overall system performance [1-3]. Crosstalk or radiation coupling is also a fundamental topic for the estimation of susceptibility and immunity since there are various types of transmission lines such as microstrip lines and electronic equipments. However, crosstalk analysis of microstrip lines including complex structures and a non-uniform ground plane (e.g. BGS) is usually difficult. The models used for these structures are usually based on the transverse electromagnetic (TEM) approximation [4], where the per-unit-length parameters are determined first and then the crosstalk of the propagation signals is generally estimated by using transmission line theory. Since the medium surrounding the microstrip is inhomogeneous, numerical techniques such as the method of moments [5], finitedifference solution technique [6], or finite element method [7] have been used to predict the per-unit-length parameters. Other solutions have also been developed, e.g. [8] for time-domain crosstalk between two parallel lossless lines. In this paper, the problems of crosstalk, return loss and EMI noise in CPMLs with a BGS are considered and investigated. First, the scattering parameters are obtained using the full-wave EM simulator Ansoft HFSS version Then the L and C values can be extracted from a circuit modeling approach. These parameters are frequency dependent. Generally, the solution method is based on the quasi-tem assumption although in some 2

3 cases, this assumption is not valid. Finally, the simulation results are compared to measurements of the structures. The simulated results show good agreement with measurements. In this paper three examples of CPMLs are considered; one with uniform and others with non-uniform ground planes. II. BREAK IN GROUND STRUCTURE (BGS) For high-speed signal transition systems, the power and ground planes are used as important references. Therefore, when high-speed transmission lines cross a break in the ground plane, crosstalk and radiated emission are greatly increased [9-14]. Fig. 1(a) shows the existence of a crossed break in the ground plane. A crossed break in the ground plane (Fig. 1(a)) differs from a crossed slot in the ground plane (Fig. 1(b)). Current flows in the circuit that has the minimum impedance. This means that at high frequencies, the current in the ground plane tends to flow directly under the signal trace. Due to the break in the ground plane most of the return current takes a circuitous route with minimum length around the break and increases the length electrically. Crosstalked Current Flow Direct Signal Trace 1 Direct Signal Trace 2 Return Signal Trace 1 Direct Signal Trace 3 Return Signal Trace 2 Return Signal Trace 3 Ground Plane a crossed break in Ground Plane (a) 3

4 Crosstalked Current Flow Direct Signal Trace 1 Direct Signal Trace 2 Return Signal Trace 1 Direct Signal Trace 3 Return Signal Trace 2 Return Signal Trace 3 Ground Plane a crossed slot in Ground Plane (b) Fig.1. Current distribution in a typical high density circuit. a) a crossed break in ground plane and b) a crossed slot in ground plane Increased crosstalk leads to unpredictable signal quality. Radiated emission, on the other traces, may lead to electromagnetic interference (EMI) noise. Therefore, a ground plane with a break can interrupt the return current and adversely affect EMI, crosstalk, signal rise/fall times and characteristic impedance. In most cases, using breaks in the ground plane is unavoidable. Therefore, some discrete decoupling capacitors are used to reduce the signal integrity degradation, as show in Fig. 2. A decoupling capacitor is sometimes placed near the signal trace across the break to maintain the high frequency return current path, but this is a poor solution. 4

5 Decoupling Capacitor Ground Plane a complete crossed break Ground Plane Fig. 2. Using decoupling capacitors in ground plane with a complete crossed break Also, employing decoupling capacitors leads to additional inductance in the board parameters and therefore creates an undesirable resonance in the frequency response as well as increased manufacturing costs. For high frequency design, it is desirable to have a uniform ground plane with no breaks. However, breaks in the ground or power planes are a common feature in densely packaged and multilayered PCBs. Breaks due to vias and thru holes divert the ground plane return current are often used to isolate unintentional signals from intended signals in a PCB. The current must return to its source, so the return current follows the break parasitic inductance and potential signal integrity (SI) problems can occur. Also, the current through the equivalent inductance results in a noise voltage between the two pieces of the ground plane that can lead to EMI events. Therefore: 1- A break is often cut in the ground plane to isolate the ground of the noisy drivers from the sensitive loads by increasing the impedance of the noise route. Therefore, by 5

6 adjusting the dimensions of the break and changing the current distribution on the ground plane, good susceptibility can be obtained. Fig. 3(a) shows an illustration of the current flow scenario in a BGS design. 2- One can properly select the break or slot dimensions to create an electromagnetic band gap (EBG) structure which suppresses the noise. 3- A complete crossed break in the ground plane can be placed on between the connector and the microstrip as illustrated in Fig. 3(b). Using a ferrite bead to bridge the break allows the intended low frequency signals to have a return current path, while effectively maintaining the high impedance of the break to the high frequency unintentional signals. High-speed I/O signals such as video should never be run over the complete crossed break in the ground plane with a ferrite bead. A crossed break Noisy Driver Direct Current Sensitive Load Effective area of the break Capacitive current or displacement current is proportional to the width of the break and degree of charge density Return current Inductive current or conduction current is proportional to the area of the break and degree of current density Ground Plane (a) 6

7 (b) Fig. 3. a) Current flow scenario in a BGS design and b) one method for isolation of low and high frequency PCB areas with the complete crossed break III. EQUIVALENT CIRCIT OF A BREAK AND SLOT 7 Due to existence of a break or slot, an additional capacitance and inductance will be created (Fig. 4(a)). A break and slot translate into a capactance due to the edge of the defect and an increased inductance due to the longer current paths. Hence the increase in area of the current loop causes an increase in EMI emissions or inductive noise since it is directly proportional to the total defected area. For high speed signals, the signal trace looks more like a transmission line and impedance mismatches cause reflections. Therefore quantification of the increase in inductance is desirable for EMI estimation. The break or slot section can be modeled exactly by lumped frequency dependent L and C elements assuming that the wavelength is larger than the defect dimensions (Fig. 4(b)). It is important to note that the transmission line is assumed lossless. The extraction of simulated results shows that α << β allowing for the assumption of a lossless line. This model is a real physical model. Therefore, all changes in the defect can be clearly

8 represented by values of the lumped elements. The total ABCD matrix for the transmission line with the break or slot becomes the product of the three sections (Fig. 4(c)). Two sections are simple transmission lines and a lumped LC resonator has been placed between them. Therefore, in spite of the existence of the break or slot, the TEM approximation is correct. The following equations present the approximate extracted equivalent circuit LC parameters for the break or slot which are constant with frequency. The parallel capacitance value in Fig. 4(b) for the given dimensions can be extracted from the attenuation pole location. The capacitance of the equivalent circuit, can be obtained as: fc 1 = (1) 2 2Z 2π(f f ) C c Once the capacitance value of the equivalent circuit is extracted, the series equivalent inductance for the given defected section can be calculated as: 1 = 2 4π f L 2 0 C (2) To validate the circuit model, two transmission lines with a break and slot have been simulated using Ansoft Designer 3.0. The proposed structures are designed on substrates with relative permittivity Also, the values of l A,, l B,, l C are 34.8,34.8 and mm, respectively. The width of the microstrip trace (W) on the board and its length are 2.25 and 71.6mm, respectively. The dielectric substrate was mm thick. The width of the break or slot (w b ) is 2mm and the length of the break and slot are and 22mm, respectively. The extracted L, and C values are 4 nh, and pf for the break and nh, and pf for the slot, where f c and f 0 are the resonant frequency 8

9 and 3-dB cutoff frequency, respectively. The simulation results for the amplitude show relatively excellent agreement as illustrated in Fig. 4(d) up to 5-6 GHz. This means that the model is valid up to this frequency. Therefore, above 5-6 GHz non-tem modes are dominant. The models can be improved by adding a resistor parallel to the LC resonator, which represents the radiation from the break or slot. Length Length la lb la lb l C w w l C l C wb wb (a) (b) Port 1 la Z0, v p Circuit plane The break or slot circuit Circuit plane lb Z0, v p Port 2 Measurement plane Measurement plane (c) 9

10 S parameters of the crossed break using full wave analysis and circuit model simulation 0 S parameters of the crossed slot using full wave analysis and circuit model simulation Amplitude(dB) S11 S21 Red and solid lines are from circuit model simulation Amplitude(dB) S11 S21 Red and solid lines are from circuit model simulation freq(ghz) freq(ghz) (d) Fig. 4. a) Dimensions of two microstrip circuits with a crossed break and slot in the ground planes, b) the break or slot equivalent circuit model, c) schematic of embedded the break or slot by the transmission lines (l A =l B =(Length-w s )/2) and d) comparison of the scattering parameters using full wave analysis and circuit simulation IV. EXTRACTION OF LINE PARAMETERS OF TRANSMISSION LINE WITH BGS Based on EM simulation results, the additional inductance and capacitance of a transmission line with a BGS is established and these parameters are extracted using circuit theory. The S-parameters as shown in (3) are obtained from Ansoft HFSS simulator and can be used to derive the total L and C parameters of the transmission line. This method assumes a TEM mode approximation. The procedure is detailed as: S S (f ) S [ S(f )] = 21 (f ) S 22 (f ) (f ) (3) The relations between the S-parameters, Z 11 and Y 11 and the propagation constant for the lossless line are given as: 10

11 Z p.((1 + S11(f )).(1 S22 (f )) + S12 (f ).S 21(f )) (f ) = = j.z cot( (f ).l) (4) (1 S (f )).(1 S (f )) S (f )S (f ) Z11 0 β Yp.((1 S11 (f )).(1 + S22 (f )) + S12 (f ).S 21(f )) (f ) = = j.y cot( (f ).l) (5) (1 + S (f )).(1 + S (f )) S (f )S (f ) Y11 0 β where Z p is the port impedance of 50 Ω with Y p being the corresponding admittance. β, l, Z 0 and Y 0 are the propagation constant, length, characteristic impedance and admittance of the interconnect, respectively. Then: Z 11 Z 0 (f ) = (6) Y11 by: and 1 β f ) = cot ( Z.Y ) / l (7) ( The relation between inductance and capacitance for a transmission line is given by: and L (f ).C(f ) = μ. ε (8) L(f ) 1 Z 0 (f ) = = (9) C(f ) C(f ) υ therefore, the inductance and capacitance per unit length of a microstrip line are given 1 2πf. 1 C(f ) υ υ Z 0 (f ). β(f ) L(f ) = = = (10) 2 υ C(f ) 2πf ω(f ) and 11

12 1 (f ) = (11) υ L(f ) C 2 where υ = 1 μ. ε (12) Simulations were performed for investigation of inductance and capacitance per unit length for the proposed transmission line with and without the break and slot (Fig.5). At low frequencies, the current is distributed uniformly throughout the conductor. However, as the frequency rises, there will be a tendency for the current to concentrate at the surface of the conductor. It is assumed that the current decreases exponentially inside the conductor (skin effect). As a result, the outer portions of the conductor contribute less than the inner parts to the overall inductance (current has more difficulty passing through the inner parts due to the skin effect). Thus, if current is concentrating on the surface, the inductance will be decreased. Therefore, with an increase of frequency, the inductance decreases. 3.5 x 10-7 Frequency dependent inductance 9 x 10-9 Frequency dependent capacitance Line Without the crossed break and slot Line with the crossed break Line with the crossed slot Line without the crossed break and slot Line With the crossed break Line with the crossed slot Inductance(H/m) Capacitance(F/m) freq(ghz) freq(ghz) Fig. 5. Comparison of the frequency dependent inductance and capacitance per unit length for the 12 proposed transmission line with and without the break and slot

13 As can be seen from Fig. 5, with increasing frequency, the value of inductance for the line is decreased. The current distribution is supposed to be a vector quantity and a function of frequency. Hence, the inductance of the transmission line decreases to a limited extent with an increase in frequency. According to this figure, the crossed break has caused more values of inductance with respect to the standard transmission line. This increase is more than 0.07 μh / m up to 0.7 GHz. The inductive noise in this frequency is high. This means that the break in ground plane creates additional inductance in the transmission lines. Also the results show almost no difference in capacitance line in these traces at low frequencies. As can be seen, that the capacitive noise increases slowly at very high frequencies. V. EXAMPLES OF THREE TYPES OF BREAKS AND SLOTS IN THE GROUND PLANES OF CPMLS Fig. 6(a) illustrates types of the breaks and slots that were cut on the ground plane of the test boards underneath the CPMLs. The cross sections of the CPMLs with the BGS are shown in Fig. 6(b). For these test boards S=10mm, the break length in the CPMLs with the parallel break is 71.6mm and the slot length in the crossed and parallel slot is 20 and 28mm, respectively. 13

14 Study board with crossed slot Study board with crossed break Study board without break Study board with parallel slot Study board with parallel break (a) (b) Fig. 6. a) Three basic types of the test boards for crosstalk assessment and b) the cross sections of the CPMLs with the breaks With a lumped representation, two coupled transmission lines are described only by L and C matrices of size of 2 x 2. Two lossless, symmetrical reciprocal transmission lines are described by: L = L L L L = L L M LM L (13) and C = C 11 C 21 C C = C C M C M C (14) 14 where L M and C M are the mutual inductance and capacitance, respectively. As a second method, this structure may be described by its eigenvalues, even-mode and odd-mode

15 characteristics. The wave can be decomposed to even and odd mode waves. Each wave has its own characteristic impedance and propagation constant. The even-mode and oddmode characteristic impedances and propagation delays are: Z oe = L + L C C M M Z oo L L C + C M = (15) M and t pde = ( L + L )( C C ) t = ( L + L )( C C ) M M pdo M + M (16) The relative capacitive c m and the magneticl m coupling can be defined as: C c = M L m l C = m m L (17) According to the above equations, in a homogenous medium, the relative coupling capacitance and inductance are similar, therefore the two modes propagate with the same speed: t pde = t pdo. If the two modes propagate with the same speed, no far-end crosstalk will appear with matched terminations. This is the case in coupled planar striplines. In surface microstrips, however, due to the inhomogeneity of the propagation medium, t pde and t pdo are different. In surface microstrips, since the dielectric fills only the volume bellow the strip, the capacitive coupling is weaker than the inductive coupling: l m > c m. In the next section, the mutual couplings and effects of the breaks and slots on CPMLs are investigated. VI. INVESTIGATION OF MUTUAL COUPLINGS ON PROPOSED CPMLS Mutual capacitance and inductance in two lossless, symmetrical reciprocal 15

16 transmission lines can be determined using simulation or experiment. At low frequencies where the transmission lines are electrically short, either capacitive or inductive coupling dominates for an open or short termination, respectively, of the driven line [15]. In either case, the coupling is proportional to the mutual parameters, and the mutual capacitance and inductance can be determined from S 21 simulations or measurements. An equivalent circuit model for this procedure is shown in Fig. 7. ZS Driven/Generator Line(TL1)-Z0 VS (1) Length (2) Near End Coupling Far End Coupling ZL ZS I1 ZNE Coupled/Receptor Line(TL2 )-Z0 (3) Length (4) ZFE VS V1 ZNE jωlmi1 jωcmv1 ZFE ZL Fig. 7. Schematic and equivalent circuit of symmetrical mutually CPMLs The electrical parameters of CPMLs can be measured using a LCR meter or generally calculated by well-known reference [16]. Fig. 7 shows the setup was used to determine S 21 and derive expressions for mutual inductance and mutual capacitance between Port 1 connected to one microstrip trace and Port 2 attached alternately to the near-end and far-end of the other microstrip trace. To calculate mutual capacitance, both traces were terminated with an open circuit. Also, to calculate mutual inductance, both traces were terminated with a short circuit. The mutual inductance and mutual capacitance were determined from S 21 as follows [17]: 16

17 C m S 21 = (18) 2. ω. Z. Length PI L m S 21. Z PI = (19) 2. ω. Length where Z PI is the port impedance (50 ohm). Fig. 8(a) shows the mutual coupling for proposed structures. Whole of the cases, except for the crossed break, the CPMLs with non uniform ground planes can be modeled using the symmetrical CPMLs with uniform ground planes. In this case equations (13) to (19) can be used to determine the characteristic impedances, phase constants and mutual couplings. From this figure, in the CPMLs with a break or slot, the inductive coupling increases at low frequencies. Since the return current is evenly distributed on the ground plane, existence of a slot causes a disturbance. Cutting a break in the ground plane between and parallel the signal traces can effectively isolate the driven circuit from the coupled circuit and reduce the inductive coupling at higher frequencies e.g. above 1.05 GHz as illustrated in Fig.8(a). At high frequencies with a parallel slot in the ground plane, the return current is allowed to spread out across the ground plane just as it was able to do when there was a solid ground plane. Since the width of slot is small, the return current is not adversely disrupted and the mutual inductance is not too affected. When the return current is restricted to the side under the source trace in the parallel break case, the inductive coupling is decreased. However, in the parallel slot case, the isolation is generally ineffective and can increase inductive coupling. 17

18 At lower frequencies, parallel breaking and slotting (bellow 0.9 GHz and 0.6 GHz, respectively) in the ground plane can increase capacitive coupling but at higher frequencies these defects can decrease it. When a crossed slot is cut into the ground plane, the current distribution is abruptly changed (Fig. 8(a)) and more of the electric and magnetic fluxes that would normally couple to the ground plane from the source trace couple to the victim trace, thereby increasing mutual inductance and capacitance. A similar effect occurs in the crossed break as well. However, in this case, the mutual couplings are very much higher than the crossed slot. Therefore, the line parameters of two mutual traces are not the same and the CPMLs is not a symmetrical structure. Thus, one cannot use the above equations. The proposed equivalent circuit of the crossed break is shown in Fig. 8(b). This equivalent circuit contains two lumped inductances and two lumped capacitances and related couplings such that L B1 > L B2 and C B2 > C B1. To determine these values, the method which is discussed in this paper can be used for each line individually. The extracted L B1, L B2, C B1 and C B2 values are 5.16 nh, 1.89 nh, pf and pf, respectively. Mutual couplings can be obtained from full wave simulation and circuit modeling by comparison of standard CPMLs and CPMLs with the crossed break. Fig. 8(c) illustrates how the breaks and slots change the distributions of return currents at low or high frequencies. The magnitude of surface current distribution on the ground of the test board with the crossed break is graphically presented in Fig. 8(d) at 1GHz. The difference of current level due to the break is obvious. 18

19 19

20 (a) (b) 20

21 (c) (d) Fig. 8. a) Mutual inductance and capacitance for the proposed CPMLs, b) the equivalent circuit for the CPMLs with the crossed break, c) schematic of the current distribution in the proposed breaks and slots and d) the magnitude of surface current at the 1 GHz for CPMLs with the crossed break in the ground plane. 21

22 VII. INVESTIGATION OF CROSSTALK EFFECT, RETURN LOSS AND EMI NOISE IN PROPOSED CPMLS In order to further investigate the conditions under which the crosstalk and return loss is increased, a number of experiments and computer EM simulations were performed. The far-end crosstalk cannot be neglected in the inhomogeneous medium case and can be a dominant factor when the rise and fall times of the applied input signal are very short. The effect of the parallel and crossed break on the near and far-end crosstalk of the investigated test boards is shown in Figs. 9(a) and 9(b). Due to the crossed break in the ground, the crosstalk in neighboring transmission lines is increased. Therefore, the equivalent expression may be interpreted as referred to as inductive and capacitive couplings. The influence of these parameters on the performance shows an impressive destruction in signal integrity. This degradation is about 26dB for the near-end and 33dB for the far-end. Also, the far-end crosstalk in the CPMLs with the parallel break is improved. However, the near-end crosstalk in the board with the parallel break is slightly increased at high frequencies. Fig. 9(c) shows the measured and simulated results of S 11 for the three proposed CPMLs test boards. As shown in this figure, the S 11 in the CPMLs is increased significantly with the crossed break. To survey the EMI noise in these test boards, the E-field pattern is a good gauge. As can be seen from Fig.10, the realized pattern gain in the CPMLs with the crossed break has been increased. This means that EMI noise in this case is higher than the other test boards. 22

23 The proposed test boards in this paper were fabricated and measured from 0.5 to 1.5 GHz. Photographs of three fabricated circuits with the breaks are shown in Fig Comparison of measurement and simulation -20 Near-end crosstalk(db) measured freq(ghz) x 10 9 (a) -10 Comparison of measurement and simulation Far-end crosstalk(db) measured freq(ghz) x 10 9 (b) 23

24 -5 Comparison of measurement and simulation Return S11(dB) loss(db) measured freq(ghz) x 10 9 Fig. 9. Comparison of the measured and simulated of a) near-end crosstalk, b) far-end crosstalk and c) (c) return loss in the proposed test boards Fig. 10. Comparison of the radiation pattern in E-plane between the three proposed CPMLs 24

25 The proposed breaks Fig. 11. Photograph of the three fabricated CPMLs VIII. CONCLUSIONS A simple technique for extraction of L, C and mutual coupling parameters of CPMLs with a break and slot in ground plane has been developed. Breaking or slotting (defecting) the ground plane is an effective way to reduce or suppress noise, but this approach may create some undesirable effects on the transmission lines such as CMPLs. A narrow parallel slot cut into the ground plane may be ineffective at reducing inductive coupling at high frequencies. However, it can reduce the capacitive coupling at these frequencies. Adding a parallel break in the ground plane actually decreases the mutual capacitance and inductance at high frequencies. Three factors, namely the types, orientation and dimensions of the defect determine the effect of the break or slot on capacitive and inductive couplings in CPMLs. Also, if the defect crosses the traces, mutual couplings increase. To reduce far-end crosstalk between two traces in the CPMLs, it may be advisable to apply a break in ground plane such as using a parallel break. 25

26 REFERENCES [1] L. B. Gravelle and F. Wilson, "EMI/EMC in printed circuit boards-a literature review, IEEE Trans. Electromagn. Compat., vol. 34, pp , May [2] C. R. Paul, "Modeling electromagnetic interference properties of printed circuit boards, " IBM J. Res. Dev., vol. 33, no. 1, pp , [3] T. Kasuga and H. Inoue, "A Study on Suppression of Crosstalk between Parallel Transmission Lines at High Frequency Band" IEEE Int. Symp. Electromagn. Compat., pp. 1-6, July [4] F. M. Romeo and M.M. Santomauro, "Time-domain simulation on n coupled transmission line network, IEEE Trans. Microwave Theory Tech., vol. MTT-35, pp , Feb [5] C. Wei, R. F. Harrington, J. R. Mautz, and T. K. Sarkar, "Multiconductor transmission lines in multilayered dielectric media, " IEEE Trans. Microwave Theory Tech., vol. MTT-32, pp , Apr [6] C. D. Taylor, G. N. Elkhouri, and T. E. Wade, "On the parasitic capacitances of multilevel parallel metallization lines, IEEE Trans. Electron. Devices, vol. ED-32, pp , Nov [7] R. L. Khan and G. I. Costache, "Considerations on modeling crosstalk on printed circuit boards, in IEEE Int. EMC Symp., Atlanta, GA, 1987, pp [8] C. R. Paul, "Literal solutions for time-domain crosstalk on lossless transmission lines, IEEE Trans. Electromagn. Compat., vol. 34, pp , Nov

27 [9] Senthinathan, R., et al., "Reference plane parasitics modeling and their contributions to power and ground path effective inductance as seen by the output drivers," IEEE Trans. Microwave Theory Tech., Vol. 42, , Sept [10] Chen, H., et al., "Effects of gaps and bypass capacitors on interconnect of PCB with multilayered geometry," IEE Proc. Microw. Antenna Propag., Vol. 148, No. 3, , [11] Cangellaris, A. C., "Electromagnetic characterization of high-speed VLSI interconnects with perforated reference planes," in Proc. of IEEE AP-S, Chicago, IL, USA, 98, July [12] Xue, Z., et al., "Electrical characteristics of multiconductor interconnects with perforated reference planes," in Proc. of IEEE third Topic Meeting on EPEP, Monterey, CA, USA, , Nov [13] Yuan, F., "Electromagnetic modeling and signal integrity simulation of power/ground networks in high speed digital packages and printed circuit boards," in Proc. of Design Automation Conference, San Francisco, CA, USA, 421{426, June [14] Jingook Kim; Heeseok Lee; Joungho Kim, "Effects on signal integrity and radiated emission by split reference plane on high-speed multilayer printed circuit boards," Advanced Packaging, IEEE Transactions on, vol.28, no.4, pp , Nov [15] C. R. Paul, Introduction to Electromagnetic Compatibility, New York: John Wiley & Sons, Inc.,

28 [16] C. R. Paul, Analysis of Multiconductor Transmission Lines, New York: John Wiley & Sons, Inc., [17] W. Cui, H. Shi, X. Luo, J. L. Drewniak, T. P. Van Doren, and T. Anderson, Lumped-element sections for modeling coupling between highspeed digital and I/O lines, in Proc. Int. Symp. Electromagnetic Compatibility, Austin, TX, Aug. 1997, pp

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