APPLICATION NOTE. Introduction. Related Literature. Enhancing RGB Sensitivity and Conversion Time. AN1910 Rev 1.00 Page 1 of 6.
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1 APPLICATION NOTE Enhancing RGB Sensitivity and AN1910 Rev 1.00 Introduction The RGB sensor is a low power, high sensitivity, RED, GREEN, and BLUE color light sensor (RGB) with an I 2 C (SMBus compatible) interface. Its state of the-art photodiode array provides an accurate RGB spectral response and excellent light source to light source variation (LS2LS). The sensor is designed to reject IR in light sources allowing the device to operate in environments from sunlight to dark rooms. The integrating ADC rejects 50Hz and 60Hz flicker caused by artificial light sources. Selectable ranges allow the user to optimize sensitivity suitable for the specific application. The sensor has 2 sensitivity ranges such as range 0 from 5.7 mlux to 375 lux and Range 1 from lux to 10,000 lux. However, Intersil has options which can expose even higher sensitivity by simple setting in custom registers. Related Literature ISL29125 datasheet VDD NC GND GND 1 SDA 2 ISL29125 TOP VIEW ISL29124 TOP VIEW SCL INT SDA VDD SCL TABLE 1. EXPOSE THE BITS DEFAULT Device ID 0 0x Dh RO MODE 0 0x00 X X X X X X X X N/A WO 0x02 2 0x02 See Datasheet for more detail 00h RW STATUS 8 0x08 TMEN REVEN See Datasheet for more detail 04h RO MODE x19 RESERVED SENS_EN RESERVED 00h RW MODE x1A RESERVED FAST RESERVED 00h RW MODE x1B Gain Setting 00h RW MODE x1C RESERVED SENSX[1] SENSX[0] 00h RW MODE x1D Gain Setting Set by Intersil RO AN1910 Rev 1.00 Page 1 of 6
2 Register 0x00 Register 0x00 performs two functions. If Reg 0x00 is in READ ONLY mode then it will be a Device ID. When the register is in the WRITE ONLY mode it will open up access to MODE registers. To access into a MODE, write 89h then C9h into Register 0x00. To reset all Registers to default and/or all state machine by writing 46h into Reg 0x00. BITS TABLE 2. DEVICE ID/ BITS DEFAULT Device ID 0 0x Dh RO MODE 0 0x00 X X X X X X X X N/A WO Register 0x02 See datasheet for more detail on how to set IR compensation. Write 00h to Reg 0x02 then Range 0 = 250 lux and range Register 0x08 1 = 6750 lux. Write BFh to Reg 0x02 then Range 0 = 375 lux and Range 1 = 10,000 lux. TABLE 3. STATUS (REG0x08) BITS STATUS 8 0x08 TMEN REVEN RGBCF[1] RGBCF[0] RESERVED BOUTF CONVENF RGBTHF 0x04 RO RGBTHF [B0] This is the status bit of the interrupt. The bit is set to logic high when the interrupt thresholds have been triggered (out of threshold window), and logic low when not yet triggered. Once activated and the interrupt is triggered, the INT pin goes low and the interrupt status bit goes high until the status bit is polled through the I 2 C read command. Both the INT output and the interrupt status bit are automatically cleared at the end of the 8-bit (00h) command register transfer. B0 CONVENF [B1] TABLE 4. INTERRUPT FLAG 0 Interrupt is cleared or not triggered yet 1 Interrupt is triggered This is the status bit of conversion. The bit is set to logic high when the conversion have been completed, and logic low when the conversion is not completed or not converted. B1 TABLE 5. CONVERSION FLAG 0 Still convert or cleared 1 Conversion completed BOUTF [B2] Bit2 on register address 0x08 is a status bit for the brownout condition (BOUT). The default value of this bit is HIGH, BOUT = 1, during the initial power-up. This indicates the device may possibly have gone through a brownout condition. Therefore, the status bit should be reset to LOW, BOUT = 0, by an I 2 C write command during the initial configuration of the device. The default register value is 0x04 at power-on. B2 0 No Brownout RGBCF [B5:B4] B[5:4] are flag bits to display7. TABLE 6. BROWNOUT FLAG 1 Power-down or Brownout occurred TABLE 7. CONVERSION FLAG B5:4 RGB UNDER CONVERSION 00 No Operation 01 GREEN 10 RED 11 BLUE AN1910 Rev 1.00 Page 2 of 6 a
3 REVEN [B6] REVEN is Bit 6 of the status register. The bit is asserted to logic 1 when writing 89h to reg 0x00. By default this bit is logic low. B6 Register 0x19 TABLE 8. 0 Logic low or not writing 89h to Reg 0x00 1 Writing 89h to Reg 0x00 SENS_EN is Bit 6 of MODE 1. In order to enable the MODE 4, SENS_EN should be asserted to a logic high. By default, it is a logic low or not enable MODE 4. TMEN[B7] TMEN is Bit 7 of the status bit of Custom Mode condition. The bit is asserted to logic 1 when writing C9h to reg 0x00 and REVEN is at logic 1. By default it is at logic low. B7 TABLE 9. 0 Logic low or not writing C9h to Reg 0x00 and REVEN = 0 1 Writing C9h to reg 0x00 and REVEN = 1 B7 and B6 are indicated whether the RGB sensor is in the custom mode or not. B6 0 Not Enable TABLE Access to MODE 4 TABLE 11. MODE 1 (REG 0x19) BITS MODE x19 RESERVED SENS_EN RESERVED 00h RW Register 0x1A TABLE 12. MODE 2 (REG 0x1A) BITS MODE x1A RESERVED FAST RESERVED 00h RW FAST [2] Bit 2 in Reg 0x1A is asserted to a logic high then ADC clock frequency is 4x faster than normal mode. By default FAST bit is set to low for normal mode. TABLE 13. B2 0 Normal conversion time 1 4x faster than normal conversion time AN1910 Rev 1.00 Page 3 of 6
4 Register 0x1B and 0x1D TABLE 14. MODES 3 AND 5 (REG 0x1B AND REG 0x1D) BITS MODE x1B GAIN SETTING 00h RW MODE x1D GAIN SETTING Set by Intersil RO Both MODE 3 and MODE 5 are set by Intersil in order to have a better part-to-part variation performance. Register 0x1C TABLE 15. MODE 4 (REG 0x1C) BITS TEST MODE x1C RESERVED SENX[1] SENX[0] 00h RW SENX[1:0] The full-scale range can be extended to be a high sensitivity at Bit[1:0] of reg0x1c. The range determines the ADC resolution (12 bits, and 16 bits). Each selectable range at SENX has a maximum allowable lux value. More information will be discussed in the following section. TABLE 16. B1:0 HIGH SENSITIVITY RANGES 00 1X X 10 2X X Application Information In order to expose high sensitivity ranges and speed up its conversion time, the sensor needs to be in the custom mode, instructed in the following steps: 1. Write 89h to Reg 0x00 2. Write C9h to Reg 0x00 to enter mode. If user want to check flag status at bit [7] and bit [6] of Reg0x08 should be asserted to logic. If they are asserted logic 1 then the sensor is in the mode. 3. Read reg 0x1D then store that value in a temp variable (software GUI/driver). 4. Write 40h to Reg 0x19 to enable high sensitivity ranges (Reg 0x1C/ MODE 4). 5. Write temp variable at step 2 to reg 0x1B. 6. Table 17 explains multiple higher sensitivity options the sensor can be: 7. Table 18 explains how the sensor can be sped up in the conversion time for 16-bit and 12-bit ADC. 8. To get out of MODE without resetting the device, write any hex values other than 89h and C9 to Reg 0x00. OR 9. To get out of MODE and reset the device, write 46h to Reg 0x00. This will reset all registers to their default states. TABLE 17. SENSITIVITY RANGES Register 0x02 Register 0x1C [1:0] Write 00h to Register 0x02 Range 0 = 250 lux, Range 1 = 6750 lux SENX[1:0] High Sensitivity Range (Lux) Write BFh to Register 0x02 Range 0 = 375 lux, Range 1 = 10,000 lux SENX[1:0] High Sensitivity Range (Lux) RANGE RANGE , , , ,000 Reg0x01 [4] (Bit) Reg0x1A [2] (FAST bit) Conversion time (ms) Number of Clocks ADC clock Period (µs) TABLE 18. SPEED-UP CONVERSION TIME 16-bit ADC (Bit[4] = 0) 12-bit ADC (Bit[4] = 1) FAST= 0 FAST = 1 FAST =0 FAST = AN1910 Rev 1.00 Page 4 of 6
5 Block Diagram for High Sensitivity Control Logic ROM Initialization (1 time only) 0x1B: MODE 3 0x1D:Gain Setting Set Mode Enable Read Value W:0x00:0x89 W:0x00:0xC9 R:0x1D MEM Enable High Sensitivity W:0x19:0x40 0x19:(6):Enable High Sensitivity Write Value Exit Mode Run Time W:0x1B:MEM W:0x00:0x00 W:0x00:0x00 W:0x00:0xC9 W:0x00:0x89 R S Q R S Q MODE Enable FIGURE 1. HIGH SENSITIVITY CONTROL LOGIC DIAGRAM Set Mode Enable Set High Sensitivity Exit Mode W:0x00:0x89 W:0x00:0xC9 W:0x1C:0x03*ON W:0x00:0x00 FIGURE 2. INITIALIZATION AND RUNNING TIME AN1910 Rev 1.00 Page 5 of 6
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APPLICATION NOTE Making Sense of Light Sensors AN1311 Rev 0.00 As electronics seamlessly weave their way into our lives, sensors play an increasingly important role. Light sensors are one of the simplest
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N-CHANNEL MOSFET FOR SWITCHING Preliminary Data Sheet R7DS1287EJ2 Rev.2. Description The 2SK1581C, N-channel vertical type MOSFET designed for general-purpose switch, is a device which can be driven directly
Part Number Lead Plating Packing Package µpa502ct-t1-a/at -A : Sn-Bi, -AT : Pure Sn 3000p/Reel SC-74A (5pMM)
µpa52ct N-CHANNEL MOSFET FOR SWITCHING Preliminary Data Sheet R7DS277EJ2 Rev.2. Jul 6, 25 Description The µpa52ct, N-channel vertical type MOSFET designed for general-purpose switch, is a device which
APPLICATION NOTE. Why and Where are DACs Used? Binary Number Theory. Basic DACs for Electronic Engineers. AN9741 Rev.0.00 Page 1 of 6.
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2SK E. Data Sheet. 1500V - 2A - MOS FET High Speed Power Switching. Features. Outline. Absolute Maximum Ratings. R07DS1275EJ0200 Rev.2.
SK5-8-E 5V - A - MOS FET High Speed Power Switching Data Sheet R7DS75EJ Rev.. Features High breakdown voltage (V DSS = 5 V) High speed switching Low drive current Outline RENESAS Package code: PRSSZD-A
APPLICATION NOTE. Introduction. Test Description. Test Platform. Measuring RF Interference in Audio Circuits. Test Results
APPLICATION NOTE Measuring RF Interference in Audio AN1299 Rev 0.00 Introduction The proliferation of wireless transceivers in portable applications has led to increased attention to an electronic circuits
USER S MANUAL. Description. Key Features. Specifications. References. Ordering Information ISL85403DEMO1Z. Demonstration Board
USER S MANUAL Demonstration Board Description The board allows quick evaluation of the ISL85403 in the synchronous buck configuration. It also demonstrates the compact size solution for the wide input
USER S MANUAL ISL8011EVAL1Z. Features. Ordering Information. Applications. Pinout. 1.2A Integrated FETs, High Efficiency Synchronous Buck Regulator
USER S MANUAL ISL80EVALZ.A Integrated FETs, High Efficiency Synchronous Buck Regulator AN9 Rev 0.00 ISL80 is an integrated FET,.A synchronous buck regulator for general purpose point-of load applications.
RAA is designed for 2Wheeler Flasher driver with double frequency flashing in low load current condition.
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APPLICATION NOTE. Introduction. Measuring Spurious Free Dynamic Range (SFDR) Checking Your Setup
APPLICATION NOTE Optimizing Setup Conditions for High AN9619 Rev. Introduction The HI5741 is a 14-bit 1MHz Digital to Analog Converter. This current out DAC is designed for low glitch and high Spurious
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COMMON INFORMATION. Introduction. An Integrated Synchronous-Rectifier Power IC with Complementary- Switching (HIP5010, HIP5011)
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APPLICATION NOTE. Traditional AC Coupling Technique. Reducing AC Coupling Capacitance in High Frequency Signal Transmission
APPLICATION NOTE Reducing AC Coupling Capacitance in AN1314 Rev 0.00 AC coupling is common in amplifier circuits for practical and historical reasons. The practical reason is to remove DC power on a transmission
APPLICATION NOTE. Abstract. Table of Contents. List of Figures. ISL29501 Sand Tiger Optics Application Note. AN1966 Rev 0.00 Page 1 of 6.
APPLICATION NOTE ISL29501 Sand Tiger Optics AN1966 Rev 0.00 Abstract This application note describes important optical and opto-mechanical features of the ISL29501 Sand Tiger distance measurement system.
Data Sheet. Non-specification for short circuit Low collector to emitter saturation voltage E
RBN5H65TFPQ-A 65V - 5A - IGBT Power Switching Data Sheet R7DS38EJ Rev.. Jun 5, 28 Features Trench gate and thin wafer technology (G8H series) High speed switching Built in fast recovery diode in one package
RENESAS Package code: PRSS0003AP-A (Package name: TO-220FPA)
7V - 3A - Triac Medium Power Use R7DS963EJ11 Rev.1.1 Features I T (RMS) : 3 A V DRM : 8 V (Tj = 125 C) Tj: 15 C I FGTI, I RGTI, I RGT III: 3 ma Insulated Type Planar Passivation Type Viso: V Outline RENESAS
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APPLICATION NOTE AN993 Rev.0.00 May 3, 208 Abstract This application note compares the basic performance features of Voltage Feedback (VFB) and Current Feedback (CFB) operational amplifiers (op amps),
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Nch IGBT for Strobe Flash Datasheet R07DS0749EJ0100 Rev.1.00 Features V CES : 430 V TO-220FL package High Speed Switching Outline RENESAS Package code: PRSS0003AF-A) (Package name: TO-220FL) 2 1 1 : Gate
1. Operating Modes Half-Duplex Configuration Circuit Schematics Revision History... 5
COMM INFOMTI S-232/S-485 Transceivers esigning a 3-Wire, Half-uplex, ual Protocol Interface Using the ISL3330 and ISL3331 T513 ev.1.00 bstract The ISL3330 and ISL331 are dual protocol (S-232/S-485) transceivers
60 Co irradiator located in the Palm Bay, Florida Intersil facility TABLE 1. ISL72813SEH PINOUT
TEST REPORT TR040 Rev 0 Introduction This report provides results of low dose rate and high dose rate, Total Ionizing Dose (TID) testing of the, a high-voltage, high-current driver. The tests were conducted
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NP9NVUK MOS FIELD EFFECT TRANSISTOR Preliminary Data Sheet R7DS577EJ Rev.. May, 8 Description The NP9NVUK is N-channel MOS Field Effect Transistor designed for high current switching applications. Features
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APPLICATION NOTE Embedded ACPI Compliant DDR AN1056 Rev 0.00 Introduction The ISL6532A provides a complete ACPI compliant power solution for dual channel DDRI and DDRII Memory systems. Included are both
SECONDARY PROTECTION F 100V PROTECTION RESISTORS AND FUSE 0.1 F 100V 100V RFI CAPS FIGURE 1. BASIC PROTECTION CIRCUIT
APPLICATION NOTE Implementing Tip and Ring Protection Circuitry Introduction A very important segment of the design of telecommunications equipment is proving adequate surge protection circuitry for the
RJH60F7BDPQ-A0. Preliminary Datasheet. 600V - 50A - IGBT High Speed Power Switching. Features. Outline. Absolute Maximum Ratings
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CR12LM-12B. Preliminary Datasheet. Thyristor. Medium Power Use. Features. Outline. Applications. Maximum Ratings. R07DS0213EJ0100 Rev.1.
Thyristor Medium Power Use Datasheet R7DS213EJ1 Rev.1. Features I T (AV) : 12 A V DRM : 6 V I GT : 3 ma Viso : 1 V The product guaranteed maximum junction temperature of 15 C Insulated Type Planar Passivation
APPLICATION NOTE. Introduction. Question 1. Question 4. Question 2. Question 3. Everything You Always Wanted to Know About the ICL8038
APPLIATION NOTE Everything You Always Wanted to Know About the IL03 AN013 Rev.1.00 Introduction The 03 is a function generator capable of producing sine, square, triangular, sawtooth and pulse waveforms
DATASHEET ISL70024SEH, ISL73024SEH. Features. Related Literature. Applications. 200V, 7.5A Enhancement Mode GaN Power Transistor
DATASHEET ISL724SEH, ISL7324SEH 2V, 7.5A Enhancement Mode GaN Power Transistor FN8976 Rev. 3. The ISL724SEH and ISL7324SEH are 2V N-channel enhancement mode GaN power transistors. These GaN FETs have been
USER S MANUAL ISL8112EVAL1Z. Recommended Equipment. Evaluation Board Setup Procedure. Quick Start. Evaluating the Other Output Voltage
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APPLICATION NOTE. Introduction: IEEE Standard Test Access Port and Boundary Scan Register for the ISL5216 (QPDC) AN9987 Rev 1.
APPLICATION NOTE IEEE Standard Test Access Port and Boundary Scan Register for the ISL5216 (PC) AN9987 Rev 1.00 Introduction: The test access port (TAP) provided on the ISL5216 is compliant with the IEEE
RBN75H125S1FP4-A0. Preliminary Data Sheet. 1250V - 75A - IGBT Application: Uninterruptible Power Supply. Features. Outline. Absolute Maximum Ratings
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Absolute Maximum Ratings (Tc = 25 C)
Datasheet RJP3HDPD Silicon N Channel IGBT High speed power switching R7DS465EJ2 Rev.2. Jun 5, 2 Features Trench gate and thin wafer technology (G6H-II series) High speed switching: t r = 8 ns typ., t f
Washing machine, electric fan, air cleaner, other general purpose control applications
7V-.8A-Triac Low Power Use Features I T (RMS) :.8 A V DRM :7 V I FGTI, I RGTI, I RGTIII : 5 ma Planar Passivation Type Surface Mounted Type Completed Pb Free Datasheet R7DS258EJ3 Rev.3. Outline RENESAS
Absolute Maximum Ratings (Ta = 25 C)
RJP63K2DPP-M Silicon N Channel IGBT High Speed Power Switching Datasheet R7DS468EJ2 Rev.2. Jun 5, 2 Features Trench gate and thin wafer technology (G6H-II series) Low collector to emitter saturation voltage:
RENESAS Package code: PRSS0003AP-A (Package name: TO-220FPA)
7V - 16A - Triac Medium Power Use R7DS1189EJ4 Rev.4. Features I T (RMS) : 16 A V DRM : 8 V (Tj=125 C) Tj: 15 C I FGTI, I RGTI, I RGT III:3 ma(2ma) Note6 Insulated Type Planar Passivation Type Viso: 2V
RQK0203SGDQA. Preliminary Datasheet. Silicon N Channel MOS FET Power Switching. Features. Outline. Absolute Maximum Ratings. R07DS0303EJ0500 Rev.5.
Datasheet RQK3SGDQ Silicon N Channel MOS FET Power Switching R7DS33EJ5 Rev.5. Jan, Features Low on-resistance R DS(on) = 68 mω typ (V GS =.5 V, I D =.5 ) Low drive current High speed switching.5 V gate
APPLICATION NOTE. Abstract. Table of Contents. List of Figures. ISL29501 Layout Design Guide. AN1917 Rev 0.00 Page 1 of 6.
APPLICATION NOTE ISL29501 Layout Design Guide AN1917 Rev 0.00 Abstract This document discusses best practices for board layout design for the ISL29501. Design goals are laid out for critical parameters
CR6PM-12A. Preliminary Datasheet. Thyristor. Medium Power Use. Features. Outline. Applications. Maximum Ratings
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2SK975. Preliminary Datasheet. Silicon N Channel MOS FET. Application. Features. Outline. Absolute Maximum Ratings
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1 2 3 E. Note1. Note1
Datasheet RJH6TDPQ-A 6V - 3A - IGBT Application:Current resonance circuit R7DS9EJ2 Rev.2. Apr 2, 2 Features Optimized for current resonance application Low collector to emitter saturation voltage V CE(sat)
Switching of all types of 14 V DC grounded loads, such as inductor, resistor and capacitor
Data Sheet mpd166036gr INTELLIGENT POWER DEVICE R07DS1118EJ0200 Rev.2.00 Description The mpd166036 is an N-channel high side driver with built-in charge pump and embedded protection function. It is also
APPLICATION NOTE. RS-422 vs RS-485. Abstract. Contents. List of Figures. Similarities and Key Differences
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APPLICATION NOTE. Linear Arrays Have Advantages Over Discrete Transistors. What Comprises A Linear Array
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APPLICATION NOTE. Making Accurate Voltage Noise and Current Noise Measurements on Operational Amplifiers Down to 0.1Hz. Abstract
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RENESAS Package code: PRSS0004AT-A (Package name: TO-220ABA) 4 2, 4
CR6CM-B 6V - 6A - Thyristor Medium Power Use R7DS23EJ Rev.. Jul. 11, 218 Features I T (AV) : 6 A V DRM : 6 V I GT: 1 ma Tj: 15 C Non-insulated Type Planar Passivation Type Outline RENESAS Package code:
Item Symbol Ratings Unit Collector to emitter voltage V CES 600 V Gate to emitter voltage V GES ±30 V Collector current. Note1.
2 3 RJP6FDPM 6 V - 25 A - IGBT High Speed Power Switching Datasheet R7DS585EJ Rev.. Features Low collector to emitter saturation voltage V CE(sat) =.4 V typ. (at I C = 25 A, V GE = 5 V, ) Trench gate and
RENESAS Package code: PRSS0003AP-A (Package name: TO-220FPA)
CR8FM-12B 6V - 8A - Thyristor Medium Power Use R7DS199EJ2 Rev.2. Sep. 11, 218 Features I T (AV) : 8 A V DRM : 6 V I GT: 15 ma Tj: 15 C Insulated Type (V iso : 2 V) Planar Passivation Type Outline RENESAS
RENESAS Package code: PRSS0003AP-A (Package name: TO-220FPA)
7V - 8A - Triac Medium Power Use R7DS977EJ2 Rev.2. Features I T (RMS) : 8 A V DRM : 8 V (Tj=125 C) Tj: 15 C I FGTI, I RGTI, I RGT III: 3 ma Insulated Type Planar Passivation Type Viso: 2V Outline RENESAS