MC1489, MC1489A, SN55189, SN55189A, SN75189, SN75189A QUADRUPLE LINE RECEIVERS

Size: px
Start display at page:

Download "MC1489, MC1489A, SN55189, SN55189A, SN75189, SN75189A QUADRUPLE LINE RECEIVERS"

Transcription

1 MC489, MC489A, SN5589, SN5589A, SN7589, SN7589A QUADRUPLE LINE RECEIVERS SLLS095D SEPTEMBER 973 REVISED OCTOBER 998 Input Resistance...3 kω to 7 kω Input Signal Range...±30 V Operate From Single 5-V Supply Built-In Input Hysteresis (Double Thresholds) Response Control that Provides: Input Threshold Shifting Input Noise Filtering Meet or Exceed the Requirements of TIA/ EIA-3-F and ITU Recommendation V.8 Fully Interchangeable With Motorola MC489 and MC489A SN5589, SN5589A...J OR W PACKAGE MC489, MC489A, SN7589, SN7589A D, N, OR NS PACKAGE (TOP VIEW) A CONT Y A CONT Y GND V CC 4A 4CONT 4Y 3A 3CONT 3Y The NS package is only available left-end taped and reeled. For SN7589, order SN7589NSR. description These devices are monolithic low-power Schottky quadruple line receivers designed to satisfy the requirements of the standard interface between data-terminal equipment and data-communication equipment as defined by TIA/EIA-3-F. A separate response-control (CONT) terminal is provided for each receiver. A resistor or a resistor and bias-voltage source can be connected between this terminal and ground to shift the input threshold levels. An external capacitor can be connected between this terminal and ground to provide input noise filtering. The SN5589 and SN5589A are characterized for operation over the full military temperature range of 55 C to 5 C. The MC489, MC489A, SN7589, and SN7589A are characterized for operation from 0 C to 70 C. SN5589, SN5589A... FK PACKAGE (TOP VIEW) Y NC A NC CONT CONT A NC Y GND NC VCC 3Y 3CONT 4A NC No internal connection 4CONT NC 4Y NC 3A Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Motorola is a trademark of Motorola, Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX DALLAS, TEXAS 7565 Copyright 998, Texas Instruments Incorporated On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

2 MC489, MC489A, SN5589, SN5589A, SN7589, SN7589A QUADRUPLE LINE RECEIVERS SLLS095D SEPTEMBER 973 REVISED OCTOBER 998 logic symbol A CONT 4 A 5 CONT 0 3A 9 3 CONT 3 4A 4 CONT THRS ADJ 3 Y 6 Y 8 3Y 4Y This symbol is in accordance with ANSI/IEEE Std and IEC Publication 67-. Pin numbers shown are for the D, J, N, NS, and W packages. logic diagram (positive logic) A Y Response Control schematic (each receiver) 9 kω 5 kω.66 kω VCC Output Y Response Control R Input A 4 kω 0 kω GND MC489 SN5589 SN7589 MC489A SN5589A SN7589A R 8.4 kω.84 kω Resistor values shown are nominal. POST OFFICE BOX DALLAS, TEXAS 7565

3 MC489, MC489A, SN5589, SN5589A, SN7589, SN7589A QUADRUPLE LINE RECEIVERS SLLS095D SEPTEMBER 973 REVISED OCTOBER 998 absolute maximum ratings over operating free-air temperature (unless otherwise noted) Supply voltage, V CC (see Note ) V Input voltage, V I ±30 V Output voltage, I O ma Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, T A : SN5589, SN5589A C to 5 C MC489, MC489A, SN7589, SN7589A C to 70 C Storage temperature range, T stg C to 50 C Case temperature for 60 seconds, FK package C Lead temperature,6 mm (/6 inch) from case for 60 seconds: J or W package C Lead temperature,6 mm (/6 inch) from case for 0 seconds: D, N, or NS package C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. All voltage values are with respect to the network ground terminal. PACKAGE DISSIPATION RATING TABLE TA A 5 C DERATING FACTOR TA A = 70 C TA A = 5 C POWER RATING ABOVE TA = 5 C POWER RATING POWER RATING D 950 mw 7.6 mw/ C 608 mw N/A FK 375 mw.0 mw/ C 880 mw 75 mw J 375 mw.0 mw/ C 880 mw 75 mw N 50 mw 9. mw/ C 736 mw N/A NS 65 mw 4.0 mw/ C 445 mw N/A W 000 mw 8.0 mw/ C 640 mw 00 mw In the J package, SN5589 and SN5589A chips are either silver glass or alloy mounted. recommended operating conditions MIN NOM MAX UNIT Supply voltage, VCC V Input voltage, VI 5 5 V High-level output current, IOH 0.5 ma Low-level output current, IOL 0 ma Operating free-air temperature, TA 0 70 C POST OFFICE BOX DALLAS, TEXAS

4 MC489, MC489A, SN5589, SN5589A, SN7589, SN7589A QUADRUPLE LINE RECEIVERS SLLS095D SEPTEMBER 973 REVISED OCTOBER 998 electrical characteristics over operating free-air temperature range, V CC = 5 V ± % (unless otherwise noted) VIT+ VIT PARAMETER Positive-going ginput threshold voltage Negative-going i input threshold voltage TEST FIGURE High-level VOH output voltage VOL IIH IIL IOS Low-level output voltage High-level input current Low-level input current Short-circuit output current TEST CONDITIONS SN5589 SN5589A MC489, MC489A SN7589 SN7589A MIN TYP MAX MIN TYP MAX TA = 5 C TA = 0 C to 70 C TA = 55 C to 5 C TA = 5 C A TA = 0 C to 70 C.55.5 TA = 55 C to 5 C TA = 5 C , 89A TA = 0 C to 70 C V TA = 55 C to 5 C VI = 0.75 V, IOH = 0.5 ma Input open, IOH = 0.5 ma VI =3V V, IOL =0mA V VI = 5 V VI = 3 V VI = 5 V VI = 3 V ma ICC Supply current VI = 5 V, Outputs open ma All characteristics are measured with the response-control terminal open. All typical values are at VCC = 5 V, TA = 5 C. switching characteristics, V CC = 5 V, C L = 5 pf, T A = 5 C PARAMETER TEST FIGURE UNIT V V ma ma TEST CONDITIONS MIN TYP MAX UNIT tplh Propagation delay time, low- to high-level output RL = 3.9 kω 5 85 tphl Propagation delay time, high- to low-level output RL = 390 Ω ttlh Transition time, low- to high-level output RL = 3.9 kω 0 75 tthl Transition time, high- to low-level output RL = 390 Ω 0 0 ns ns 4 POST OFFICE BOX DALLAS, TEXAS 7565

5 MC489, MC489A, SN5589, SN5589A, SN7589, SN7589A QUADRUPLE LINE RECEIVERS PARAMETER MEASUREMENT INFORMATION VCC SLLS095D SEPTEMBER 973 REVISED OCTOBER 998 VIT, V IOH Response Control VOL IOL VOH Open Unless Otherwise Specified CC RC VC RC +VC Figure. V IT+, V IT, V OH, V OL VCC ICC (see Note A) VI IIH IIL Open Response Control Open NOTE A: ICC is tested for all four receivers simultaneously. Figure. I IH, I IL, I CC VCC Response Control Open Figure 3. I OS Arrows indicate actual direction of current flow. Current into a terminal is a positive value. IOS POST OFFICE BOX DALLAS, TEXAS

6 MC489, MC489A, SN5589, SN5589A, SN7589, SN7589A QUADRUPLE LINE RECEIVERS SLLS095D SEPTEMBER 973 REVISED OCTOBER 998 PARAMETER MEASUREMENT INFORMATION VCC Pulse Generator (see Note A) Response Control Open Output TEST CIRCUIT RL See Note C CL = 5 pf (see Note B) 0 ns 0 ns Input 0% 90% 50% 90% 50% 0% 4 V 0 V tphl tplh Output 90% 50% 0% 50% 90% 0% VOH VOL tthl VOLTAGE WAVEFORMS ttlh NOTES: A. B. The pulse generator has the following characteristics: ZO = 50 Ω, tw = 500 ns. CL includes probe and jig capacitances. C. All diodes are N3064 or equivalent. Figure 4. Test Circuit and Voltage Waveforms 6 POST OFFICE BOX DALLAS, TEXAS 7565

7 MC489, MC489A, SN5589, SN5589A, SN7589, SN7589A QUADRUPLE LINE RECEIVERS TYPICAL CHARACTERISTICS SLLS095D SEPTEMBER 973 REVISED OCTOBER 998 V VO O Output Voltage V ÁÁÁ RC = 5 kω ÁÁÁ VC = 5 V VIT ÁÁÁÁ RC = 3 kω ÁÁÁÁ VC = 5 V ÎÎÎ VIT+ ÎÎÎ VIT SN6589, SN7589 OUTPUT VOLTAGE vs INPUT VOLTAGE VIT+ VIT RC = ÎÎÎÎ VIT+ V IT ÁÁÁÁ RC = kω ÁÁÁÁ VC = 5 V VIT+ ÁÁÁÁ ÁÁÁÁÁ VCC = 5 V TA = 5 C ÁÁÁÁÁ See Figure VI Input Voltage V Figure 5 SN6589A, SN7589A OUTPUT VOLTAGE vs INPUT VOLTAGE V VO O Output Voltage V ÁÁÁÁ RC = 5 kω VC = 5 V VIT VIT+ VIT ÎÎÎÎ RC = VIT+ VIT ÁÁÁÁ RC = kωááááá VCC = 5 V VC = 5 V TA = 5 C ÁÁÁÁÁ VIT+ See Figure VI Input Voltage V Figure 6 POST OFFICE BOX DALLAS, TEXAS

8 MC489, MC489A, SN5589, SN5589A, SN7589, SN7589A QUADRUPLE LINE RECEIVERS SLLS095D SEPTEMBER 973 REVISED OCTOBER 998 TYPICAL CHARACTERISTICS.4 INPUT THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE INPUT THRESHOLD VOLTAGE vs SUPPLY VOLTAGE V IT Input Threshold Voltage V VIT 89A VIT 89 VIT+ 89A VIT+ Input Threshold Voltage V V IT A VIT+ ÎÎÎ 89 VIT ÎÎÎ 89 VIT+ 89A VIT TA Free-Air Temperature C VCC Supply Voltage V 9 0 Figure 7 Figure 8 Amplitude V ÁÁÁÁ CC = 0 pf ÁÁÁÁ CC = 00 pf SN7589 NOISE REJECTION VCC = 5 V TA = 5 C See Note A ÎÎÎÎÎ ÁÁÁÁ CC = 300 pf ÎÎÎÎÎ ÁÁÁÁ CC = 500 pf Amplitude V ÁÁÁÁ CC = pf ÎÎÎÎÎ ÁÁÁÁ CC = 00 pf SN7589A NOISE REJECTION ÎÎÎÎ VCC = 5 V ÎÎÎÎ TA = 5 C See Note A CC = 300 pf ÁÁÁÁÁ ÎÎÎÎÎ CC = 500 pf Figure tw Pulse Duration ns NOTE A: Maximum amplitude of a positive-going pulse that, starting from 0 V, will not cause a change in the output level tw Pulse Duration ns NOTE A: Maximum amplitude of a positive-going pulse that, starting from 0 V, will not cause a change in the output level. Figure 0 Data for free-air temperatures below 0 C and above 70 C are applicable to SN5589 and SN5589A circuits only. 8 POST OFFICE BOX DALLAS, TEXAS 7565

9 MC489, MC489A, SN5589, SN5589A, SN7589, SN7589A QUADRUPLE LINE RECEIVERS TYPICAL CHARACTERISTICS SLLS095D SEPTEMBER 973 REVISED OCTOBER ÎÎÎÎÎ VCC = 5 V Control Open ÎÎÎÎÎ TA = 5 C INPUT CURRENT vs INPUT VOLTAGE II Input Current ma VI Input Voltage V Figure POST OFFICE BOX DALLAS, TEXAS

10 PACKAGE OPTION ADDENDUM 7-Mar-07 PACKAGING INFORMATION Orderable Device Status () Package Type Package Drawing Pins Package Qty Eco Plan () Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) A ACTIVE LCCC FK 0 TBD POST-PLATE N / A for Pkg Type -55 to A SNJ55 89AFK Device Marking CA ACTIVE CDIP J 4 TBD A4 N / A for Pkg Type -55 to CA SNJ5589AJ DA ACTIVE CFP W 4 TBD A4 N / A for Pkg Type -55 to DA SNJ5589AW MC489AN ACTIVE PDIP N 4 5 Pb-Free (RoHS) MC489ANE4 ACTIVE PDIP N 4 5 Pb-Free (RoHS) MC489N ACTIVE PDIP N 4 5 Pb-Free (RoHS) MC489NE4 ACTIVE PDIP N 4 5 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 MC489AN CU NIPDAU N / A for Pkg Type 0 to 70 MC489AN CU NIPDAU N / A for Pkg Type 0 to 70 MC489N CU NIPDAU N / A for Pkg Type 0 to 70 MC489N SN5589AJ ACTIVE CDIP J 4 TBD A4 N / A for Pkg Type -55 to 5 SN5589AJ (4/5) Samples SN7589AD ACTIVE SOIC D 4 50 Green (RoHS & no Sb/Br) SN7589ADE4 ACTIVE SOIC D 4 50 Green (RoHS & no Sb/Br) SN7589ADR ACTIVE SOIC D Green (RoHS & no Sb/Br) SN7589ADRG4 ACTIVE SOIC D Green (RoHS & no Sb/Br) SN7589AN ACTIVE PDIP N 4 5 Pb-Free (RoHS) SN7589ANE4 ACTIVE PDIP N 4 5 Pb-Free (RoHS) SN7589ANSR ACTIVE SO NS Green (RoHS & no Sb/Br) SN7589ANSRG4 ACTIVE SO NS Green (RoHS & no Sb/Br) CU NIPDAU Level--60C-UNLIM 0 to 70 SN7589A CU NIPDAU Level--60C-UNLIM 0 to 70 SN7589A CU NIPDAU Level--60C-UNLIM 0 to 70 SN7589A CU NIPDAU Level--60C-UNLIM 0 to 70 SN7589A CU NIPDAU N / A for Pkg Type 0 to 70 SN7589AN CU NIPDAU N / A for Pkg Type 0 to 70 SN7589AN CU NIPDAU Level--60C-UNLIM 0 to 70 SN7589A CU NIPDAU Level--60C-UNLIM 0 to 70 SN7589A Addendum-Page

11 PACKAGE OPTION ADDENDUM 7-Mar-07 Orderable Device Status () Package Type Package Drawing Pins Package Qty Eco Plan SN7589D ACTIVE SOIC D 4 50 Green (RoHS & no Sb/Br) SN7589DR ACTIVE SOIC D Green (RoHS & no Sb/Br) SN7589DRG4 ACTIVE SOIC D Green (RoHS & no Sb/Br) SN7589N ACTIVE PDIP N 4 5 Pb-Free (RoHS) SN7589NE4 ACTIVE PDIP N 4 5 Pb-Free (RoHS) SN7589NSR ACTIVE SO NS Green (RoHS & no Sb/Br) () Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) CU NIPDAU Level--60C-UNLIM 0 to 70 SN7589 CU NIPDAU Level--60C-UNLIM 0 to 70 SN7589 CU NIPDAU Level--60C-UNLIM 0 to 70 SN7589 CU NIPDAU N / A for Pkg Type 0 to 70 SN7589N CU NIPDAU N / A for Pkg Type 0 to 70 SN7589N CU NIPDAU Level--60C-UNLIM 0 to 70 SN7589 SNJ5589AFK ACTIVE LCCC FK 0 TBD POST-PLATE N / A for Pkg Type -55 to A SNJ55 89AFK Device Marking SNJ5589AJ ACTIVE CDIP J 4 TBD A4 N / A for Pkg Type -55 to CA SNJ5589AJ SNJ5589AW ACTIVE CFP W 4 TBD A4 N / A for Pkg Type -55 to DA SNJ5589AW (4/5) Samples () The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. () Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either ) lead-based flip-chip solder bumps used between the die and package, or ) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.% by weight in homogeneous material) Addendum-Page

12 PACKAGE OPTION ADDENDUM 7-Mar-07 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN5589A, SN7589A : Catalog: SN7589A Military: SN5589A NOTE: Qualified Version Definitions: Catalog - TI's standard catalog product Military - QML certified for Military and Defense Applications Addendum-Page 3

13 PACKAGE MATERIALS INFORMATION 8-Apr-03 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W (mm) A0 (mm) B0 (mm) K0 (mm) P (mm) W (mm) Pin Quadrant SN7589ADR SOIC D Q SN7589ADR SOIC D Q SN7589DR SOIC D Q SN7589NSR SO NS Q Pack Materials-Page

14 PACKAGE MATERIALS INFORMATION 8-Apr-03 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN7589ADR SOIC D SN7589ADR SOIC D SN7589DR SOIC D SN7589NSR SO NS Pack Materials-Page

15

16

17

18

19

20

21

SN5406, SN5416, SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS SDLS031A DECEMBER 1983 REVISED DECEMBER 2001

SN5406, SN5416, SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS SDLS031A DECEMBER 1983 REVISED DECEMBER 2001 SN5406, SN5416, SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS SDLS031A DECEMBER 1983 REVISED DECEMBER 2001 Convert TTL Voltage Levels to MOS Levels High Sink-Current

More information

SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES

SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SDAS113B APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers

More information

MC1489, MC1489A, SN55189, SN55189A, SN75189, SN75189A QUADRUPLE LINE RECEIVERS

MC1489, MC1489A, SN55189, SN55189A, SN75189, SN75189A QUADRUPLE LINE RECEIVERS MC1489, MC1489A, SN55189, SN55189A, SN75189, SN75189A QUADRUPLE LINE RECEIVERS SLLS095D SEPTEMBER 1973 REVISED OCTOBER 1998 Input Resistance...3 kω to 7 kω Input Signal Range...±30 V Operate From Single

More information

MC1489, MC1489A, SN55189, SN55189A, SN75189, SN75189A QUADRUPLE LINE RECEIVERS

MC1489, MC1489A, SN55189, SN55189A, SN75189, SN75189A QUADRUPLE LINE RECEIVERS MC89, MC89A, SN89, SN89A, SN789, SN789A SLLS9B SEPTEMPER 97 REVISED MAY 99 Input Resistance... kω to 7 kω Input Signal Range...± V Operate From Single -V Supply Built-In Input Hysteresis (Double Thresholds)

More information

SN5406, SN5416, SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS

SN5406, SN5416, SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS Convert TTL Voltage Levels to MOS Levels High Sink-Current Capability Input Clamping Diodes Simplify System Design Open-Collector Drivers for Indicator Lamps and Relays Inputs Fully Compatible With Most

More information

PACKAGE OPTION ADDENDUM www.ti.com 17-Mar-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp

More information

description logic diagram (positive logic) logic symbol

description logic diagram (positive logic) logic symbol SDAS074B APRIL 1982 REVISED JANUARY 1995 AS1004A Offer High Capacitive-Drive Capability Driver Version of ALS04B and AS04 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers

More information

SN75471 THRU SN75473 DUAL PERIPHERAL DRIVERS

SN75471 THRU SN75473 DUAL PERIPHERAL DRIVERS SN747 THRU SN747 DUAL PERIPHERAL DRIVERS SLRS024 DECEMBER 976 REVISED MAY 990 PERIPHERAL DRIVERS FOR HIGH-VOLTAGE HIGH-CURRENT DRIVER APPLICATIONS Characterized for Use to 00 ma High-Voltage Outputs No

More information

ua9637ac DUAL DIFFERENTIAL LINE RECEIVER

ua9637ac DUAL DIFFERENTIAL LINE RECEIVER ua9637ac DUAL DIFFERENTIAL LINE RECEIVER Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-422-B and EIA/TIA-423-B and ITU Recommendations V.10 and V.11 Operates From Single 5-V Power Supply

More information

SN75150 DUAL LINE DRIVER

SN75150 DUAL LINE DRIVER SN75150 DUAL LINE DRIVER Meets or Exceeds the Requirement of TIA/EIA-232-F and ITU Recommendation V.28 Withstands Sustained Output Short Circuit to Any Low-Impedance Voltage Between 25 V and 25 V 2-µs

More information

Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. SLLS094C SEPTEMBER 1983 REVISED MAY 2004 Meet or Exceed the Requirements

More information

description TPS3836, TPS3838 DBV PACKAGE (TOP VIEW) V DD GND RESET TPS3837 DBV PACKAGE (TOP VIEW)

description TPS3836, TPS3838 DBV PACKAGE (TOP VIEW) V DD GND RESET TPS3837 DBV PACKAGE (TOP VIEW) М TPS3836E18-Q1 / J25-Q1 / H30-Q1 / L30-Q1 / K33-Q1 Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval ESD Protection Exceeds

More information

SN75157 DUAL DIFFERENTIAL LINE RECEIVER

SN75157 DUAL DIFFERENTIAL LINE RECEIVER SN75157 DUAL DIFFERENTIAL LINE RECEIVER Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-422-B and EIA/TIA-423-B and ITU Recommendation V.1 and V.11 Operates From Single 5-V Power Supply Wide

More information

description/ordering information

description/ordering information SLLS094C SEPTEMBER 1983 REVISED MAY 2004 Meet or Exceed the Requirements of ANSI TIA/ EIA-232-E and ITU Recommendation V.28 Current-Limited Output: 10 ma Typical Power-Off Output Impedance: 300 Ω Minimum

More information

ua9636ac DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE

ua9636ac DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE SLLSB OCTOBER 9 REVISED MAY 995 Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-3-B and -3-E and ITU Recommendations V. and V. Output Slew Rate Control Output Short-Circuit-Current Limiting

More information

DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS

DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS DS8830, SN5583, SN7583 DUAL DIFFERENTIAL LINE DRIVERS Single 5-V Supply Differential Line Operation Dual Channels T TL Compatibility Short-Circuit Protection of Outputs Output Clamp Diodes to Terminate

More information

SN54ALS139, SN74ALS139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

SN54ALS139, SN74ALS139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SN54ALS9, SN74ALS9 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Two Enable Inputs to Simplify Cascading and/or

More information

SN75158 DUAL DIFFERENTIAL LINE DRIVER

SN75158 DUAL DIFFERENTIAL LINE DRIVER SN7558 DUAL DIFFERENTIAL LINE DRIVER Meets or Exceeds the Requirements of ANSI EIA/TIA-422-B and ITU Recommendation V. Single 5-V Supply Balanced-Line Operation TTL Compatible High Output Impedance in

More information

SN75124 TRIPLE LINE RECEIVER

SN75124 TRIPLE LINE RECEIVER SN75124 TRIPLE LINE RECEIER Meets or Exceeds the Requirements of IBM System 360 Input/Output Interface Specification Operates From Single 5- Supply TTL Compatible Built-In Input Threshold Hysteresis High

More information

MC3486 QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 3-STATE OUTPUTS

MC3486 QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 3-STATE OUTPUTS Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-422-B and EIA/TIA-423-B and ITU Recommendations V.10 and V.11 3-State, TTL-Compatible s Fast Transition Times Operates From Single 5-V Supply

More information

SN55113, SN75113 DUAL DIFFERENTIAL LINE DRIVERS

SN55113, SN75113 DUAL DIFFERENTIAL LINE DRIVERS SN, SN7 Choice of Open-Collector, Open-Emitter, or -State s High-Impedance State for Party-Line Applications Single-Ended or Differential AND/NAND s Single -V Supply Dual Channel Operation Compatible With

More information

description/ordering information

description/ordering information SCLS087E DECEMBER 1982 REVISED AUGUST 2003 Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 20-µA Max I CC Typical t pd = 11 ns ±4-mA Output Drive

More information

SN74LVC138A-Q1 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER SCAS708B SEPTEMBER 2003 REVISED FEBRUARY 2008

SN74LVC138A-Q1 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER SCAS708B SEPTEMBER 2003 REVISED FEBRUARY 2008 1 1FEATURES Qualified for Automotive Applications ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pf, R = 0) Operates From 2 V to 3.6 V Inputs Accept

More information

SN54ALS1035, SN74ALS1035 HEX NONINVERTING BUFFERS WITH OPEN-COLLECTOR OUTPUTS

SN54ALS1035, SN74ALS1035 HEX NONINVERTING BUFFERS WITH OPEN-COLLECTOR OUTPUTS Noninverting Buffers With Open-Collector Outputs description These devices contain six independent noninverting buffers. They perform the Boolean function Y = A. The open-collector outputs require pullup

More information

Data sheet acquired from Harris Semiconductor SCHS038C Revised October 2003

Data sheet acquired from Harris Semiconductor SCHS038C Revised October 2003 Data sheet acquired from Harris Semiconductor SCHS038C Revised October 2003 The CD4035B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages

More information

SN75176A DIFFERENTIAL BUS TRANSCEIVER

SN75176A DIFFERENTIAL BUS TRANSCEIVER SN7576A Bidirectional Transceiver Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-4-B and ITU Recommendation V. Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments

More information

SINGLE INVERTER GATE Check for Samples: SN74LVC1G04

SINGLE INVERTER GATE Check for Samples: SN74LVC1G04 1 SN74LVC1G04 www.ti.com SCES214Z APRIL 1999 REVISED NOVEMBER 2012 SINGLE INVERTER GATE Check for Samples: SN74LVC1G04 1FEATURES 2 Available in the Texas Instruments NanoFree I off Supports Live Insertion,

More information

SN55182, SN75182 DUAL DIFFERENTIAL LINE RECEIVERS

SN55182, SN75182 DUAL DIFFERENTIAL LINE RECEIVERS SN55182, SN75182 DUAL DIFFERENTIAL LINE RECEIVERS Single 5-V Supply Differential Line Operation Dual Channels TTL Compatibility ±15-V Common-Mode Input Voltage Range ±15-V Differential Input Voltage Range

More information

description logic diagram (positive logic) logic symbol

description logic diagram (positive logic) logic symbol SDAS112B APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs description These

More information

SN54ALS38B, SN74ALS38B QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS

SN54ALS38B, SN74ALS38B QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS SN54ALS38B, SN74ALS38B QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS SDAS196B APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic

More information

SN54ALS09, SN74ALS09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS

SN54ALS09, SN74ALS09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS SN54ALS09, SN74ALS09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS SDAS084B APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip

More information

CD4066B CMOS QUAD BILATERAL SWITCH

CD4066B CMOS QUAD BILATERAL SWITCH 15-V Digital or ±7.5-V Peak-to-Peak Switching 125-Ω Typical On-State Resistance for 15-V Operation Switch On-State Resistance Matched to Within 5 Ω Over 15-V Signal-Input Range On-State Resistance Flat

More information

SN54ALS05A, SN74ALS05A HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS

SN54ALS05A, SN74ALS05A HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS SN54ALS05A, SN74ALS05A HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS SDAS190A APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard

More information

SN5414, SN54LS14, SN7414, SN74LS14 HEX SCHMITT-TRIGGER INVERTERS

SN5414, SN54LS14, SN7414, SN74LS14 HEX SCHMITT-TRIGGER INVERTERS Operation From Very Slow Edges Improved Line-Receiving Characteristics High Noise Immunity SN5414, SN54LS14, SN5414, SN54LS14...J OR W PACKAGE SN7414... D, N, OR NS PACKAGE SN74LS14... D, DB, OR N PACKAGE

More information

SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS

SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SN11, SN711 DUAL DIFFERENTIAL RECEIVERS Choice of Open-Collector or Active Pullup (Totem-Pole) Outputs Single -V Supply Differential Line Operation Dual-Channel Operation TTL Compatible ± 1-V Common-Mode

More information

SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES

SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SDAS113B APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers

More information

SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Three Enable Inputs

More information

SN75ALS192 QUADRUPLE DIFFERENTIAL LINE DRIVER

SN75ALS192 QUADRUPLE DIFFERENTIAL LINE DRIVER SN7ALS9 Meets or Exceeds the Requirements of ANSI Standard EIA/TIA--B and ITU Recommendation V. Designed to Operate up to Mbaud -State TTL Compatible Single -V Supply Operation High Output Impedance in

More information

description/ordering information

description/ordering information SLLS106G DECEMBER 1975 REVISED NOVEMBER 2004 Improved Stability Over Supply Voltage and Temperature Ranges Constant-Current Outputs High Speed Standard Supply Voltages High Output Impedance High Common-Mode

More information

description logic diagram (positive logic) logic symbol

description logic diagram (positive logic) logic symbol SDAS074B APRIL 1982 REVISED JANUARY 1995 AS1004A Offer High Capacitive-Drive Capability Driver Version of ALS04B and AS04 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers

More information

SN75150 DUAL LINE DRIVER

SN75150 DUAL LINE DRIVER Meets or Exceeds the Requirement of ANSI EIA/TIA-232-E and ITU Recommendation V.28 Withstands Sustained Output Short Circuit to Any Low-Impedance Voltage Between 25 V and 25 V 2-µs Max Transition Time

More information

1OE 1Y1 1A1 1A2 1Y2 1Y3 1A3 1A4 1Y4 2OE 2Y1 2A1 2Y2 2A2 2A3 2Y3 2Y4 2A4 POST OFFICE BOX DALLAS, TEXAS 75265

1OE 1Y1 1A1 1A2 1Y2 1Y3 1A3 1A4 1Y4 2OE 2Y1 2A1 2Y2 2A2 2A3 2Y3 2Y4 2A4 POST OFFICE BOX DALLAS, TEXAS 75265 SDAS040B DECEMBER 983 REVISED JANUARY 995 Open-Collector Outputs Drive Bus Lines or Buffer Memory Address Registers Eliminate the Need for 3-State Overlap Protection pnp Inputs Reduce dc Loading Open-Collector

More information

SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS

SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SN, SN7 Choice of Open-Collector or Active Pullup (Totem-Pole) Outputs Single -V Supply Differential Line Operation Dual-Channel Operation TTL Compatible ± -V Common-Mode Input Voltage Range Optional-Use

More information

SN75158 DUAL DIFFERENTIAL LINE DRIVER

SN75158 DUAL DIFFERENTIAL LINE DRIVER SN78 Meets or Exceeds the Requirements of ANSI EIA/TIA--B and ITU Recommendation V. Single -V Supply Balanced-Line Operation TTL Compatible High Output Impedance in Power-Off Condition High-Current Active-Pullup

More information

SN54AS885, SN74AS885 8-BIT MAGNITUDE COMPARATORS

SN54AS885, SN74AS885 8-BIT MAGNITUDE COMPARATORS SNAS, SNAS -BIT MAGNITUDE COMPARATORS Latchable P-Input Ports With Power-Up Clear Choice of Logical or Arithmetic (Two s Complement) Comparison Data and Inputs Utilize pnp Input Transistors to Reduce dc

More information

CD54AC08, CD74AC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES

CD54AC08, CD74AC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES CD54AC08, CD74AC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage Speed of Bipolar F, AS, and S, With Significantly

More information

description CLR SR SER A B C D SL SER GND V CC Q A Q B Q C Q D CLK S1 S0 SR SER CLR CLK SL SER GND

description CLR SR SER A B C D SL SER GND V CC Q A Q B Q C Q D CLK S1 S0 SR SER CLR CLK SL SER GND Parallel-to-Serial, Serial-to-Parallel Conversions Left or Right Shifts Parallel Synchronous Loading Direct Overriding Clear Temporary Data-Latching Capability Package Options Include Plastic Small-Outline

More information

SN55451B, SN55452B, SN55453B, SN55454B SN75451B, SN75452B, SN75453B, SN75454B DUAL PERIPHERAL DRIVERS

SN55451B, SN55452B, SN55453B, SN55454B SN75451B, SN75452B, SN75453B, SN75454B DUAL PERIPHERAL DRIVERS PERIPHERAL DRIVERS FOR HIGH-CURRENT SWITCHING AT VERY HIGH SPEEDS Characterized for Use to 00 ma High-Voltage Outputs No Output Latch-Up at 0 V (After Conducting 00 ma) High-Speed Switching Circuit Flexibility

More information

SN75207B DUAL SENSE AMPLIFIER FOR MOS MEMORIES OR DUAL HIGH-SENSITIVITY LINE RECEIVERS

SN75207B DUAL SENSE AMPLIFIER FOR MOS MEMORIES OR DUAL HIGH-SENSITIVITY LINE RECEIVERS Plug-In Replacement for SN75107A and SN75107B With Improved Characteristics ± 10-mV Input Sensitivity TTL-Compatible Circuitry Standard Supply Voltages... ±5 V Differential Input Common-Mode Voltage Range

More information

SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR

SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR ALS174 and AS174 Contain Six Flip-Flops With Single-Rail Outputs ALS175 and AS175B Contain Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct-Clear Inputs SN54ALS174, SN54ALS175, SN54AS174,

More information

description logic symbol

description logic symbol SDAS187A APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs description These

More information

CD74HC4051-Q1 ANALOG MULTIPLEXER/DEMULTIPLEXER

CD74HC4051-Q1 ANALOG MULTIPLEXER/DEMULTIPLEXER CD74HC4051-Q1 ANALOG MULTIPLEXER/DEMULTIPLEXER Qualified for Automotive Applications Wide Analog Input Voltage Range of ±5 V Max Low ON Resistance 70 Ω Typical (V CC V EE = 4.5 V) 40 Ω Typical (V CC V

More information

SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS SDLS165B OCTOBER 1975 REVISED AUGUST 2002 Choice of Eight

More information

description/ordering information

description/ordering information µ SLVS060K JUNE 1976 REVISED APRIL 2005 3-Terminal Regulators Output Current Up To 500 ma No External Components High Power-Dissipation Capability Internal Short-Circuit Current Limiting Output Transistor

More information

Related Synchronous MOSFET Drivers DEVICE NAME ADDITIONAL FEATURES INPUTS TPS2830. Noninverted TPS2831. Inverted TPS2834. Noninverted TPS2835

Related Synchronous MOSFET Drivers DEVICE NAME ADDITIONAL FEATURES INPUTS TPS2830. Noninverted TPS2831. Inverted TPS2834. Noninverted TPS2835 Floating Bootstrap or Ground-Reference High-Side Driver Adaptive Dead-Time Control 50-ns Max Rise/Fall Times and 00-ns Max Propagation Delay 3.3-nF Load Ideal for High-Current Single or Multiphase Power

More information

description/ordering information

description/ordering information Qualified for Automotive Applications Operates With 3-V to 5.5-V V CC Supply Operates Up To 1 Mbit/s Low Standby Current...1 µa Typical External Capacitors...4 0.1 µf Accepts 5-V Logic Input With 3.3-V

More information

SN751177, SN DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SN751177, SN DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SN7577, SN7578 Meet or Exceed the Requirements of ANSI Standards TIA/EIA-4-B and TIA/EIA-485-A and ITU Recommendations V.0 and V. Designed for Multipoint Bus Transmission on Long Bus Lines in Noise Environments

More information

SN75C1406 TRIPLE LOW-POWER DRIVERS/RECEIVERS

SN75C1406 TRIPLE LOW-POWER DRIVERS/RECEIVERS Meet or Exceed the Requirements of TIA/EIA-232-F and ITU Recommendation V.28 Very Low Power Consumption... 5 mw Typ Wide Driver Supply Voltage Range... ±4.5 V to ±15 V Driver Output Slew Rate Limited to

More information

SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS

SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SN11, SN711 DUAL DIFFERENTIAL RECEIVERS Choice of Open-Collector or Active Pullup (Totem-Pole) Outputs Single -V Supply Differential Line Operation Dual-Channel Operation TTL Compatible ± 1-V Common-Mode

More information

LM723/LM723C Voltage Regulator

LM723/LM723C Voltage Regulator 1 LM723, LM723C LM723/LM723C Voltage Regulator Check for Samples: LM723, LM723C 1FEATURES DESCRIPTION 2 150 ma Output Current Without External Pass The LM723/LM723C is a voltage regulator designed Transistor

More information

SN54ALS804A, SN54AS804B, SN74ALS804A, SN74AS804B HEX 2-INPUT NAND DRIVERS

SN54ALS804A, SN54AS804B, SN74ALS804A, SN74AS804B HEX 2-INPUT NAND DRIVERS SN54ALS804A, SN54AS804B, SN74ALS804A, SN74AS804B HEX 2-INPUT NAND DRIVERS SDAS022C DECEMBER 1982 REVISED JANUARY 1995 High Capacitive-Drive Capability ALS804A Has Typical Delay Time of 4 ns (C L = 50 pf)

More information

TL494 PULSE-WIDTH-MODULATION CONTROL CIRCUITS

TL494 PULSE-WIDTH-MODULATION CONTROL CIRCUITS FEATURES Complete PWM Power-Control Circuitry Uncommitted Outputs for 200-mA Sink or Source Current Output Control Selects Single-Ended or Push-Pull Operation Internal Circuitry Prohibits Double Pulse

More information

SN5414, SN54LS14, SN7414, SN74LS14 HEX SCHMITT-TRIGGER INVERTERS

SN5414, SN54LS14, SN7414, SN74LS14 HEX SCHMITT-TRIGGER INVERTERS Operation From Very Slow Edges Improved Line-Receiving Characteristics High Noise Immunity SN5414, SN54LS14, SN5414, SN54LS14...J OR W PACKAGE SN7414... D, N, OR NS PACKAGE SN74LS14... D, DB, OR N PACKAGE

More information

SN54ABT241, SN74ABT241A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SN54ABT241, SN74ABT241A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 ma Per JEDEC Standard JESD-17 ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015;

More information

SN75C1406 TRIPLE LOW-POWER DRIVERS/RECEIVERS

SN75C1406 TRIPLE LOW-POWER DRIVERS/RECEIVERS Meet or Exceed the Requirements of ANSI EIA/TIA-232-E and ITU Recommendation V.28 Very Low Power Consumption 5 mw Typ Wide Driver Supply Voltage Range ±4.5 V to ±15 V Driver Output Slew Rate Limited to

More information

74ACT11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

74ACT11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 74ACT11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS031C JULY 1987 REVISED APRIL 1996 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes

More information

AVAILABLE OPTIONS PACKAGE VIOmax SMALL OUTLINE. PLASTIC DIP at 25 C (D) (P) 0 C to 70 C 5 mv LM306D LM306P

AVAILABLE OPTIONS PACKAGE VIOmax SMALL OUTLINE. PLASTIC DIP at 25 C (D) (P) 0 C to 70 C 5 mv LM306D LM306P SLCS8A OCTOBER 979 REVISED OCTOBER 99 Fast Response Times Improved Gain and Accuracy Fanout to Series 5/7 TTL Loads Strobe Capability Short-Circuit and Surge Protection Designed to Be Interchangeable With

More information

SN75150 DUAL LINE DRIVER

SN75150 DUAL LINE DRIVER Meets or Exceeds the Requirement of TIA/EIA-232-F and ITU Recommendation V.28 Withstands Sustained Output Short Circuit to Any Low-Impedance Voltage Between 25 V and 25 V 2-µs Maximum Transition Time Through

More information

ua9637ac DUAL DIFFERENTIAL LINE RECEIVER

ua9637ac DUAL DIFFERENTIAL LINE RECEIVER ua967ac Meets or Exceeds the Requirements of ANSI Standards EIA/TIA--B and EIA/TIA--B and ITU Recommendations V. and V. Operates From Single -V Power Supply Wide Common-Mode Voltage Range High Input Impedance

More information

General-Purpose FET-INPUT OPERATIONAL AMPLIFIERS

General-Purpose FET-INPUT OPERATIONAL AMPLIFIERS OPA3 OPA3 OPA23 OPA23 OPA43 OPA43 OPA43 OPA3 OPA23 OPA43 SBOS4A NOVEMBER 994 REVISED DECEMBER 22 General-Purpose FET-INPUT OPERATIONAL AMPLIFIERS FEATURES FET INPUT: I B = 5pA max LOW OFFSET VOLTAGE: 75µV

More information

Distributed by: www.jameco.com 1-8-831-4242 The content and copyrights of the attached material are the property of its owner. SLRS28A SEPTEMBER 1988 REVISED NOVEMBER 24 Quadruple Circuits Capable of Driving

More information

SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR

SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR ALS174 and AS174 Contain Six Flip-Flops With Single-Rail Outputs ALS175 and AS175B Contain Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct-Clear Inputs SN54ALS174, SN54ALS175, SN54AS174,

More information

SN54ALS193A, SN74ALS193A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS WITH DUAL CLOCK AND CLEAR

SN54ALS193A, SN74ALS193A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS WITH DUAL CLOCK AND CLEAR Look-Ahead Circuitry Enhances Cascaded Counters Fully Synchronous in Count Modes Parallel Asynchronous Load for Modulo-N Count Lengths Asynchronous Clear Package Options Include Plastic Small-Outline (D)

More information

description/ordering information

description/ordering information The SN5405 is obsolete and no longer is supplied. Package Options Include Plastic Small-Outline (D, NS), Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard

More information

CD54ACT112, CD74ACT112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

CD54ACT112, CD74ACT112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current Fanout to 15 F Devices SCR-Latchup-Resistant

More information

SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS 3-State Outputs Interface Directly With System Bus Gated Output-Control LInes for Enabling or Disabling the Outputs Fully Independent Clock Virtually Eliminates Restrictions for Operating in One of Two

More information

description/ordering information

description/ordering information Controlled Baseline One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of 40 C to 25 C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification

More information

SN75160B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER

SN75160B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER Meets IEEE Standard 488-978 (GPIB) 8-Channel Bidirectional Transceiver Power-Up/Power-Down Protection (Glitch Free) High-Speed, Low-Power Schottky Circuitry Low Power Dissipation...7 mw Max Per Channel

More information

SN65175, SN75175 QUADRUPLE DIFFERENTIAL LINE RECEIVERS

SN65175, SN75175 QUADRUPLE DIFFERENTIAL LINE RECEIVERS SN6575, SN7575 QUADRUPLE DIFFERENTIAL LINE RECEIVERS Meet or Exceed the Requirements of ANSI Standard EIA/TIA-422-B, RS-423-B, and RS-485 Meet ITU Recommendations V., V., X.26, and X.27 Designed for Multipoint

More information

AVAILABLE OPTIONS PACKAGE SMALL OUTLINE (D) The D package is available taped and reeled. Add the suffix R to the device type (i.e., LT1030CDR).

AVAILABLE OPTIONS PACKAGE SMALL OUTLINE (D) The D package is available taped and reeled. Add the suffix R to the device type (i.e., LT1030CDR). LT1030C QUADRUPLE LOW-POWER LINE DRIVER Low Supply Voltage... ±5 V to ±15 V Supply Current...500 µa Typical Zero Supply Current When Shut Down Outputs Can Be Driven ±30 V Output Open When Off (3-State)

More information

CD74HC4017-Q1 HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS

CD74HC4017-Q1 HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS Qualified for Automotive Applications Fully Static Operation Buffered Inputs Common Reset Positive Edge Clocking Typical f MAX = 60 MHz at = 5 V, = 5 pf, T A = 25 C Fanout (Over Temperature Range) Standard

More information

CY74FCT2373T 8-BIT LATCH WITH 3-STATE OUTPUTS

CY74FCT2373T 8-BIT LATCH WITH 3-STATE OUTPUTS Function and Pinout Compatible With the Fastest Bipolar Logic 25-Ω Output Series Resistors Reduce Transmission-Line Reflection Noise Reduced V OH (Typically = 3.3 V) Version of Equivalent FCT Functions

More information

SN74CBT3861DWR 10-BIT FET BUS SWITCH. description. logic diagram (positive logic)

SN74CBT3861DWR 10-BIT FET BUS SWITCH. description. logic diagram (positive logic) SN74CBT3861 10-BIT FET BUS SWITCH SCDS061D APRIL 1998 REVISED OCTOBER 2000 5-Ω Switch Connection Between Two Ports TTL-Compatible Input Levels Latch-Up Performance Exceeds 250 ma Per JESD 17 description

More information

HIGH-VOLTAGE HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

HIGH-VOLTAGE HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS SLRS3D DECEMBER 976 REVISED NOVEMBER 4 HIGH-VOLTAGE HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS 5-mA Rated Collector Current (Single Output) High-Voltage Outputs... V Output Clamp Diodes Inputs Compatible

More information

AM26C31-EP QUADRUPLE DIFFERENTIAL LINE DRIVER

AM26C31-EP QUADRUPLE DIFFERENTIAL LINE DRIVER 1 1FEATURES Controlled Baseline One Assembly One Test Site One Fabrication Site Extended Temperature Performance of 55 C to 125 C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change

More information

description/ordering information

description/ordering information SCAS528D AUGUST 1995 REVISED OCTOBER 2003 2-V to 6-V V CC Operation Inputs Accept Voltages to 6 V Max t pd of 7.5 ns at 5 V SN54AC32...J OR W PACKAGE SN74AC32... D, DB, N, NS, OR PW PACKAGE (TOP VIEW)

More information

description/ordering information

description/ordering information 2-V to 6-V V CC Operation Inputs Accept Voltages to 6 V Max t pd of 9 ns at 5 V SN54AC86... J OR W PACKAGE SN74AC86... D, DB, N, NS, OR PW PACKAGE (TOP VIEW) 1A 1B 1Y 2A 2B 2Y GND 1 2 3 4 5 6 7 14 13 12

More information

Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. 500-mA Rated Collector Current (Single Output) High-Voltage Outputs...50

More information

SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS

SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS Meets or Exceeds the Requirements of ANSI EIA/TIA-232-E and ITU Recommendation V.28 Single Chip With Easy Interface Between UART and Serial Port Connector Less Than 9-mW Power Consumption Wide Driver Supply

More information

CD54AC04, CD74AC04 HEX INVERTERS

CD54AC04, CD74AC04 HEX INVERTERS CD54AC04, CD74AC04 HEX INVERTERS AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption

More information

ORDERING INFORMATION. TOP-SIDE MARKING PDIP N Tube SN74S1051N SN74S1051N

ORDERING INFORMATION. TOP-SIDE MARKING PDIP N Tube SN74S1051N SN74S1051N Designed to Reduce Reflection Noise Repetitive Peak Forward Current to 200 ma 12-Bit Array Structure Suited for Bus-Oriented Systems description/ordering information This Schottky barrier diode bus-termination

More information

LF411 JFET-INPUT OPERATIONAL AMPLIFIER

LF411 JFET-INPUT OPERATIONAL AMPLIFIER LF411 JFET-INPUT OPERATIONAL AMPLIFIER Low Input Bias Current, 50 pa Typ Low Input Noise Current, 0.01 pa/ Hz Typ Low Supply Current, 2 ma Typ High Input impedance, 10 12 Ω Typ Low Total Harmonic Distortion

More information

MC3486 QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 3-STATE OUTPUTS

MC3486 QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 3-STATE OUTPUTS Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-422-B and EIA/TIA-423-B and ITU Recommendations V.10 and V.11 3-State, TTL-Compatible s Fast Transition Times Operates From Single 5-V Supply

More information

description 1PRE 1Q 1Q GND 2Q 2Q 2PRE 1CLK 1D 1CLR V CC 2CLR 2D 2CLK D, N, OR PW PACKAGE (TOP VIEW) FUNCTION TABLE

description 1PRE 1Q 1Q GND 2Q 2Q 2PRE 1CLK 1D 1CLR V CC 2CLR 2D 2CLK D, N, OR PW PACKAGE (TOP VIEW) FUNCTION TABLE SCAS499A DECEMBER 1986 REVISED APRIL 1996 Center-Pin V CC and GND Configuratio Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity

More information

SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS D-Type Flip-Flops in a Single Package With 3-State Bus Driving True Outputs Full Parallel Access for Loading Buffered Control Inputs Package Options Include Plastic Small-Outline (DW) Packages, Ceramic

More information

74ACT11244 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

74ACT11244 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin V CC and GND Configurations to Minimize High-Speed

More information

SN54HCT540, SN74HCT540 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

SN54HCT540, SN74HCT540 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS Operating Voltage Range of 4.5 V to 5.5 V Low Power Consumption, 80-µA Max I CC Typical t pd = 12 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µa Max Inputs Are TTL-Voltage Compatible High-Current

More information

SN54HCT14, SN74HCT14 HEX SCHMITT-TRIGGER INVERTERS

SN54HCT14, SN74HCT14 HEX SCHMITT-TRIGGER INVERTERS SN54HCT14, SN74HCT14 HEX SCHMITT-TRIGGER INVERTERS SCLS225E JULY 1995 REVISED JULY 2003 Operating Voltage Range of 4.5 V to 5.5 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 20-µA Max

More information

SN54ACT16244, 74ACT BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

SN54ACT16244, 74ACT BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS Members of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed

More information