Roland Kammerer. 13. October 2010

Transcription

1 Peripherals Roland Institute of Computer Engineering Vienna University of Technology 13. October 2010

2 Overview 1. Analog/Digital Converter (ADC) 2. Pulse Width Modulation (PWM) 3. Serial Peripheral Interface (SPI) 4. Liquid Crystal Display (LCD) 5. Universal Asynchronous Receiver and Transmitter (UART)

3 ADC ATmega128 Ref Voltage Quality Part I Analog/Digital Converter (ADC)

4 (1) ADC ATmega128 Ref Voltage Quality ADC converts a continuous quantity (e.g., analog voltage) to a discrete digital number. Realization: stepwise counting single slope dual-/multi slope successive approximation... f(t) t

5 (2) ADC ATmega128 Ref Voltage Quality Input voltage is compared to a reference voltage needed for mapping the input voltage to digital value between 0V and V ref the digital value is (linearly) interpolated every input voltage higher or equal to the reference voltage results in the maximum value V ref 2 dac_bits 0V 0

6 ATmega128 converter features ADC ATmega128 Ref Voltage Quality Successive approximation ADC 10-bit resolution (max 0x3FF = 1024 values) 8 channels ADC clock frequency kHz for maximal resolution Selectable gain amplification Differential conversion possible

7 Reference Voltage ADC ATmega128 Ref Voltage Quality Reference voltage is AREF There is no capacitor connected to AREF AVCC is supply voltage for ADC logic Register ADMUX: REFS0 = REFS1 = 0 (to turn off internal V ref )

8 Modes (1) ADC ATmega128 Ref Voltage Quality Single Ended only a single input is taken into account values between 0 and 1023 (10-bit resolution) Differential Mode the difference between 2 signals is (amplified and) converted used to remove offsets (e.g., temperature in degree kelvin) values between -512 and 511 (10-bit resolution)

9 Modes (2) ADC ATmega128 Ref Voltage Quality Single Mode every conversion must be started by hand conversion triggered by application request Free Running Mode asynchronous repeated conversions automatic measurements makes sense with interrupts

10 Quality (1) ADC ATmega128 Ref Voltage Quality ATmega128 features a successive approximation ADC the slower, the exacter use prescaler to get full resolution fist conversion needs setup time

11 ADC ATmega128 Ref Voltage Quality Quality (2) Gain factor is used for better precision (optimal use of value range) Gain too small inaccurate values Example: Input signal 0-0.5V gain x1: LSB = 4.8mV max = 102 gain x10: LSB = 0.48mV max = 1023 Gain too big signal gets too large

12 PWM General Applications Part II Pulse Width Modulation (PWM)

13 PWM General Applications General TCNTn duty max bottom 5V OCn 0V t Pulse Width Period Controlling current supply: modulate voltage level or use highest voltage level and modulate pule width ( PWM) Value of duty manages pulse width Resulting square wave yields current supply level (duty cycle) Software PWM: counter, compare and set/clear pin realized in ISR

14 Applications PWM General Applications Light Bulb (OC1A) LCD Background illumination (OC1B) LCD Contrast (OC1C) Fan

15 SPI General Bus Lines Bus Analysis Driver Part III Serial Peripheral Interface (SPI)

16 General SPI General Bus Lines Bus Analysis Driver Synchronous serial Master/Slave protocol E.g., channel between microcontroller and peripheral Uses a 8-bit shift register to transfer data SPI-Master ATMega128 CS SDCLK SDI SDO SPI-Slave LC Display

17 Bus Lines SPI General Bus Lines Bus Analysis Driver Different Naming Conventions Serial Clock: SCLK, SCK, CLK Master Output, Slave Input: MOSI, SIMO Master Input, Slave Output: MISO, SOMI Serial Data In: SDI, DI, SI Serial Data Out: SDO, DO, SO Slave Selection: SS, CS, STE,... Configuration Clock Rate: Data transmission rate Clock Polarity (CPOL): 1 idle is high, 0 idle is low Clock Phase (CPHA): 1 sample on trailing edge, 0 sample on leading edge Data Order (DODR): 1 lsb first, 0 msb first

18 Example SPI General Bus Lines Bus Analysis Driver DODR (Data Order): lsb frist CPOL (Clock Polarity): idle is low (0) CPHA (Clock Phase): sample on trailing edge

19 SPI General Bus Lines Bus Analysis Driver Polling vs. Interrupt Polling (easier, start with this version): write_chars_on_spi(char c[]) { int i = 0; while (not_last_char(c[i])) { while (spi_is_busy()); /* wait */ spi_transmit_register = c[i++]; } } Interrupt (improve to this, better performance): static int i; ISR (spi_transmit_complete_ir) { if (not_last_char(c[i])) spi_transmit_register = c[i++]; } write_chars_on_spi(char c[]) { i = 0; spi_transmit_register = c[i++]; }

20 LCD Facts Protocol Timing Initialization Programming Features Part IV Liquid Crystal Display (LCD)

21 LC Display Facts LCD Facts Protocol Timing Initialization Programming Features LCD has 20x4 characters Adjustable background illumination Adjustable contrast Integrated display controller (KS0073) SPI Interface LCD PC LC Display Monitor KS 0073 chip Video card PWM input Monitor panel SPI Interface AGP interface

22 Getting started LCD Facts Protocol Timing Initialization Programming Features 1. Background Illumination Binary on/off - only for testing HW-PWM 2. Contrast HW-PWM (not obvious from schematic) Duty cycle should be about 25-30% 3. Activate LC Display Controller send Display On Command Both PWM signals can be generated by one timer in HW. Clever choice of IC/OC values can make everything very easy.

23 Serial mode protocol LCD Facts Protocol Timing Initialization Programming Features LCD protocol is layered on top of the SPI protocol, one command consists of 3 bytes, one starting byte and two instruction bytes. Minimal initialization: start instruction 1F 0F 00 gives a flushing cursor

24 Timing of Serial Data Transfer LCD Facts Protocol Timing Initialization Programming Features Data is transfered via SPI interface:

25 Initializing LCD LCD Facts Protocol Timing Initialization Programming Features Display controller chip requires initialization Display controller does a power up init (about 20ms) at least: Function Set (for setting SW-flag RE) Extended Function Set (4-line Display) Function Set (for clearing SW-flag RE) Display On (enable) Clear Display (high recommended) 1.53ms

26 Where to start? LCD Facts Protocol Timing Initialization Programming Features 1. Set up background light and contrast via PWM 2. Initialize the SPI controller 3. Try to hardcode the minimal initialization 4. Only proceed after the minimal initialization works 5. Successive extension to complete driver

27 LCD Features LCD Facts Protocol Timing Initialization Programming Features large set of characters most chars can be accessed through ASCII value. e.g., a use data structure for easy handling of self defined chars.

28 UART General On-Board Bus Repeater Part V Universal Asynchronous Receiver and Transmitter (UART)

29 General UART General On-Board Bus Repeater 1-wire bus system Low level is dominant bus state. High is recessive bus state Collision if 2 (or more) nodes send at same instant No explicit clock Nodes must agree a priori on baud rate number of data bits number of stop bits even/odd parity e.g., 8N1 8 data bits, no parity, 1 stop bit

30 On-Board Bus System UART General On-Board Bus Repeater

31 Repeater UART General On-Board Bus Repeater