QUESTION BANK SUBJECT: ELECTRONIC DEVICES AND CIRCUITS

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1 QUESTION BANK SUBJECT: ELECTRONIC DEVICES AND CIRCUITS UNIT-I PN JUNCTION DIODE 1. Derive an expression for total diode current starting from Boltzmann relationship in terms of the applied voltage. Nov 10 SET 1 2. (a)explain the operation of silicon p n junction diode and obtain the forward bias and reverse bias Volt Ampere characteristics. Nov 10 SET 2 3. Difference between i)static and dynamic resistances of a p n diode. ii)transition and Diffusion capacitances of a p n diode. iii)volt Ampere characteristics of a single silicon p n diode and two indetical silicon p- n diodes connected in parallel. iv)avalanche and zener break down mechanisms. Nov 10 SET 3 4. a)define the following terms for a PN diode i)dynamic resistance ii)load line iii)diffusion capacitance iv)reverse saturation current Nov 10 SET 4 5. a)explain the V-I characteristics of Zener diode and distinguish between Avalanche and Zener Break downs. May 11 Set 1 6. a)explain the effect of temperature on V-I characteristics of a diode. b) Distinguish between drift and diffusion current in a semiconductor. State continuity equation. [7+8] May 11 Set 2 7. a)what is potential energy barrier of the p-n junction? How does it arise and what is its order of magnitude? b)sketch the V-I characteristics of p-n junction diode for forward bias voltages. Distinguish between the incremental resistance and the apparent resistance of the diode. May 11 Set 3 8. a) Explain in detail, the reason for exponential rise in forward characteristic of a diode with suitable mathematical expression. b) Explain in detail, the variation of following semiconductor parameters with temperature, i) Energy gap ii) Conductivity. May 11 Set 4 9. a) How does the reverse saturation current of diode varies with temperature.explain. b) Draw the energy band diagram of p-n diode for no bias, forward bias and reverse bias. June 10 Set 1,2,3,4 10. a) Explain the operation of an open circuited p-n junction diode. b) Draw the V-I characteristics of a tunnel diode and explain its operation. June 10 Set1 11. (a) Explain the volt ampere characteristics of PN diode. (b) Explain the temperature dependence of VI characteristics. [8+8] Jan 10 Set a) What is Fermi level? By indicating the position of Fermi level in intrinsic, n-type and p- type semiconductor, explain its significance in semiconductors? b) Sketch V-I characteristics of a PN diode for the following conditions: i) R f = 0, Vγ = 0, R r = ii) R f = 0, Vγ= 0.6V, R r = iii) R f = Non-zero, fixed value, Vγ = 0, R r = iv) R f = Non-zero, fixed value, Vγ = 0. 6V, R r = Where Vγ is the cut-in voltage, R f is the forward dynamic resistance & R r is the reverse dynamic resistance of the diode. Dec 11 Set1 13. a) What do you understand about the depletion region at a PN junction, with the help of necessary diagrams and derive expression for barrier potential. b) Derive the expression for transition capacitance, C T of a PN diode. Dec11 set2 14. a) With the help of necessary sketches explain the potential distribution in an open circuited PN junction. b) With the help of V-I Characteristics, explain the operation of a PN Diode under Forward bias and Reverse bias Dec 11 Set3

2 15. a) Explain Avalanche and Zener break down mechanisms in semiconductors and compare them? b) For the Zener diode circuit shown in Figure.1, determine V L, V R, I Z & R. Dec 11 Set4 1.The reverse saturation current of a silicon p n function diode at an operating temperature of 27 0 C is 50 na. Compute the dynamic forward and reverse resistances of the diode for applied voltages of 0.8 V and -0.4 V respectively. Nov 10 SET 1 2.Obtain the transition capacitance CT of a junction diode at a reverse bias voltage of 12V if CT of the diode is given as 15 PF at a reverse bias of 8 V. Differentiate between transition and diffusion capacitances. Nov 10 SET 2 3.A reverse bias voltage of 90V is applied to a Germanium diode through a resistance R. The reverse saturation current of the diode is 50 µa at an operating temperature of 25 0 C. Compute the diode current and voltage for i)r = 10 MΩ ii)r = 100 KΩ Nov 10 SET 4 4.In a Zener diode regulator, the supply voltage = 300V, Vz = 220V, Iz = 15mA and load current = 25mA. Calculate the value of resistor required to be connected in series with the Zener diode. May 11 Set 1 UNIT II: RECTIFIERS AND FILTERS 1.Define the following terms of a rectifier and filter: i)ripple Factor ii)regulation iii)rectification Efficiency iv)formfactor Nov 10 SET 1 2.Derive expressions for ripple factor of a Full Wave Rectifier with and without a capacitive filter. Nov 10 SET 2 3.a)Define Ripple factor and form factor. Establish a relation between them. b)explain the necessity of a bleeder resistor in an L section filter used with a Full Wave filter. Nov 10 SET 3 4.a)List out the merits and demerits of Bridge type Full Wave rectifiers over centre tapped type Full Wave rectifiers. Nov 10 SET 4 b)what is bleeder resistance in L section filters? 5.a) Explain the working of Bridge rectifier with necessary sketches and parameters. b) Explain the relative merits and demerits of all the rectifiers. May 11 Set 4 6. With suitable diagrams, explain the working of centre-tapped full wave rectifier. Derive expressions for V DC, I DC, Vrms and Irms for it. May 11 Set 3 7.a) Draw the circuit of a half-wave-rectifier and find out the ripple factor, % regulation, efficiency and PIV. b) Compare the performance of Inductor filter and capacitor filter. May 11 Set 2 8.a)Derive the expression for the ripple factor of π -Section filter when used with a Half-waverectifier. Make necessary approximations. b)draw the circuit of bridge rectifier and explain its operation with the help of input and output waveforms. May 11 Set 1

3 9.a) Explain the action of a full wave rectifier with centre tapped transformer and sketch the wave forms of input and output voltages. b) Derive the expression for ripple factor in a full wave rectifier with resistive load. June 10 Set 1,2,3,4 10.a) Derive the expression for ripple factor of a full wave rectifier with capacitive filter. June 10 Set 1,2,3,4 b) Design a full wave rectifier circuit with an L-section filter to give a critical current of 5 ma and a ripple voltage of 1.2 V for a dc output voltage of 50 V. June 10 Set 1,2,3,4 11. Draw the circuit diagram of HWR. Explain its working. What is the frequency of ripple in its output Jan 10 Set Derive all the necessary parameters of centre tapped FWR. Jan 10 Set Explain the working function of Full wave Rectifier with necessary diagram. Jan 10 Set Draw the block diagram of a regulated power supply and explain its operation. Dec 11 set1 15. With neat sketches explain the operation of a FWR with L- section filter & derive the expression for its ripple factor. Also explain the necessity of a bleeder resistor in a practical L- section filter. Dec11set2 16. With neat sketches explain the operation of a FWR with shunt capacitor filter & Derive the expression for its ripple factor. Dec 11 set With reference to the Rectifiers, Explain the following terms: i) Ripple Factor ii) Efficiency iii) Peak Inverse Voltage (PIV) iv) % Regulation Dec11 set4 1. What is the ripple factor if a power supply of 220 V, 50 Hz is to be Full Wave rectified and filtered with a 220µF capacitor before delivering to a resistive load of 120Ω? Compute the value of the capacitor for the ripple factor to be less than 15%. Nov 10 SET 1 2. Compute the average and RMS load currents, TUF of an unfiltered centre tapped Full Wave Rectifier specified below.input voltage to transformer 220V/50 Hz.Step down ratio of centre tapped transformer = 4:1(Primary to each section secondary).sum of transformer secondary winding in each secondary segment and diode forward resistance = 100Ω.Load resistance, RL =220Ω. Nov 10 SET 2 3.Compute ripple factor of an L section choke input filter used at the output of a Full wave rectifier.inductor and capacitor values of the filter are given as 10 H and 8.2 µf respectively. Nov 10 SET 3 4. The secondary voltages of a centre tapped transformer are given as 60V-0V-60V the total resistance of secondary coil and forward diode resistance of each section of transformer secondary is 62 Ω. Compute the following for a load resistance of 1 KΩ. i)average load current ii)percentage load regulation iii) Rectification efficiency iv)ripple factor for 240 V/50Hz supply to primary of transformer. Nov 10 SET 4 5. Determine the value of ripple factor operating at 50 Hz with 100 μf capacitor filter and 100 Ω load. June 10 Set 1,2,3,4 6. Design a full wave rectifier circuit with an L-section filter to give a critical current of 5 ma and a ripple voltage of 1.2 V for a dc output voltage of 50 V. June 10 Set 1,2,3,4 7. A voltage of 200 cos wt is applied to HWR with load resistance of 5 K. Find the maximum d.c current component, r.m.s. current, ripple ractor, TUF and rectifier efficiency. [16] Jan 10 Set 3 8. A HWR circuit supplies 100mA d.c to a 250 load. Find the d.c output voltage, PIV rating of a diode and the r.m.s. voltage for the transformer supplying the rectifier. [8+8] Jan 10 Set 2

4 9. A full wave bridge rectifier having load resistance of 100Ω is fed with 220V, 50Hz through a stepdown transformer of turns ratio 11:1. Assuming the diodes ideal, find i) DC output voltage ii) Peak inverse voltage iii) Rectifier efficiency. Dec11 Set1 10. Determine the ripple factor of an L-section filter comprising a 10H choke and 8μF capacitor, used with a FWR. The DC voltage at the load is 50V. Assume the line frequency as 50Hz. Dec11 Set2 11. A bridge rectifier uses four identical diodes having forward resistance of 5Ω each. Transformer secondary resistance is 5 ohms and the secondary voltage is 30V (rms). Determine the dc output voltage for I dc = 200 ma and value of the output ripple voltage. Dec11 Set3 12. A 230 V, 60Hz voltage is applied to the primary of a 5:1 step down, center tapped transformer used in a full wave rectifier having a load of 900Ω. If the diode resistance and the secondary coil resistance together have a resistance of 100 Ω, determine i) DC voltage across the load. ii) DC current flowing through the load. iii) DC power delivered to the load. iv) PIV across each diode. Dec 11 Set 4 UNIT III : BIPOLAR JUNCTION TRANSISTOR 1. With the help of block diagrams, explain the structure of NPN and PNP transistors. How the two PN junctions in a BJT must be biased for proper transistor operation. (Jun 2009) 2. a)with the help of input & output characteristics, explain the operation of a BJT in Common Emitter Configuration. Nov 10 SET 1 3. Compare the characteristics of a BJT in CB, CE and CC configurations. Nov 10 SET 2,3 4. a)describe the functioning of a BJT in common base configuration. Nov 10 SET 4 b)determine the collector current of a BJT with both of its junctions reverse biased. Assume ICO = 5µA, IEO = 3.58 µa, αn = 0.98 and any other parameter values as required. c)how do you identify the region of operation of a BJT to be saturation region from the values of various circuit currents? Nov 10 SET 4 5. a) Explain different current components in a transistor. b) Write short notes on Early effect. c) Draw input and output characteristics of a transistor in common emitter configurations. May 11 Set 1 6.a) Draw the circuit diagram of a transistor in CB configuration and explain the output characteristics with the help of different regions. May 11 Set 2 7.a) Explain the constructional details of Bipolar Junction Transistor. b) Explain Current Amplification in CE configuration. May 11 Set 3 8.Draw the energy variation curve in the conduction band for an open circuited n-p-n transistor. How is the curve modified when the transistor is operating in active region? May 11 Set 4 9.a) Explain the operation of NPN and PNP transistors. b) Explain the early effect and its consequences. c) Derive the relation between α and β. [6+4+6] June 10 Set 1,2,3,4 10. With necessary diagram explain the input & output characteristics of common emitter configuration. [16] Jan 10 Set 2

5 11. a) With a neat diagram explain the various current components in an NPN bipolar junction transistor & hence derive general equation for collector current, I C? b) What is Early-effect; explain why it is called as base-width modulation? Discuss its consequences in transistors in detail? Dec 11 Set1 12. Draw the circuit diagram of NPN transistor in Common Emitter(CE) configuration. With neat sketches and necessary equations, describe its static input-output characteristics and clearly indicate the cut-off, saturation & active regions on the output characteristics? Dec11 Set2 13. a) Draw the circuit diagram of NPN transistor in Common Base (CB) configuration. With neat sketches and necessary equations, describe its static input- output characteristics and clearly indicate the cut-off, saturation & active regions on the output characteristics? b) With reference to a BJT, define the following terms and explain: i) Emitter efficiency. ii) Base transportation factor. iii) Large signal current gain. Dec11 Set3 14. a) Draw the circuit diagram of NPN transistor in Common Collector (CC) configuration. With neat sketches and necessary equations, describe its static input- output characteristics and clearly indicate the cut-off, saturation & active regions on the output characteristics? b) Derive the relationship among α, β and γ in transistors? Dec11 Set4 1.For an NPN transistor with αn = 0.98, JCO = 2µA and IEO = 1.6µA connected in Common Emitter Configuration, calculate the minimum base current for which the transistor enters into saturation region. VCC and load resistance are given as 12 V and 4.0 KΩ respectively. Nov 10 SET 1 2.A Silicon BJT is connected in common Emitter configuration with collector to Base bias. Calculate the base resistance Rb for the quiescent collector to Emitter voltage, VCE has to be 4 V. VCC and RC are given as 12 V and 1 KΩ respectively. Assume β = 100, VBE to be zero volts. Also find the stability factor of the circuit. Nov 10 SET 2,3 3. In a germanium transistor collector current is 51mA, when current is 0.4mA. If hfe = βdc = 125, Calculate cut off current, ICEO. May 11 Set 2 4. A silicon n-p-n transistor with α= and I CO =15 na, operates in the CE configuration. What is the collector current for a base current of 20 µa? May 11 Set 4 5. Calculate the values of I C and I E for a transistor with α dc = 0.99 and I CBO = 5μA, if I B is measured as 20 μa. Dec11 Set2 UNIT-IV: TRANSISTOR BIASING AND STABILISATION 1. a) Explain how self biasing can be done in a BJT with relevant sketches and waveforms. b)design a self bias circuit for the following specifications: VCC = 12 V; VCE = 2V; IC = 4mA; hfe = 80. Assume any other design parameters required. Draw the designed circuit. Nov 10 Set 1, June 10 Set 1,2,3,4 2. Explain how biasing is provided to a transistor through potential divider bias. List the assumptions made. List the need of bias compensation methods. Nov 10 SET 2 3. a)justify statement Potential divider bias is the most commonly used biasing method for BJT circuits. Explain how bias compensation can be done in such biasing through diodes. Nov10 SET 3

6 4. a)describe the significance of operating point, DC and AC load lines to ensure active region operation of a BJT in CE amplifier application. b)calculate the Q point for the DC biased circuit shown below. Nov 10 SET 4 5. a) What do you mean by the quiescent point of transistor amplifier? b) What is a load line? Explain its significance. May 11 Set 4 6. a) Explain Voltage Divider biasing of a transistor. b) Define the stability factors with respect to the changes in ICO, VBE and β. Why is the stability with respect to changes in VCE not considered? May 11 Set 3 7.a) What are the compensation techniques used for VBE and ICO. Explain with help of suitable circuits. b) Draw a fixed bias circuit and explain its operation. May 11 Set 2 8. a) Why a transistor needs biasing? Explain. b) Draw the self bias circuit and obtain the expression for the stability factor. Discuss the advantages and disadvantages of self biasing. May 11 Set 1 9. Derive an equation for stability factor in collector to base bias circuits. June 10 R Explain the various compensation techniques. [16] Jan 10 Set (a) Explain the criteria for fixing operating point. (b) List out the different types of biasing methods. [12+4] Jan 10 Set (a) Write short notes on thermal run away. (b) Give the importance of Heat sink. [10+6] Jan 10 Set What is Thermal Runaway in transistors? Derive the condition to prevent Thermal Runaway in Bipolar Junction Transistors. Dec11 Set1 14. What do you mean by biasing a transistor? Explain the need of biasing a transistor for the construction of a faithful amplifier? Dec 11 Set2 15. Obtain the condition for thermal stability of a BJT used in a biasing circuit? Dec11 Set3 16. What do you mean by biasing a transistor? Explain the need of biasing a transistor for the construction of a faithful amplifier? Dec11 Set4 1. An NPN transistor with β = 50 is used in common Emitter configuration with VCC = 10V and RC = 2.2 KΩ. Biasing is done through a 100 KΩ resistance from collector to Base. Assuming VBE to be zero volts, Find i)the quiescent point ii)the stability Factor, S. Nov 10 SET 2 2. An NPN transistor with β = 100 is used in common Emitter configuration with Collector to Base bias. If VCC = 10 V, RC = 1 K and VBE=0V, determine i)rb such that quiescent Collector to Emitter Voltage is 4V. ii)the stability factor, S. Nov 10 SET 3 3.Find the Q-point of self-bias transistor circuit with the following specifications: VCC = 22.5V, RL = 5.6k., RC = 1k., RI = 90k., R2 = 10k., VBE = 0.7V and β = 55. Assume IB >> ICO. May 11 Set 4 4. An NPN transistor with β = 50 is used in a common emitter circuit with VCC= 10V,RC = 2k. The bias is obtained by connecting a 100K resistance from collector to base.assumevbe = 0.7 V. Find (i). the quiescent point and (ii). the stability factor, S. (Jun 2009)

7 5. A transistor with 100β= is used in CE configuration with collector to base bias. The collector resistance is 1 KΩ and the collector supply is 10 volts. Assume V BE = 0. i) Choose R b so that the quiescent V CE = 4V ii) Find the stability factor. June A silicon NPN transistor has Ico = 20nA and β=150, V be = 0.7V. It is operated in Common Emitter configuration (as shown in Figure.1) having Vbb = 4.5V,R b = 150K,R c = 3K, V cc = 12V. Find the emitter, base and collector currents and also verify in which region does the transistor operate. What will happen if the value of the collector resistance is increased to very high values? Dec11 Set1 7. Design a collector to base bias circuit using silicon transistor to achieve a stability factor of 20, with the following specifications: V CC = 16V, V BE = 0.7V, V CEQ = 8V, I CQ = 4 ma & β= 50. Dec11 Set2 8. Design a self bias circuit using silicon transistor to achieve a stability factor of 10, with the following specifications: V CC = 16V, V BE = 0.7V, V CEQ = 8V, I CQ = 4 ma& β= 50. Dec11Set3 9. Design an Emitter bias circuit using silicon transistor to achieve a stability factor of 20, with the following specifications: V CC = 16V, V BE = 0.7V, V CEQ = 8V, I CQ = 4 ma & β= 50. Dec11Set4 UNIT V : FIELD EFFECT TRANSISTOR 1. a)differentiate between enhancement and depletion modes of a MOSFET with the help of its characteristics and construction. b)determine the pinch off voltage for an N channel silicon. JFET if the thickness of it gate region is given as cm and the donor density in n-type region is /cm 3. c)establish a relation between the three JFET parameters, µ, rd and gm. Nov 10 SET 4 2. a)explain how a FET can be made to act as a switch. Nov 10 SET 3 b)show that the transconductance, g m and drain current, I DS of a FET are related 2 through g m = I DSS IDS V P Define other terms of the equation. c)list any four merits of MOSFET to show that they are more suitable than JFETS in Integrated circuits. 3. a)detail the construction of an n-channel MOSFET of depletion type. Draw and explain its characteristics. Nov 10 SET 1 4. a) Explain the significance of threshold voltage of a MOSFET. Discuss the methods to reduce threshold voltage, V T. Nov 10 SET 2 5.a) Bring out neat comparison between JFET and MOSFET.

8 b) List the advantages and disadvantages of FET over MOSFET. May 11 Set 4 6.a) The field effect transistor is called a voltage-sensitive electronic control device. Explain why is the case? b) Name and define the circuit parameters of the JFET. How are they related to each other? May 11 Set 3 7. a) Explain the working of MOSFET in i) Enhancement mode ii) Depletion mode. Draw the necessary diagrams and graphs. b) Explain the operation of FET with its characteristics and explain the different regions in transfer characteristics. May 11 Set 2 8. a) Sketch the drain characteristics of MOSFET for different values of VGS & mark different regions of operation. b) Give the construction details of JFET and explain its operation. May 11 Set 1 9. a) From the static characteristic how to obtain quiescent voltage and current using load line for JFET. b) Explain how FET can be used as a switch. [8+8] June 10 Set 1,2,3,4 10. With a neat sketch explain the drain source characteristics & transfer characteristics of enhancement type MOSFET. [16] Jan 10 Set a) Explain the construction & operation of a P-channel MOSFET in enhancement and depletion modes with the help of static drain characteristics and transfer characteristics? b) A depletion mode MOSFET can also be operated in enhancement mode but an enhancement mode MOSFET cannot be operated in depletion mode. Justify? Dec11 Set1 12. a) Explain the construction & operation of a P-channel MOSFET in enhancement and depletion modes with the help of static drain characteristics and transfer characteristics? Dec11 Set2 13. a) With the help of neat sketches and characteristic curves explain the construction & operation of a JFET and mark the regions of operation on the characteristics? b) Show that in Field Effect Transistor, the transconductance, g m = g mo [1- V GS / Vp] 14. a) Explain the construction & operation of a N-channel MOSFET in enhancement and depletion modes with the help of static drain characteristics and transfer characteristics? 1.A self biased p channel JFET has a pinch off voltage of VP = 5 V and IDSS = 12 ma. The supply voltage is 12 V.Determine the values of RD and RS so that ID = 5 ma and VDS = 6V. Nov 10 SET 1 2. A FET follows the relation relationi D = I DSS [1 V GS /V P ] 2. What are the values of I D and g m for V GS = -1.5 V if I DSS and V P are given as 8.4 ma and -3V respectively. Nov 10 SET 2 3. In an n-channel FET, the effective channel width is 3x 10-4 cm and the donor impurity concentration is electrons/cm 3. Find the pinch-off voltage? [10+5] Dec11 Set2 4. In an n-channel FET, the effective channel width is 3x 10-4 cm and the donor impurity concentration is electrons/cm 3. Find the pinch-off voltage? Dec11 Set4 FET AMPLIFIERS 1.a)Draw the symbol and equivalent circuit of a UJT. Explain the operation of UJT with the help of its V I characteristics. b)with the help of relevant schematic, explain the functioning of a common amplifier. Nov 10 SET 1

9 2. a)with a neat schematic, explain how amplification takes place in a common drain amplifier. b)describe the application of a UJT as a relaxation oscillator. Nov 10 Reg SET 2 3. a)with the help of a neat schematic, explain the functioning of a common source amplifier. b)bring out the differences between BJT and FET. Compare the three configurations of JFET amplifiers. Nov 10 SET 3 4. a)describe how a FET can be used as a voltage variable Resistance (VVR). b)with the help of circuit diagram and its equivalent circuit of a source follower, derive an expression for the voltage gain possible. Nov 10 SET 4 5. a) Write short notes on applications of FET as a voltage variable resistor. b) Explain the principle of CS amplifier with the help of circuit diagram. Derive the expressions for AV, input impedance and output impedance. May 11 Set 1 6.a) Give the construction details of UJT & explain its operation with the help of equivalent circuits. b) Compare BJT & FET. May 11 Set 2 7.a) Write the expressions for mid-frequency gain of a FET Common Source Amplifier. b) Discuss the high frequency response of CD Configuration. May 11 Set 3 8.a) What is the effect of external source resistance on the voltage gain of a common source amplifier? Explain with necessary derivations. b) How a small signal high frequency model is different from a low-frequency model? Explain it briefly. May 11 Set 4 9.a) Draw the equivalent circuit of UJT. Also draw the V-I characteristics and explain its operation. b) Draw the V-I characteristics of JFET and explain its operation. June 10 R07 Set a) Show the self-bias arrangement for a Field Effect Transistor. With necessary expressions describe the procedure of Q-point establishment and stabilization? Dec11 Set4 11.a) Draw the basic structure and equivalent circuit of UJT. Explain how the UJT can be used as a negative-resistance device with the aid of static characteristics. Dec11 Set3 12. a) Draw the basic circuit and small-signal model of Common Drain FET amplifier. Derive expressions for voltage gain and output resistance? b) Compare the merits & demerits of a Bipolar Junction Transistor (BJT) with Field effect Transistor (FET) in detail? 13. a) Explain the need of biasing a Field Effect Transistor. With necessary equations and valid reasons explain why a simple fixed bias arrangement for FETs is not used in practical applications? 1. A UJT has a firing potential of 20V. It is connected across the capacitor of a series RC circuit with R=100k and C=1000pf supplied by a source of 40V dc.calculate the time period of the saw tooth waveform generated. 2. A common source FET amplifier circuit shown in figure 6 with unbypassed RS has the following circuit parameters: Rd = 15k, Rs = 0.5k, Rg = 1M, rd = 5k, gm= 5 mho and VDD = 20 V. Calculate AV and RO.

10 (Apr 2007) 3. A Common Source FET amplifier circuit shown in Figure.2 with un-bypassed R S has the following circuit parameters: R d = 15K, R S = 0.5K, Rg = 1M, r d = 5K, g m = 5mS and V DD = 20 V. Calculate A V, A I, R i and R 0. Dec11 Set1 4. In the common source FET amplifier shown in Figure, the transconductance and drain dynamic resistance of the FET are 5mA/V and 1MΩ respectively. Estimate A V, R i & R 0? Dec11Set3

11 5. In the common source FET amplifier shown in Figure.2, the transconductance and drain dynamic resistance of the FET are 5mA/V and 1MΩ respectively. Estimate A V, R i & R 0. Dec11 Set4