II B.TECH - II SEM ECE

Transcription

1 NRI INSTITUTE OF TECHNOLOGY (Approved by AICTE, New Delhi: Affiliated to JNTUK, Kakinada) Accredited by NAAC A grade, POTHAVARAPPADU (V), (via) Nunna, Agiripalli (M), Krishna District, A.P. PIN: Ph: Website: nrigroupofcolleges.com nrigroupofcolleges@gmail.com ELECTRONIC CIRCUIT ANALYSIS LAB OBSERVATION BOOK II B.TECH - II SEM ECE DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING R16 REGULATION, ACADEMIC YEAR:

2 II Year II SEMESTER ELECTRONIC CIRCUIT ANALYSIS LAB T P C Note : The students are required to design the electronic circuit and they have to perform the simulation using Multisim/ Pspice/Equivalent Licensed simulation software tool. Further they are required to verify the result using necessary hardware in the hardware laboratory. PART A: List of Experiments :( Minimum of Ten Experiments has to be performed) 1. Determination of ft of a given transistor. 2. Voltage-Series Feedback Amplifier 3. Current-Shunt Feedback Amplifier 4. RC Phase Shift/Wien Bridge Oscillator 5. Hartley/Colpitt s Oscillator 6. Two Stage RC Coupled Amplifier 7. Darlington Pair Amplifier 8. Bootstrapped Emitter Follower 9. Class A Series-fed Power Amplifier 10. Transformer-coupled Class A Power Amplifier 11. Class B Push-Pull Power Amplifier 12. Complementary Symmetry Class B Push-Pull Power Amplifier 13. Single Tuned Voltage Amplifier 14. Double Tuned Voltage Amplifier PART B: Equipment required for Laboratory Software: i. Multisim/ Pspice/Equivalent Licensed simulation software tool ii. Computer Systems with required specifications Hardware: 1. Regulated Power supplies 2. Analog/Digital Storage Oscilloscopes 3. Analog/Digital Function Generators 4. Digital Multimeters 5. Decade Résistance Boxes/Rheostats 6. Decade Capacitance Boxes 7. Ammeters (Analog or Digital) 8. Voltmeters (Analog or Digital) 9 Active & Passive Electronic Components

3 INDEX STUDENT NAME: REG NO: BRANCH/SEC : YEAR : S.NO DATE NAME OF THE EXPERIMENT PART-A ECA SOFTWARE PAGE NO. SIGNATURE REMARKS 1 Voltage Series Feedback Amplifier 2 2 Current Shunt Feedback Amplifier 16 3 RC Phase Shift Oscillator 30 4 Colpitt s Oscillator 40 5 Two Stage RC Coupled Amplifier 48 6 Darlington Pair Amplifier 62 7 Bootstrapped Emitter Follower 72 8 Class A Series fed Power Amplifier 86 9 Class B Push-Pull Power Amplifier Complementary Symmetry Class B Push-Pull Power Amplifier PART-B ECA HARDWARE Voltage Series Feedback Amplifier 2 2 Current Shunt Feedback Amplifier 16 3 RC Phase Shift Oscillator 30 4 Colpitt s Oscillator 40 5 Two Stage RC Coupled Amplifier 48 6 Darlington Pair Amplifier 62 7 Bootstrapped Emitter Follower 72 8 Class A Series fed Power Amplifier 86 9 Class B Push-Pull Power Amplifier Complementary Symmetry Class B Push-Pull Power Amplifier No. of Experiments completed: Average marks awarded for day to day work: 102 Signature of Staff Member/Date

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5 VOLTAGE SERIES FEEDBACK AMPLIFIER: CIRCUIT DIAGRAM: VCC 12V XSC1 Ext Trig + VCC + A _ + B R1 33kΩ R4 2.2kΩ 2 C2 5 4 V1 1kΩ R9 C uF Q1 BC107BP 10uF 20mVpk 1kHz 0 R2 10kΩ R3 1kΩ 7 C3 100uF 0 C4 100uF 6 R5 1kΩ 2

6 EXPT - NO. 1 DATE: VOLTAGE SERIES FEEDBACK AMPLIFIER AIM: (i) (ii) To design &To plot the frequency response characteristics of a Voltage Series Feedback Amplifier using software and hardware To calculate gain and bandwidth parameters with and without feedback SOFTWARE, COMPONENTS AND EQUIPMENT: S.NO SOFTWARE/HARDWARE NAME OF THE ITEM RANGE QUANTITY I SOFTWARE MULTISIM SOFTWARE PC WITH WINDOWS XP II1 HARDWARE Function Generator 0-2 MHz 1 2 Transistor BC Regulated Power Supply 0-30 V 1 4 Resistors 1kΩ 10kΩ 2.2kΩ 33kΩ 5 Capacitors 100μF 10μF Oscilloscope 0-20MHz 1 7 BreadBoard Connecting Wires As Required THEORY: Feed back plays a very important role in electronic circuits and its basic parameters such as input impedance, output impedance, current or voltage gain and bandwidth may be altered considerably by the use of feed back for a given amplifier. Feedback is a method in which a portion of the output returned tothe input in order to modify the characteristics of the device. Feedbackcan applied to transistor amplifier circuits to modify their performancecharacteristics such as gain, bandwidth, input and output impedance etc., Feedback amplifiers can be classified in the following four groups depending upon theinterconnections of the basic amplifier and the input and output terminalsof feedback network. 3

7 HARDWARE CIRCUIT : HARD WARE MODEL GRAPHS: INPUT: OUTPUT: 4

8 They are (a) Voltage Series Feedback Amplifier (b) Voltage Shunt Feedback Amplifier (c) Current Series Feedback Amplifier (d) Current Shunt Feedback Amplifier This experiment deals with one such feed back amplifiers i.e., voltage series feed back amplifier. In Voltage Series Feedback Amplifier, the type of feed back used is negative feed back. Here the input to the feed back network β is in parallel with the output of the amplifier. A fraction of the output voltage through the feedback network is applied in series with the input voltage of the amplifier. The working is as follows: The voltage developed across load resistance is sampled andfedback through the feedback to input through resistance R1 and R2 (potential divider). The values of these resistors are generally high; otherwise the effective ac load resistance in the output circuit will be very much reduced. Here the sampled voltage is proportional to the output voltageand fedback in series with the input voltage.the shunt connection at the output reduces the output resistance Ro. The series connection at the input increases the input resistance. Hence the amplifier is a true voltage amplifier. The resulting amplifier isa true voltage amplifier. The circuit is designed by using multisim software and implemented using hardware circuit. There occurs a phase reversal of 180 degrees at the output. Hence the feed back becomes negative. 5

9 SOFTWARE MODEL GRAPH:WITHOUT FEEDBACK: INPUT AND OUTPUT WAVEFORMS: CALCULATIONS: Input Amplitude: Output Amplitude : Time Period: Phase Shift: SOFTWARE MODEL GRAPH: WITH FEEDBACK: INPUT AND OUTPUT WAVEFORMS: Input Amplitude: Output Amplitude : Time Period: Phase Shift: 6

10 PROCEDURE: I. Software: 1. Connect the circuit using Multisim software/hardware. 2. Apply the input voltage (Vi) of 20mV (p-p) and 1KHz frequency using AC Voltage source. 3. Simulate the circuit and observe the output waveform on the CRO of multisim 4. Observe the AC analysis and draw the magnitude and phase response curves on a semi log graph sheet. 5. Note down the lower cut off frequency (fl) and upper cut off frequency (fh) at 3dB gain using the cursors. 6. Find the bandwidth using the formula BW= fh fl 7. Connect a capacitor and a resistor from collector to emitter of the transistor in the circuit to obtain feedback from output to input. 8. Repeat the steps from 2 to Observe the values of gain and bandwidth and tabulate the readings 7

11 WITHOUT FEEDBACK: AC ANALYSIS: FREQUENCY RESPONSE Lower cutoff frequency x1: Upper cutoff frequency x2: Bandwidth dx : x2 - x1= MODEL GRAPH: WITH FEEDBACK: AC ANALYSIS: FREQUENCY RESPONSE Lower cutoff frequency x1: Upper cutoff frequency x2: Bandwidth dx : x2 - x1= 8

12 II. Hardware: 1. Connect the circuit as shown in the circuit diagram. 2. Connect CRO CH1 to the function generator and set the input (vi) of 20mV(peak-to-peak) at 1kHz frequency in function generator. 3. Measure the output voltage V0 (peak-to-peak) by changing the frequencies from 10Hz to 1MHz and tabulate the values 4. Calculate the voltage gain for each value by using the expression Av = vo / vi 5. The voltage gain in db is calculated by using the expression Av= 20log10(vo / vi ). 6. Draw the graph by taking frequency on x-axis and gain in db on y-axis on a semi-log graph sheet. 7. Connect a capacitor and a resistor from collector to emitter of the transistor in the circuit to obtain the output voltage with feedback. 8. Repeat the steps from 2 to Observe the values of gain and bandwidth and tabulate the readings PRECAUTIONS: 1. Connections at the contact nodes must be done very carefully. 2. Check the connections before assemble and simulate the circuit. 3. Readings must be noted without parallax error 9

13 HARDWARE :TABULAR FORM: WITHOUT FEEDBACK Apply input voltage Vi = 20 mv S.NO FREQUENCY (Hz) OUTPUT VOLTAGE (V) VOLTAGE GAIN = vo / vi GAIN IN db = 20log10 (vo /vi) MODEL GRAPH: 10

14 RESULT: The Voltage Series feedback amplifier is designed, Simulated and tested practically using hardware circuit and the following parameters are calculated. Parameter Gain Bandwidth SIMULATION HARDWARE SIMULATION HARDWARE Without Feedback With Feedback 11

15 HARDWARE : TABULAR FORM: WITH FEEDBACK Apply input voltage Vi = 20 mv S.NO FREQUENCY (Hz) OUTPUT VOLTAGE (V) VOLTAGE GAIN = vo / vi GAIN IN db = 20log10 (vo /vi) MODEL GRAPH: 12

16 VIVA VOCE: 1. What is an amplifier 2. What is feedback 3. How many types of feedback exist 4. What is positive feedback 5. What is negative feed back 6. Compare positive and negative feedback 13

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19 CURRENT SHUNT FEEDBACK AMPLIFIER: CIRCUIT DIAGRAM: VCC VCC 12V + A _ XSC1 + B _ Ext Trig + _ R1 33kΩ R4 2.2kΩ 2 C C1 1 Q1 10uF V1 1kΩ R9 10uF BC107BP 20mVpk 1kHz 0 R2 10kΩ R3 1kΩ 7 C3 100uF 0 C4 100uF 6 R5 1kΩ 16

20 EXPT - NO. 2 DATE: CURRENT SHUNT FEEDBACK AMPLIFIER AIM: (i) (ii) To design, simulate and plot the frequency response of a Current Shunt Feedback Amplifier using software and hardware To calculate gain and bandwidth parameters with and without feedback APPARATUS: 1. Multisim10 Software 2. Personal Computer with windows XP SOFTWARE, COMPONENTS AND EQUIPMENT: S.NO NAME OF THE ITEM RANGE QUANTITY I MULTISIM SOFTWARE, PC WITH WINDOWS XP II HARDWARE COMPONENTS 1 AC_Voltage source 20 mv(pk), 1kHz 1 2 Transistor BC107BP 1 3 VCC 12V 1 4 Resistors 1kΩ 10kΩ 2.2kΩ 33kΩ Capacitors 100μF 10μF Oscilloscope 0-20MHz 1 7 Ground THEORY: Feedback is a method in which a portion of the output returned tothe input in order to modify the characteristics of the device. Feedback can applied to transistor amplifier circuits to modify their performance characteristics such as gain, bandwidth, input and output impedance etc. 17

21 HARDWARE CIRCUIT: MODEL GRAPH: WITH FEEDBACK: INPUT: OUTPUT: CALCULATIONS: Input Amplitude: Output Amplitude: Time Period: 18

22 There are number of ways by which a signal can be derived from output and can be returned to input. Therefore feedback amplifiers can be classified in the following four groups depending upon the inter connections of the basic amplifier and the input and output terminals of feedback network, They are (a) Voltage Series Feedback Amplifier (b) Voltage Shunt Feedback Amplifier (c) Current Series Feedback Amplifier (d) Current Shunt Feedback Amplifier In the list above, voltage refers to connecting the output voltage as input to the feedback network; current refers to tapping off some output current through the feedback network. Series refers to connecting the feedback signal in series with the input signal voltage; shunt refers to connecting the feedback signal in shunt with an input current source. Series feedback connections tend to increase the input resistance, while shunt feedback connections tend to decrease the input resistance. Voltage feedback tends to decrease the output resistance while current feedback tends to increase the output resistance. Feedback signal is proportional to the output current and feedback toinput in shunt. The series connection at the output increases output resistance and shunt connection at input decreases input resistance. The amplifier works as a true current amplifier. 19

23 MODEL GRAPH:WITHOUT FEEDBACK: INPUT AND OUTPUT WAVEFORMS: CALCULATIONS: Input Amplitude: Output Amplitude : Time Period: MODEL GRAPH: WITH FEEDBACK: INPUT AND OUTPUT WAVEFORMS: CALCULATIONS: Input Amplitude: Output Amplitude : Time Period : 20

24 PROCEDURE: I. SOFTWARE: 1. Connect the circuit using Multisim software. 2. Apply the input voltage (Vi) of 20mV (p-p) and 1KHz frequency using AC Voltage source. 3. Simulate the circuit and observe the output waveform on the CRO 4. Observe the AC analysis and draw the magnitude and phase response curves on a semi log graph sheet. 5. Note down the lower cut off frequency (fl) and upper cut off frequency (fh) at 3dB gain using the cursors. 6. Find the bandwidth using the formula BW= fh fl 7. Connect a capacitor and a resistor from emitter to base of the transistor in the circuit. 8. Repeat the steps from 2 to Observe the values of gain and bandwidth and tabulate the readings 21

25 MODEL GRAPH: WITHOUT FEEDBACK: AC ANALYSIS: FREQUENCY RESPONSE Lower cutoff frequency x1: Upper cutoff frequency x2: Bandwidth dx : x2 - x1= MODEL GRAPH: WITH FEEDBACK: AC ANALYSIS: FREQUENCY RESPONSE Lower cutoff frequency x1: Upper cutoff frequency x2: Bandwidth dx : x2 - x1= 22

26 PROCEDURE: II. HARDWARE: 1. Connect the circuit as shown in the circuit diagram. 2.Connect the CRO CH1 to the signal generator and set the input (vi) of 20 mv (peak-topeak) at 1kHz frequency. 3. Measure the output voltage V0 (peak-to-peak ) Calculate the voltage gain by using the expression Av= vo / vi. 4. For plotting the frequency response the input voltage is kept constant and the frequency is varied from 10Hz to 1MHz using function generator. 5. Note down the output voltage for each frequency. 6. All the readings are tabulated and voltage gain in db is calculated by using the expression Av= 20log10(vo / vi ). 7. Draw the graph by taking frequency on x-axis and gain in db on y-axis on a semi-log graph sheet. 8. Connect a capacitor and a resistor from emitter to base of the transistor in the circuit. 9. Repeat the steps from 2 to Observe the values of gain and bandwidth and tabulate the readings 23

27 TABULAR FORM: WITHOUT FEEDBACK Apply input voltage Vi = 20 mv S.NO FREQUENCY (Hz) OUTPUT VOLTAGE (V) VOLTAGE GAIN = vo / vi GAIN IN db = 20log10 (vo /vi) MODEL GRAPH: 24

28 PRECAUTIONS: 1. Connections at the contact nodes must be done very carefully. 2. Check the connections before assemble and simulate the circuit. 3. Readings must be taken without parallax error RESULT: The Current shunt feedback amplifier is designed and Simulated tested practically using hardware circuit and the following parameters are calculated. Parameter Gain Bandwidth SIMULATION HARDWARE SIMULATION HARDWARE Without Feedback With Feedback 25

29 TABULAR FORM: WITH FEEDBACK Apply input voltage Vi = 20 mv S.NO FREQUENCY (Hz) OUTPUT VOLTAGE (V) VOLTAGE GAIN = vo / vi GAIN IN db = 20log10 (vo /vi) MODEL GRAPH: 26

30 1. What is an amplifier 2. What is feedback 3. How many types of feedback exist 4. What is positive feedback 5. What is negative feed back 6. Compare positive and negative feedback VIVA VOCE: 27

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33 RC PHASE SHIFT OSCILLATOR: CIRCUIT DIAGRAM: VCC 12V XSC1 R1 47kΩ VCC R4 5.6kΩ C2 1 + A B _ + _ Ext Trig + _ 2 Q1 10uF C1 100nF 4 C4 100nF C5 100nF 6 7 R2 4.7kΩ BC107BP 5 R3 560Ω C3 10uF R5 4.7kΩ R6 4.7kΩ R7 1kΩ 0 3 OUTPUT WAVEFORM: 30

34 EXP.NO.3 DATE: RC PHASE SHIFT OSCILLATOR AIM: To design and simulate and test using hardware an RC Phase Shift Oscillator for different frequencies. SIMULATION COMPONENTS AND EQUIPMENT: S.NO NAME OF THE ITEM RANGE QUANTITY I MULTISIM SOFTWARE PC WITH WINDOWS XP II HARDWARE 1 Cathode Ray Oscilloscope (0-30)MHz 1 2 Transistor BC107BP 1 3 Resistors 1kΩ 4.7 kω 47 kω 5.6 KΩ 560 Ω Capacitors 100 nf 10 uf VCC 12V 1 6 Ground

35 HARDWARE CIRCUIT: 32

36 THEORY: An oscillator is a circuit, which generates ac output signal without giving any input ac signal. This circuit is usually applied for audio frequencies only. The basic requirement for an oscillator is positive feedback. The operation of the RC Phase Shift Oscillator can be explained as follows. The starting voltage is provided by noise, which is produced due to random motion of electrons in resistors used in the circuit. The noise voltage contains almost all the sinusoidal frequencies. This low amplitude noise voltage gets amplified and appears at the output terminals. The amplified noise drives the feedback network which is the phase shift network. Because of this the feedback voltage is maximum at a particular frequency, which in turn represents the frequency of oscillation. Furthermore, the phase shift required for positive feedback is correct at this frequency only. Here we are using a BC107 transistor for implementing RC phase shift oscillator. BC107 is an audio frequency transistor which is made up of silicon.if we use a common emitter amplifier with a resistive collector load, there will be a 180 phase shift between the voltages at base and collector. It will also amplify the signal..feedback circuit section must produce another 180 shift to meet the Barkhausen criterion.three sections of phase shift networks are used which is constituted by resistive-capacitor combination. In that each section introduces 60 phase shift at resonant frequency.the positive feedback from output to input will lead the circuit to operate as an oscillator.phase shift oscillator is a particular type of audio frequency oscillator. The frequency of oscillation of RC Phase Shift Oscillator is given by We select R1=R2=R3* =R and C1=C2=C3=C 33

37 DESIGN EQUATIONS: (i) Calculation of Resistor R for frequency 10KHz Frequency of oscillations for RC phase shift Oscillator fr = 1 2πRC 6 Assume C=100nF Then R = 1 2πfc 6 = (ii) Calculation of Resistor R for frequency 100KHz Frequency of oscillations for RC phase shift Oscillator fr = 1 2πRC 6 Assume C=100nF Then R = 1 2πfc 6 = (iii) Calculation of Resistor R for frequency 1MHz Frequency of oscillations for RC phase shift Oscillator fr = 1 2πRC 6 Assume C=100nF OBSERVATIONS: Then R = 1 2πfc 6 = Practical frequencyf = 1 T = with R = and C = Practical frequencyf = 1 T = with R = and C = Practical frequencyf = 1 T = with R = and C = 34

38 PROCEDURE: I. SOFTWARE: 1. Connect the circuit using Multisim software. 2. Simulate the circuit and observe the output waveform on the CRO 3. Measure the Amplitude and Frequency. 4. Compare the theoretical and practical values. 5. Repeat the procedure for different frequencies (by determining the R and C Values) II. HARDWARE: 1. Connect the circuit as per circuit diagram 2. Observe the output waveform on the CRO 3. Measure the Amplitude and Frequency. 4. Compare the theoretical and practical values. 5. Repeat the procedure for different frequencies (by adjusting the R and C Values) PRECAUTIONS: 1. Connections at the contact nodes must be done very carefully. 2. Check the connections before assemble and simulate the circuit. 3. Readings should be noted without any parallax error. RESULT: RC phase shift Oscillator is designed for different frequencies. FREQUENCY OF OSCILLATIONS FOR F= 10KHz F=100KHz F=1MHz SIMULATION HARDWARE 35

39 MODEL GRAPH: OUTPUT WAVEFORM: Amplitude = TimePeriod = Frequency = 36

40 VIVA VOCE 1. What is the difference between an amplifier and an oscillator 2. What are the parts of an oscillator 3. What is loop gain 4. What is bark hausen criterion 5. What are the types of oscillators 6. What is the frequency of oscillations 37

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43 COLPITT S OSCILLATOR: CIRCUIT DIAGRAM: VCC VCC 12V R4 XSC1 R1 100kΩ 10kΩ Key=A 50% 2 C2 6 + A _ + B _ Ext Trig + _ C1 3 Q1 10uF 10uF BC107BP 5 4 R2 6.8kΩ R3 1kΩ C3 100uF C4 100nF 0 C5 100nF L1 2mH 50% Key=A OUTPUT WAVEFORM: 40

44 EXP.NO.4 DATE: COLPITT S OSCILLATOR AIM: To design and simulate a Colpitt s Oscillator for different frequencies. SIMULATION, COMPONENTS AND EQUIPMENT: S.NO NAME OF THE ITEM RANGE QUANTITY I SOFTWARE MULTISIM SOFTWARE PC WITH WINDOWS XP II HARDWARE 1 Cathode Ray Oscilloscope (0-30)MHz 1 2 Transistor BC107BP 1 3 Resistors 100kΩ 6.8kΩ 10kΩ 1 KΩ Capacitors 100 nf 10 uf 100 uf Inductor 2Mh 1 6 VCC 12V 1 7 Ground

45 HARDWARE CIRCUIT: 42

46 THEORY: An oscillator is a circuit, which generates ac output signal without giving any input ac signal. This circuit is usually applied for audio frequencies only. The basic requirement for an oscillator is positive feedback. The operation of the Colpitt s Oscillator can be explained as follows. When the collector supply voltage Vcc is switched on, collector current starts rising and charges the capacitors C1 and C2. When these capacitors are fully charged, they discharge through coil L setting up damped harmonic oscillations in the tank circuit. The oscillatory current in the tank circuit produces a.c. voltages across C1, C2. The oscillation across C2 is applied to base-emitter junction of the transistor and appears in the amplified form in the collector circuit and overcomes the losses occurring in the tank circuit. The feedback voltage (across the capacitor C2) is 180 out of phase with the output voltage (across the capacitor C1), as the centre of the two capacitors is grounded. A phase shift of 180 is produced by the feedback network and a further phase shift of 180 between the output and input voltage is produced by the CE transistor. Hence, the total phase shift is 360 or 0, which is essential for sustained oscillations, as per, the Barkhausen criterion. So we get continuous undamped oscillations. The frequency of oscillation of Colpitt s Oscillator is given by Where 43

47 DESIGN EQUATIONS: (i) Calculation of Capacitor C for frequency 10KHz Frequency of oscillations for Colpitt s Oscillator f = 1 2π LC Assume L=2mH Hence C 2 1 fl (ii) Calculation of Capacitor C for frequency 100KHz Frequency of oscillations for Colpitt s Oscillator f = 1 2π LC Assume L=2mH Where C 2 1 fl (iii) Calculation of Capacitor C for frequency 1MHz Frequency of oscillations for Colpitt s Oscillator f = 1 Assume L=2mH 2π LC Where C 2 1 fl 44

48 PROCEDURE (SOFTWARE): 1. Connect the circuit using Multisim software. 2. Simulate the circuit and observe the output waveform on the CRO 3. Measure the Amplitude and Frequency. 4. Compare the theoretical and practical values. 5. Repeat the procedure for different frequencies (by determining the L and C Values) PROCEDURE (HARDWARE): 1. Connect the circuit as per the circuit diagram. 2. Observe the output waveform on the CRO 3. Measure the Amplitude and Frequency. 4. Compare the theoretical and practical values. 5. Repeat the procedure for different frequencies (by determining the L and C Values) PRECAUTIONS: 1. Connections at the contact nodes must be done very carefully. 2. Check the connections before assemble and simulate the circuit. RESULT: Colpitt s Oscillator is designed for different frequencies. FREQUENCY OF OSCILLATIONS FOR F= 10KHz SIMULATION HARDWARE F=100KHz F=1MHz 45

49 OBSERVATIONS: Practical frequencyf = 1 T = with L = and C = Practical frequencyf = 1 T = with L = and C = Practical frequencyf = 1 T = with L = and C = 46

50 VIVA VOCE 1. What is the difference between an amplifier and an oscillator 2. What are the parts of an oscillator 3. What is loop gain 4. What is bark hausen criterion 5. What are the types of oscillators 6. What is the frequency of oscillations 47

51 CIRCUIT DIAGRAM (SOFT WARE): TWO STAGE RC COUPLED AMPLIFIER 48

52 EXP.NO.5 DATE: TWO STAGE RC COUPLED AMPLIFIER AIM: To design & simulate a two stage RC coupled Amplifier as per given specifications APPARATUS: 1. Multisim10 Software 2. Personal Computer with windows XP COMPONENTS AND INSTRUMENTS: S.NO NAME OF THE ITEM RANGE QUANTITY I SOFTWARE MULTISIM SOFTWARE PC WITH WINDOWS XP II HARDWARE 1 Transistors BC107BP 2 2 AC voltage Source 20 mv, 1KHz 1 3 Cathode Ray Oscilloscope (0-30)MHz 1 4 VCC 12V 1 5 Resistors 1KΩ 10KΩ 2.2 KΩ 100 KΩ Capacitors 10uF 47uF Ground

53 MODEL GRAPH:FIRST STAGE: INPUT AND OUTPUT WAVEFORMS: CALCULATIONS: Input Voltage Vi = Lower Cutoff Frequency fl1 = Output Voltage V01= Upper Cutoff Frequency fh1 = Voltage Gain Av1 = V01 / Vi BandWidth BW1= fh1-fl1 = 50

54 THEORY: An amplifier is the basic building block of most electronic systems. Just as one brick does not make a house, a single-stage amplifier is not sufficient to build a practical electronic system. The gain of the single stage is not sufficient for practical applications. The voltage level of a signal can be raised to the desired level if we use more than one stage. When a number of amplifier stages are used in succession (one after the other) it is called a multistage amplifier or a cascade amplifier. Much higher gains can be obtained from the multi-stage amplifiers. In a multi-stage amplifier, the output of one stage makes the input of the next stage. We must use a suitable coupling network between two stages so that a minimum loss of voltage occurs when the signal passes through this network to the next stage. Also, the dc voltage at the output of one stage should not be permitted to go to the input of the next. If it does, the biasing conditions of the next stage are disturbed. Figure shows how to couple two stages of amplifiers using RC coupling scheme. Thisis the most widely used method. In this scheme, the signal developed across the collector resistor RC (R2)of the first stage is coupled to the base of the second stage through the capacitor CC(C2). The coupling capacitor blocks the dc voltage of the first stage from reaching the base of the second stage. In this way, the dc biasing of the next stage is not interfered with. For this reason, the capacitor CC (C2)is also called a blocking capacitor. As the number of stages increases, the gain increases and the bandwidth decreases. RC coupling scheme finds applications in almost all audio small-signal amplifiers used in record players, tape recorders, public-address systems, radio receivers, television receivers, etc. Frequency response of an amplifier is defined as the variation of gain with respect to frequency. The gain of the amplifier increases as the frequency increases from zero till it becomes maximum at lower cut-off frequency and remains constant till higher cut-off frequency and then it falls again as the frequency increases. At low frequencies the reactance of coupling capacitor CC is quite high and hence very small part of signal will pass through from one stage to the next stage. At high frequencies the reactance of inter electrode capacitance is very small and behaves as a short circuit. This increases the loading effect on next stage and service to reduce the voltage gain due to these reasons the voltage gain drops at high frequencies. At mid frequencies the effect of coupling capacitors is negligible and acts like short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit becomes resistive at mid frequencies and the voltage gain remains constant during this range. 51

55 CIRCUIT DIAGRAM (HARD WARE): TWO STAGE RC COUPLED AMPLIFIER 52

56 PROCEDURE (SOFTWARE): 1. Connect the circuit using multisim software. FIRST STAGE 2. Apply the input voltage (Vi) of 20 mv (p-p) and 1 KHz frequency using AC Voltage Source. 3. Connect the CRO CH2 at the output of capacitor C2 which is connected at collector of transistor Q1, and connect CRO CH1 at input terminals of Function Generator (20mV Source.). 4. Simulate the circuit and observe the output waveform on the CRO. 5. Note down the peak-to-peak output voltage (v01) and time period of first stage waveform From the CRO. 6. Calculate the voltage gain using the expression (Av)1 = v01 / vi. 7. Calculate the voltage gain in db using the expression (Av)1 = 20log10(v01 / vi ). 8. For plotting frequency response, go to AC analysis, set vertical scale to decibel and Simulate. 9. Plot the magnitude responses. 10. Note down the lower cut off frequency (fl1) and upper cut off frequency (fh1) at 3dB gain Using the cursors. 11. Find the bandwidth using the formula(bw)1 = fh1 - fl1 SECOND-STAGE 12. Connect the CRO CH2 at the output of capacitor C4 which is connected at collector of transistor Q2, connect the CRO CH1 and Function Generator (20mV Source) at base (output of capacitor C2) of Transistor Q2. 13.Simulate the circuit and observe the waveform on CRO. 14. Calculate the voltage gain using the expression (Av)2 = v02 / vi. 15. Calculate the voltage gain in db using the expression (Av)2 = 20log10(v02 / vi ). 53

57 FIRST STAGE AC ANALYSIS: FREQUENCY RESPONSE MAGNITUDE RESPONSE: Lower cutoff frequency x1: Upper cutoff frequency x2: Bandwidth dx : x2 - x1= SECOND STAGE AC ANALYSIS: FREQUENCY RESPONSE MAGNITUDE RESPONSE: Lower cutoff frequency x1: Upper cutoff frequency x2: Bandwidth dx : x2 - x1= 54

58 16. Calculate the overall gain Av = Av1.Av2 (OR) Av (db) = Av1 (db) + Av2 (db) 17. For plotting frequency response, go to AC analysis, set vertical scale to decibel and Simulate. 17. Plot the magnitude response. 18. Note down the lower cut off frequency (fl2) and upper cut off frequency (fh2) at 3dB gain Using the cursors. 19. Find the bandwidth using the formula (BW)2 = fh2 - fl2 OVERALL STAGE 20. Connect the CRO CH2 at output of Capacitor C4, and connect the CRO CH1 at 20 mv source (Function Generator output) 21. Measure the Amplitude and Time period of Output waveform on CRO. 22. Calculate Overall Gain (Av = V0/Vi) and Overall Bandwidth (BW = f H f L ). PROCEDURE (HARDWARE): 1. Connect the circuit as per the circuit diagram. FIRST STAGE 2. Apply the input voltage (Vi) of 20 mv (p-p) and 1 KHz frequency using Function Generator. 3. Connect the CRO CH2 at the output of capacitor C2 which is connected at collector of transistor Q1, and connect CRO CH1 at output terminals of Function Generator (20mV Source.). 4. Switch on the supply and Observe the output waveform on the CRO. 5. Note down the peak-to-peak output voltage (v01) and time period of first stage waveform from the CRO. 6. Calculate the voltage gain using the expression (Av)1 = v01 / vi. 7. Calculate the voltage gain in db using the expression (Av)1 = 20log10(v01 / vi ). 8.For plotting frequency response, Apply various frequencies from Function Generator and note down the gain values in given Tabular form 55

59 MODEL GRAPH: SECOND STAGE: INPUT AND OUTPUT WAVEFORMS: CALCULATIONS: Input Voltage Vi = Lower Cutoff Frequency fl2 = Output Voltage V02= Upper Cutoff Frequency fh2 = Voltage Gain Av2= V02 / Vi Bandwidth BW2= fh2-fl2 = 56

60 9. Plot the magnitude responses. 10. Note down the lower cut off frequency (fl1) and upper cut off frequency (fh1) at 3dB gain from the plotted graph. 11. Find the bandwidth using the formula(bw)1 = fh1 - fl1 SECOND-STAGE 12. Connect the CRO CH2 at the output of capacitor C4 which is connected at collector of transistor Q2, connect the CRO CH1 and Function Generator (20mV Source) at base (output of capacitor C2) of Transistor Q2. 13.Switch on the supply and observe the waveform on CRO. 14. Calculate the voltage gain using the expression (Av)2 = v02 / vi. 15. Calculate the voltage gain in db using the expression (Av)2 = 20log10(v02 / vi ). 16. Calculate the overall gain Av = Av1.Av2 (OR) Av (db) = Av1 (db) + Av2 (db) 17. For plotting frequency response, apply various frequencies from Function Generator and note down the gain values in given Tabular form. 17. Plot the magnitude response. 18. Note down the lower cut off frequency (fl2) and upper cut off frequency (fh2) at 3dB gain 19. Find the bandwidth using the formula (BW)2 = fh2 - fl2 OVERALL STAGE 20. Connect the CRO CH2 at output of Capacitor C4, and connect the CRO CH1 at 20 mv Source (Function Generator output) 21. Measure the Amplitude and Time period of Output waveform on CRO. 22. Calculate Overall Gain (Av = V0/Vi) and Overall Bandwidth (BW = f H f L ) 23. Draw the graphs for a. Magnitude and phase responses on a semi log graph sheet. b. Input and output waveforms on a normal graph sheet. 57

61 SECOND STAGE AC ANALYSIS: FREQUENCY RESPONSE MAGNITUDE RESPONSE: Lower cutoff frequency x1: Upper cutoff frequency x2: Bandwidth dx : x2 - x1= OBSERVATIONS: Voltage Gain AV1 = Voltage Gain AV2 = Overall Gain AV1 * AV2 = Band Width = 58

62 PRECAUTIONS: RESULT: 1. Connections at the contact nodes must be done very carefully. 2. Check the connections before assemble and simulate the circuit. Gain and Bandwidth Values for various Stages STAGES GAIN BANDWIDTH GAIN BANDWIDTH PRODUCT FIRST STAGE SECOND STAGE OVERALL STAGE 59

63 60

64 VIVA VOCE 1. What is an amplifier 2. What are the amplifier types based on coupling 3. Which type of amplifier is best among coupling amplifiers? Why? 4. What is a single stage amplifier 5. What is a multistage amplifier 6. What is a cascade amplifier 61

65 DARLINGTON AMPLIFIER (SOFT WARE): CIRCUIT DIAGRAM: 62

66 EXP.NO.6 DATE: DARLINGTON PAIR AMPLIFIER AIM: To design & simulate a Darlington Pair Amplifier as per given specifications APPARATUS: COMPONENTS AND INSTRUMENTS: S.NO NAME OF THE ITEM RANGE QUANTITY I SOFTWARE MULTISIM SOFTWARE PC WITH WINDOWS XP II HARDWARE 1 Transistors BC107BP 2 2 AC voltage Source 20 mv, 1KHz 1 3 Cathode Ray Oscilloscope (0-30)MHz 1 4 VCC 12V 1 5 Resistors 33KΩ 10KΩ 2.2 KΩ 1KΩ Capacitors 10uF 2 7 Ground

67 MODEL GRAPH: INPUT AND OUTPUT WAVEFORMS: CALCULATIONS: Input Amplitude : Output Amplitude : Time Period : Phase Shift : 64

68 THEORY: The Darlington configuration was invented by Bell Laboratories engineer Sidney Darlington in He patented the idea of having two or three transistors on a single chip sharing a collector. In emitter follower, an input signal is applied to the base and the output is taken across the emitter. The emitter follower has reasonably high input impedance and may be used whenever impedance up to about 500K is needed. For higher input impedance, we may use two transistors to form Darlington pair. The output voltage is always less than the input voltage due to drop between the base and emitter. However, the voltage gain is approximately unity. In addition the output voltage is in phase with the input voltage. Hence it is said to follow the input voltage with an in phase relationship. This accounts for the terminology Emitter Follower. The collector is at ac ground; therefore the circuit is actually common collector amplifier. This circuit presents high input impedance at the input and low output impedance at the output. It is therefore frequently used for impedance matching purposes, where load impedance is matched to source impedance for maximum signal transfer. PROCEDURE (SOFT WARE): 1. Connect the circuit using Multisim software. 2. Apply the input voltage (vi) of 20mV (p-p) and 1KHz frequency using AC Voltage source. 3. Simulate the circuit and observe the output waveform on the CRO 4. Find the input impedance of Darlington pair using Multimeter. PROCEDURE (HARD WARE): 1. Connect the circuit as per circuit diagram. 2. Apply the input voltage (vi) of 20mV (p-p) and 1KHz frequency using Function Generator. 3. Switch on the supply and observe the output waveform on the CRO 4. Find the input impedance of Darlington pair using Multimeter. 65

69 DARLINGTON AMPLIFIER (HARD WARE): CIRCUIT DIAGRAM: 66

70 PROCEDURE: INPUT IMPEDANCE Zi 1. Connect the signal generator to CRO CH1 and set the input voltage to 20mVp-p, 1-2 KHz frequency 2.. Note down the peak-peak amplitude of the corresponding output VO. 3. Connect a DRB (with zero resistance) in series with the function generator. 4. Increase the resistance in DRB and observe the magnitude of the output VO Simultaneously on the CRO. 5. When the magnitude of the output VO is reduced to half of its original value, stop varying the potentiometer further and remove the DRB from the circuit. 5. Measure the value of resistance in DRB and this is measured value will be the Input impedance of the circuit. OUTPUT IMPEDANCE Z0 1. Adjust the input signal peak-peak such that the output sine wave is not clipped. 2. Note down this value of the input Vin. 3. Note down the peak-peak amplitude of the corresponding output VO. 4. Connect a DRB (with maximum resistance) in parallel with the load. 5. When the magnitude of the output VO is reduced to half of its original value, stop varying the potentiometer further and remove the DRB from the circuit. 6. Measure the value of resistance in DRB and this is measured value will be the Output impedance of the circuit. 67

71 INPUT IMPEDANCE OUTPUT IMPEDANCE 68

72 PRECAUTIONS: 1. Connections at the contact nodes must be done very carefully. 2. Check the connections before assemble and simulate the circuit. RESULT: A Darlington amplifier with given specifications is designed. VOLTAGE GAIN INPUT IMPEDANCE OUTPUT IMPEDANCE 69

73 70

74 VIVA VOCE 1. What is an amplifier 2. What are multistage amplifiers 3. What are cascade amplifiers 4. What are cascade amplifiers 5. What is a voltage gain of a common collector amplifier 6. What is the current gain of a common collector amplifer 71

75 EMITTER FOLLOWER: WITHOUT BOOTSTRAPPED CIRCUIT DIAGRAM: VCC VCC 10V XSC1 R4 330kΩ + A _ + B _ Ext Trig + _ C1 2 4 Q1 470nF BC107BP 1 Q2 5 V1 20mVpk 1kHz 0 R3 220kΩ BC107BP 6 C3 470nF 0 R5 1kΩ 72

76 EXP.NO.7 DATE: BOOTSTRAPPED EMITTER FOLLOWER AIM: (i) (ii) To design & simulate a Bootstrapped Emitter Follower. To calculate gain, input and output impedance parameters with and without bootstrapping. APPARATUS: 1. Multisim10 Software 2. Personal Computer with windows XP COMPONENTS AND INSTRUMENTS: S.NO NAME OF THE ITEM RANGE QUANTITY I SOFTWARE MULTISIM SOFTWARE PC WITH WINDOWS XP II HARDWARE 1 Transistors BC107BP 2 2 AC voltage Source 20 mv, 1KHz 1 3 Cathode Ray Oscilloscope (0-30)MHz 1 4 VCC 10V 1 5 Resistors 330KΩ 220KΩ 1 KΩ Capacitors 470nF 2 7 Ground

77 MODEL GRAPH: WITHOUT BOOTSTRAPPED INPUT AND OUTPUT WAVEFORMS: CALCULATIONS: Input Amplitude: Output Amplitude: Time Period: Phase Shift: 74

78 THEORY: Bootstrapping (Using positive feedback to feed part of the output back to the input, but without causing oscillation) is a method of apparently increasing the value of a fixed resistor as it appears to A.C. signals, and thereby increasing input impedance. A basic bootstrap amplifier is shown in Figure where capacitor CB is the Bootstrap Capacitor, which provides A.C. feedback to a resistor in series with the base. The value of CB will be large, about 10 x the lowest frequency handled x the value of the series resistor (10ƒminR3).Although positive feedback is being used, which would normally cause an amplifier to oscillate, the voltage gain of the emitter follower is less than 1, which prevents oscillation. Here the base of the emitter follower is biased from a potential divider via R3. By feeding the output waveform back to the left hand side of R3 the voltage at this end of R3 is made to rise and fall in phase with the input signal at the base end of R3.Because the output waveform of the emitter follower is a slightly less amplitude than the base waveform (due to the less than 1 gain of the transistor) there will be a very small signal current waveform across R3. Such a small current waveform suggests a very small current is flowing; therefore the resistance of R3 must be very high, much higher than in fact it is. The input impedance of the amplifier has therefore been increased. The main drawback of this method of increasing input impedance compared with other methods is that the use of positive feedback is likely to increase noise and distortion. 75

79 MODEL GRAPH: WITHOUT BOOTSTRAPPED: AC ANALYSIS: FREQUENCY RESPONSE MAGNITUDE RESPONSE: Lower cutoff frequency x1: Upper cutoff frequency x2: Bandwidth dx : x2 - x1= CIRCUIT DIAGRAM (HARD WARE): WITHOUT BOOTSTRAP 76

80 PROCEDURE (SOFT WARE): 1. Connect the circuit using multisim software. 2. Apply the input voltage (vi) of 20 mv (p-p) and 1KHz frequency using AC_Voltage Source. 3. Simulate the circuit and observe the output waveform on the CRO. WITHOUT BOOTSTRAP 4. Note down the peak-to-peak output voltage (v0) and time period from the CRO. 5. Calculate the voltage gain using the expression (Av) = v0 / vi. 6. Calculate the voltage gain in db using the expression (Av) = 20log10(v0 / vi ). 7. For plotting frequency response, go to AC analysis, set vertical scale to decibel and simulate. 8. Plot the magnitude and phase responses. 9. Note down the lower cut off frequency (fl) and upper cut off frequency (fh) at 3dB gain using the cursors. 10. Find the bandwidth using the formula (BW) = fh - fl WITH BOOTSTRAP 11. Connect a resistor and a capacitor from emitter of Q2transistorto base of Q1transistor. 12. Repeat the Process from step 4 to step Observe the gain and bandwidth values and tabulate the readings 77

81 EMITTER FOLLOWER: WITH BOOTSTRAPPED CIRCUIT DIAGRAM: VCC 10V VCC XSC1 R4 330kΩ + A _ + B _ Ext Trig + _ 2 C1 Q1 V1 100nF 20mVpk 1kHz 0 R3 220kΩ R2 4.7kΩ 4 BC107BP C4 10uF 1 Q2 BC107BP 6 C3 10uF 0 3 R5 1kΩ 78

82 PROCEDURE (HARD WARE): 1. Connect the circuit as per the circuit diagram. 2. Apply the input voltage (vi) of 20 mv (p-p) and 1KHz frequency using Function Generator. 3. Switch on the Supply and observe the output waveform on the CRO. WITHOUT BOOTSTRAP 4. Note down the peak-to-peak output voltage (v0) andtime period fromthe CRO. 5. Calculate the voltage gain using the expression (Av) = v0 / vi. 6. Calculate the voltage gain in db using the expression (Av) = 20log10(v0 / vi ). 7. For plotting frequency response, Apply different frequencies from Function Generator and note down in a tabular form. 8. Plot the magnitude response. 9. Note down the lower cut off frequency (fl) and upper cut off frequency (fh) at 3dB gain From the graph. 10. Find the bandwidth using the formula (BW) = fh - fl WITH BOOTSTRAP 11. Connect a resistor and a capacitor from emitter of Q2transistorto base of Q1transistor. 12. Repeat the Process from step 4 to step Observe the gain and bandwidth values and tabulate the readings 79

83 INPUT IMPEDANCE OUTPUT IMPEDANCE 80

84 PROCEDURE FOR FINDING INPUT IMPEDANCE AND OUTPUT IMPEDANCE: INPUT IMPEDANCE Zi 1. Adjust the input signal peak-peak in such that the output sine wave is not clipped. 2. Note down this value of the input Vin.(Let the frequency of the input signal be around 2KHz 3. Note down the peak-peak amplitude of the corresponding output VO. 4. Connect a DRB (with zero resistance) in series with the function generator. 5. Increase the resistance in DRB and observe the magnitude of the output VO Simultaneously on the CRO. 6. When the magnitude of the output VO is reduced to half of its original value, stop varying the potentiometer further and remove the DRB from the circuit. 6. Measure the value of resistance in DRB and this is measured value will be the input impedance of the circuit. OUTPUT IMPEDANCE Z0 1. Adjust the input signal peak-peak in such that the output sine wave is not clipped. 2. Note down this value of the input Vin. 3. Note down the peak-peak amplitude of the corresponding output VO. 4. Connect a DRB (with maximum resistance) in parallel with the load. 5. When the magnitude of the output VO is reduced to half of its original value, stop varying the potentiometer further and remove the DRB from the circuit. 6.Measure the value of resistance in DRB and this is measured value will be to outputimpedance of the circuit. PRECAUTIONS: 1. Connections at the contact nodes must be done very carefully. 2. Check the connections before assemble and simulate the circuit. 81

85 CIRCUIT DIAGRAM (HARD WARE): WITH BOOTSTRAP 82

86 RESULT: Bootstrapped Emitter Follower is designed and simulated and its frequency response is verified. The following parameters are calculated. Parameter Without Bootstrap With Bootstrap Gain Input Impedance Output Impedance 83

87 MODEL GARPH: WITH BOOTSTRAPPED INPUT AND OUTPUT WAVEFORMS: CALCULATIONS: Input Amplitude: Time Period: Output Amplitude: Phase Shift: MODEL GRAPH: WITH BOOTSTRAPPED: AC ANALYSIS: FREQUENCY RESPONSE MAGNITUDE RESPONSE: Lower cutoff frequency x1: Upper cutoff frequency x2: Bandwidth dx : x2 - x1= 84

88 VIVA VOCE 1. What is an emitter follower 2. What is a boot-strap emitter follower 3. What is the disadvantage of darlington pair 4. What is meant by boot strapping 85

89 CLASS A SERIES FED POWER AMPLIFIER: CIRCUIT DIAGRAM: 86

90 EXP.NO.8 DATE: CLASS A SERIES FED POWER AMPLIFIER AIM: (iii) (iv) To design & simulate a Class A Series Fed Power Amplifier To calculate maximum output power and efficiency APPARATUS: 1. Multisim10 Software 2. Personal Computer with windows XP COMPONENTS AND INSTRUMENTS: S.NO NAME OF THE ITEM RANGE QUANTITY I SOFTWARE MULTISIM SOFTWARE PC WITH WINDOWS XP II HARDWARE 1 Transistors BC107BP,BC177BP 1,1 2 AC voltage Source 20 mv, 1KHz 1 3 Cathode Ray Oscilloscope (0-30)MHz 1 4 VCC 10V 1 5 Resistors 1.2KΩ 100Ω 330Ω 1k Ω Capacitors 22uF 470uF Ground

91 MODEL GRAPH:INPUT AND OUTPUT WAVEFORMS: CALCULATIONS: Input Amplitude: Time Period: Output Amplitude: Phase Shift: 88

92 THEORY: The most commonly used type of power amplifier configuration is the Class A Amplifier. The Class A amplifier is the most common and simplest form of power amplifier that uses the switching transistor in the standard common emitter circuit configuration as seen previously. The transistor is always biased ON so that it conducts during one complete cycle of the input signal waveform producing minimum distortion and maximum amplitude to the output.this means then that the Class A Amplifier configuration is the ideal operating mode, because there can be no crossover or switch-off distortion to the output waveform even during the negative half of the cycle. Class A power amplifier output stages may use a single power transistor or pairs of transistors connected together to share the high load current. In class-a power amplifiers, Q-point is located in the middle of DC-load line. So outputcurrent flows for complete cycle of input signal. Under zero signal condition, maximum power dissipation occurs across the transistor. As the input signal amplitude increases power dissipation reduces. The maximum theoretical efficiency is 25%. Advantages: Class A design is the simplest. High fidelity because input signal will be exactly reproduced at the output. Since the active device is on full time, no time is required for the turn on and this improves high frequency response. Since the active device conducts for the entire cycle of the input signal, there will be no cross over distortion. Single ended configuration can be practically realized in Class A amplifier. Single ended means only one active device (transistor) in the output stage. Disadvantages: Main disadvantage is poor efficiency. Steps for improving efficiency like transformer coupling etc affects the frequency response. 89

93 CLASS A SERIES FED POWER AMPLIFIER: CIRCUIT DIAGRAM (HARD WARE): 90

94 PROCEDURE (SOFT WARE): 1. Connect the circuit using Multisim software. 2. Apply the input voltage (vi) of 20mV (p-p) and 1KHz frequency using AC Voltage source. 3. Simulate the circuit and observe the output waveform on the CRO 4. For plotting frequency response, go to AC analysis, set vertical scale to decibel and Simulate. 5. Plot the Magnitude Graph. 6. Note down the lower cut off frequency (fl) and upper cut off frequency (fh) at 3dB gain using the cursors. 7. Find the bandwidth using the formula BW= fh fl PROCEDURE (HARD WARE): 1. Connect the circuit as per the circuit diagram. 2. Apply the input voltage (vi) of 20mV (p-p) and 1KHz frequency using Function Generator. 3. Switch on the supply and observe the output waveform on CRO 4. Observe the AC analysis and draw the magnitude response curves on a semi log graph sheet. 5. Note down the lower cut off frequency (fl) and upper cut off frequency (fh) at 3dB gain using the cursors. 6. Find the bandwidth using the formula BW= fh fl PRECAUTIONS: RESULT: 1. Connections at the contact nodes must be done very carefully. 2. Check the connections before assemble and simulate the circuit. The Class A Series Fed Power amplifier is designed and Simulated. Maximum Efficiency = Band width = 91

95 MODEL GRAPH: AC ANALYSIS: FREQUENCY RESPONSE MAGNITUDE RESPONSE: Lower cutoff frequency x1: Upper cutoff frequency x2: Bandwidth dx: x2 - x1= 92

96 VIVA VOCE 1. What are large signal amplifiers 2. Classify power amplifiers 3. What are the differences between series fed and transformer coupled power amplifiers 4. What is harmonic distortion 5. What is the efficiency of a series fed power amplifier 6. What is the conduction angle of a class A power amplifier 93

97 CLASS B PUSH PULL POWER AMPLIFIER: CIRCUIT DIAGRAM: VCC VCC 5V R2 270Ω 3 XSC1 Q1 BC107BP + A _ + B _ Ext Trig + _ 2 V1 1 Vpk 1kHz 0 Q2 BC177AP 5 R1 270Ω 1 R3 1kΩ Key=A 50% 0 94

98 EXP.NO.9 DATE: CLASS B PUSH PULL POWER AMPLIFIER AIM: (v) (vi) To design & simulate a Class B PushPull Power Amplifier To calculate maximum efficiency APPARATUS: 1. Multisim10 Software 2. Personal Computer with windows XP COMPONENTS AND INSTRUMENTS: S.NO NAME OF THE ITEM RANGE QUANTITY 1 Transistors BC107BP,BC177BP 1,1 2 AC voltage Source 1V, 1KHz 1 3 Cathode Ray Oscilloscope (0-30)MHz 1 4 VCC 5V 1 5 Resistors 270Ω 1 KΩ Ground

99 MODEL GRAPH: INPUT WAVEFORM: OUTPUT WAVEFORM: 96

100 THEORY: At lower (e.g. audio) frequencies, a common way to reduce the distortion due to the missing half cycle in class B outputs is to use a push-pull output stage. The principles of this circuit are shown in Figure. Two identical but anti phase signals from a phase splitter are fed to the bases of a pair of power transistors so that each transistor (conducting only when the half cycle during which its input wave goes positive), feeds current to the load for that half cycle. The two half cycles are reh-combined in this circuit via a centre tapped transformer, which reverses the action of the phase splitter transformer, to produce a complete sine wave in the secondary. The main problem with class B push pull output stages is that each transistor conducts for not quite half a cycle. As shown in Figure distortion occurs on each cycle of the signal waveform as the input signal waveform passes through zero volts. Because the transistors have no base bias, they do not actually begin to conduct until their base/emitter voltage has risen to about 0.6V. As a result, there is a Dead Zone of about 1.2V around the zero volts line (between 0.6V and +0.6V) where the signal waveform is not amplified, causing a "missing" section from the output signal, resulting in unwanted distortion during the "crossover" from one transistor to the other.the effect of this distortion on the output depends to some degree on the amplitude of the output signal, the larger the amplitude the less significant the missing 1.2 volts becomes. Also the distortion will be less severe at high frequencies where the rate of change of the wave, as it passes through zero is much faster, causing a shorter step in the waveform. Advantages: Very low standing bias current. Negligible power consumption without signal Can be used for much more powerful outputs than class A More efficient than Class A. Disadvantages: Creates Crossover distortion. Supply current changes with signal, stabilised supply may be needed. More distortion than Class A. 97

101 CIRCUIT DIAGRAM (HARD WARE) CLASS B PUSH PULL AMPLIFIER: 98

102 PROCEDURE (SOFT WARE): 1. Connect the circuit using Multisim software. 2. Apply the input voltage (vi) of 1V (p-p) and 1KHz frequency using AC Voltage source. 3. Simulate the circuit and observe the output waveform on the CRO 4. For plotting frequency response, go to AC analysis, set vertical scale to decibel and Simulate.. 5. Note down the lower cut off frequency (fl) and upper cut off frequency (fh) at 3dB gain using the cursors. 6. Find the bandwidth using the formula BW= fh fl PROCEDURE (HARD WARE): 1. Connect the circuit as per the circuit diagram. 2. Apply the input voltage (vi) of 1V (p-p) and 1KHz frequency using Function generator. 3. Switch on the circuit and observe the output waveform on the CRO 4. Observe the AC analysis and draw the magnitude response curves on a semi log graph sheet. 5. Note down the lower cut off frequency (fl) and upper cut off frequency (fh) at 3dB gain using the cursors. 6. Find the bandwidth using the formula BW= fh fl PRECAUTIONS: 1. Connections at the contact nodes must be done very carefully. 2. Check the connections before assemble and simulate the circuit. RESULT: The Class B Push Pull Power amplifier is designed and Simulated. Maximum Efficiency = Band width = 99

103 MODEL GRAPH: AC ANALYSIS: FREQUENCY RESPONSE MAGNITUDE RESPONSE: Lower cutoff frequency x1: Upper cutoff frequency x2: Bandwidth dx : x2 - x1= 100

104 VIVA VOCE 1. Classify power amplifiers 2. How many types of class B amplifiers are there 3. What is the conduction angle for a class B power amplifier 4. What is cross over distortion 5. What are the disadvantages of class B power amplifier 6. What is the maximum conversion efficiency of a Class B amplifier 101

105 COMPLEMENTARY SYMMETRY CLASS B PUSH PULL POWER AMPLIFIER: CIRCUIT DIAGRAM (SOFT WARE): 102

106 EXP.NO.10 DATE: AIM: COMPLEMENTARY SYMMETRY CLASS B PUSH PULL POWER AMPLIFIER (i) (ii) To design & simulate a Complementary Symmetry Class B PushPull Power Amplifier To calculate maximum efficiency APPARATUS: 1. Multisim10 Software 2. Personal Computer with windows XP COMPONENTS AND INSTRUMENTS: S.NO NAME OF THE ITEM RANGE QUANTITY 1 Transistors BC107BP,BC177BP 1,1 2 AC voltage Source 1V, 1KHz 1 3 Cathode Ray Oscilloscope (0-30)MHz 1 4 VCC 5V 1 5 Resistors 270Ω 1 KΩ Ground

107 COMPLEMENTARY SYMMETRY CLASS B PUSH PULL POWER AMPLIFIER: CIRCUIT DIAGRAM (HARD WARE): 104

108 THEORY: A power amplifier is said to be Class B amplifier if the Q-point and the input signal are selected such that the output signal is obtained only for one half cycle for a full input cycle. The Q-point is selected on the X-axis. Hence, the transistor remains in the active region only for the positive half of the input signal. There are two types of Class B power amplifiers: Push Pull amplifier and complementary symmetry amplifier. In the complementary symmetry amplifier, one n-p-n and another p-np transistor is used. The matched pair of transistor are used in the common collector configuration. In the positive half cycle of the input signal, the n-p-n transistor is driven into active region and starts conducting and in negative half cycle, the p-n-p transistor is driven into conduction. However there is a period between the crossing of the half cycles of the input signals, for which none of the transistor is active and output, is zero 105

109 MODEL GRAPH: INPUT AND OUTPUT WAVEFORMS: CALCULATIONS: Input Amplitude: Output Amplitude: Time Period: Phase Shift: 106