ECE 310L : LAB 9. Fall 2012 (Hay)

Transcription

1 ECE 310L : LAB 9 PRELAB ASSIGNMENT: Read the lab assignment in its entirety. 1. For the circuit shown in Figure 3, compute a value for R1 that will result in a 1N5230B zener diode current of approximately 5mA (you can ignore the effect of base current). Assume Vin is 8V. 2. Build the circuit shown in Figure 1 in LTspice, except replace the R LOAD with a voltage source which you name VL and set to a small Signal AC Analysis Amplitude of 1. Place the label VL on the output of this source, and the labels Vs and Vg on source and gate nodes respectively. Run an operating point analysis on this circuit, and record the drain current I D and the VG and VS values. Using the value of Vto = 1.824V from the SPICE model, estimate gm for this device at this operating point. Run an AC Analysis from 10 khz to 10 MHz and plot V(VL)/I(C2). Move your cursor to the left vertical axis until you get the ruler icon, click, and change the Representation from Decibel to Linear. Save this plot for comparison with your lab results. Keep this circuit schematic for Parts 4 through Build the circuit shown in Figure 2 in LTspice, except replace the R LOAD with a voltage source which you name VL and set to a small Signal AC Analysis Amplitude of 1. Place the label VL on the output of this source, and the labels Ve and Vb on emitter and base nodes respectively. Run an operating point analysis on this circuit and record the collector current IC. From this estimate the gm for this device at this operating point. Run an AC Analysis from 10 khz to 10 MHz and plot V(VL)/I(C2). Move your cursor to the left vertical axis until you get the ruler icon, click, and change the Representation from Decibel to Linear. Save this plot for comparison with your lab results. Keep this circuit schematic for Parts 4 through The value of V(VL)/I(C2) is the impedance looking into the C2, and will be the equivalent source impedance of your circuit. Make note of the value of magnitude of this impedance at around 1 MHz for both devices. 5. Switch the vertical axis of both plots back to decibels, and find the frequency at which the magnitude of the impedance increases by 3 db for each plot. Compare that with what you would predict based on a calculation you could make. 6. Change C2 to 100 μf for both circuits. Describe how that affects the source impedance over the frequency range. Compare those results at 10 khz with the value of 1/ gm computed in parts 2 and 3 above. 7. With C2 retained at 100 μf plot the AC base or gate currents for both circuits. Based on your observations of base/gate currents, for which device do you think it is more important to have a high value for C1 and a low value for R1 and R2 in order to have a low source impedance? 8. Verify your suspicion in part 7 by changing C1 to 100 pf and increasing R1 and R2 by an order of magnitude for both circuits and observing the change 1

2 in source impedance. Which device exhibits the greatest increase in source impedance? OBJECTIVES: Construct and verify the operation of an NMOS unity gain amplifier. Construct and verify the operation of a BJT unity gain amplifier. Use an emitter follower/source follower to improve the load regulation of a zener diode voltage regulator. MATERIALS: DC Power supply Oscilloscope Signal Generator DMM Solderless breadboad Hookup Wire Resistors: Various Capacitors: 10uF, 100nF Diode: 1N5230B Transistors: ZVN3306A, 2N2222A BACKGROUND: Some amplifiers are design to act primarily as buffers, where they isolate circuits by providing high input impedance while a voltage gain of nearly one, or unity gain. The common-drain NMOS amplifier shown in Figure 1 is one such amplifier, and is commonly referred to as a source follower. The name source follower indicates the output is taken from the source and is in phase with input, i.e. V S follows V G. The term common drain comes from the idea that the drain is connected directly to V DD with no load resistance and in the AC analysis the supply rail, V DD, is a ground reference. The voltage gain (A V ) of the source follower is inherently less than one and is generally in the range The current gain can be much higher than one, though, allowing the source follower to buffer between a high-impedance source and a low-impedance load. 2

3 Figure 1 A similar configuration that provides approximately unity gain along with current amplification is the BJT common-collector amplifier or the emitter follower. The emitter follower is the BJT equivalent of the NMOS source follower. This lab will explore the operation of these amplifiers and examine the gain and phase response. Figure 2 3

4 The input coupling capacitors are very large, so their poles will be near 0. The low frequency response of the system will thus be determined by C 2. The RC time constant will set the cut-off frequency so in this design the significant time constant will be C 2 and the equivalent resistance seen by C 2. In the NMOS amplifier the time constant will be determined by the output capacitor, C 2, which is in series with the load resistor and the parallel combination 1 of the source resistor and the impedance seen in the NMOS source,. g m V GS 2I D V TN 1 1.2k 100k 100nF g m In the BJT amplifier, the time constant will be determined by the output capacitor, C 2, which is in series with the load resistor and the parallel combination of the emitter resistor and the impedance seen in the BJT emitter, r e. 1 rth X C1 re, where gm 1 4.7k 4.7k X C1 re 40I 200 c I c g m I V 4.7k 4.7k 100k 100nF 200 C T g m Then, you will use the NMOS source follower and the BJT emitter follower configurations to help improve the line/load regulation of a zener diode voltage regulator and allow for higher load current. The BJT version of this circuit is shown in Figure 3. V IN Q 1 V REG R 1 R L D 1 Figure 3 4

5 SETUP: Turn on power to the DMM, oscilloscope, power supply, and signal generator. Set the power supply +25V current limit to 100mA. Pay careful attention to the transistor pin-out as shown below to avoid damaging them. ZVN3306A pin-out 2N2222A pin-out (bottom view) LAB ASSIGNMENT: 1. Use the DMM to measure the values of the resistors. Use the measured component values in your calculations. 2. Construct the circuit shown in Figure 1. Connect the oscilloscope to measure the input and V OUT. 3. Measure and record the operating point of the transistor (I D, V DS ). Note that there is no drain resistor to permit easy measurement of I D, but you can measure I S. 4. Measure and plot the gain and phase characteristics of the amplifier from 10Hz to 100kHz. Use a 1Vpp sinusoid as the input. 5. Increase the input signal peak-to-peak voltage until the output signal becomes distorted or clips. What are the input and output voltage levels at this point? How do these voltages relate to the bias point of the amplifier? 6. Construct the circuit shown in Figure Measure and record the operating point of the transistor (I C, V CE ). Note that there is no collector resistor to permit easy measurement of I C, but you can measure I E. 8. Measure and plot the gain and phase characteristics of the amplifier from 10Hz to 100kHz. Use a 1Vpp sinusoid as the input. 5

6 9. Increase the input signal peak-to-peak voltage until the output signal becomes distorted or clips. What are the input and output voltage levels at this point? How do these voltages relate to the bias point of the amplifier? 10. Construct the circuit shown in Figure 3. Set Vin to 8V. Use a value for R1 that will result in a 1N5230B zener diode current of approximately 5mA (you can ignore the effect of base current). Use 10kΩ for the initial load resistor (this will be considered the no-load condition). 11. Measure the output voltage V REG. 12. Add a parallel load resistor that will increase the output current to approximately 25 ma. Measure the output voltage V REG. 13. Add a parallel load resistor that will increase the output current to approximately 50 ma. Measure the output voltage V REG. 14. Leave the load set to approximately 50mA, and reduce Vin to 7.2V. Measure the output voltage V REG. 15. Increase Vin to 8.8V. Measure the output voltage V REG. 16. Replace the BJT with the NMOS FET, and repeat steps REPORT: Write your report per the criteria in the syllabus and the sample lab report posted on the course web page. In your report, also answer the questions below; 1. Plot your gain (db) and phase measurements versus the input frequency. Use a logarithmic scale for frequency. 2. How does the measured low-frequency response of the amplifiers compared to the expected values? 3. Compare the performance of the voltage regulators to each other. Calculate line and load regulation for both regulator configurations. Compare the load regulation with what you would expect given the output impedance you calculated with the LTspice analyses you did for the prelab. 6