アナログ RF 回路の先端設計技術動向. Akira Matsuzawa. Department of Physical Electronics Tokyo Institute of Technology A.

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1 1 アナログ RF 回路の先端設計技術動向その 2 Akira Department of Physical Electronics Tokyo Institute of Technology

2 Contents 2 Introduction RF-CMOS SoC for FM/AM tuner DRP: Digital RF Processing SoC mm-wave SoC Conclusion matsu@ssc.pe.titech.ac.jp URL:

3 Why CMOS? 3 Low cost Must be biggest motivation CMOS is 30-40% lower than Bi-CMOS High level system integration CMOS is one or two generation advanced CMOS can realize full system integration Stable supplyment and multi-foundries Fabs for SiGe-BiCMOS are very limited. Slow price decrease and limited product capability Easy to use Universities and start-up companies can use CMOS with low usage fee, but SiGe is difficult to use such programs.

4 f T and operating voltage of CMOS 4 f T is higher than 200GHz at 90nm NMOS and enables mm-wave application. Operating voltage will be around 1V Design rule f T f T vs 2π L v s : Saturation career velocity L: Channel length Operating Voltage Year

5 Cost up issue by analog parts 5 Cost of mixed A/D LSI will increase when using deep sub-micron device, due to the increase of cost of non-scalable analog parts Large analog may be unacceptable. Some analog circuits should be replaced by digital circuits 0.35um 0.25um 0.18um 0.13um Chip area I/O Analog Digital (0.35um : 1) Wafer cost increases 1.3x for one generation 0.35um 0.25um 0.18um 0.13um Chip cost Akira, RF-SoC- Expectations and Required Conditions, IEEE Tran. On Microwave Theory and Techniques, Vol. 50, No. 1, pp , Jan. 2002

25um, 2.5V, 23mm 2, 5GHz Discrete-time Bluetooth 0.13um, 1.5V, 2.4GHz M.

6 Technology trend in RF CMOS LSI 6 Analog centric RF CMOS will be replaced by digital centric RF CMOS. Wireless LAN, a/b/g 0.25um, 2.5V, 23mm 2, 5GHz Discrete-time Bluetooth 0.13um, 1.5V, 2.4GHz M. Zargari (Atheros), et al., ISSCC 2004, pp.96 K. Muhammad (TI), et al., ISSCC2004, pp.268

7 Technology trend in RF-CMOS LSI 7 Analog-centric RF CMOS will be replaced by digital-centric RF CMOS. High performance, low cost, stable and robust circuits, no or less external components, no adjustment points, and high testability are the keys. DSP and ADC will play important role. Analog-centric Digital-centric Signal processing Analog circuits Analog processing +External component DSP+ADC + Small and robust analog ckts. Adjustment External Digital on chip, no external External components Large # No or less

8 8 RF-CMOS SoC for FM/AM tuner Courtesy Niigata-Seimitsu Co., Ltd.

Large # of products, but not expensive product.

9 Current AM/ FM tuner system 9 Current AM/FM tuner uses 3 ICs and large # of external components. Furthermore 12 adjustment points are needed. Large # of products, but not expensive product. More efforts for the cost reduction are still needed. Bipolar IC = 1 (RF) CMOS IC = 2 (PLL, RDS) External Components=187 AM/FM Tuner for home use 12 adjustment points

10 Block diagram of current FM/AM tuner 10 Large # of external components. They should be integrated on a chip. FM inter-stage Tunig L and varactor FM IFT and Ceramic filters De-coupling Capacitors RSSI Level Ceramic resonator for Stereo decoder and LPF for PLL FM Antenna Tunig L and varactor FM LNA FM MIX FM IF BPF LIMITER FM DEMOD STEREO DECODER SW LEFT RIGHT LO inductor and Varactor AM Bar Antenna and Varactor AM LNA LOCAL OSC(FM) LOCAL OSC(AM) AM MIX AM IFT and Ceramic filter shows alignment required FREQUENCY SYNTHESIZER AM IF BPF AM IFA AM DEMOD AGC smoothing Capacitor RDS DECODER SERIAL INTERFACE LPF for Synthesizer + VCC - Xtal Element for Synthe. De-coupling Caps for amplifier

11 External parts used in existing IC 11 Large # of external components are needed to analog signal processing. External Parts System Resistor Semi-fixed and Variable resistor Ceramic capacitor Small value capacitor Electrolytic capacitor Inductor Variable capacitance Analog filter Ceramic filter Xtal Osc. element Total number of external parts FM: Single conversion super heterodyne. IF=10.7MHz AM: Single or Double conversion super heterodyne IF=450KHz or 10.7MHz + 450KHz AGC, bias, LPF for PLL RSSI level alignment, volume control RF bypass, coupling, de-coupling AGC smoother, power-ground decoupling RF tuning, local oscillator, IF transformer, FM detector RF tuning, Local oscillator Noise canceller, LPF FM and AM IF BPF for channel filter Blocks to be used System clock, Reference for PLL synthesizer Home tuner and radio cassette tuner : around 165pcs Car tuner : 80 to 130pcs

12 Issues and conventional solutions of AM/FM tuner 12 Application of CMOS technology to AM/FM tuner looks very difficult, due to lower frequency and high dynamic range. Lower frequency AM: 522 KHz to 1710 KHz SW: 2.3MHz to 26MHz FM: 87.5 to 108 MHz Larger Inductance and capacitance Serious 1/f noise External components Bipolar High dynamic range Sharp and fine filter High linearity ckt. AM: 14 dbuv to 126 dbuv FM: 0 dbuv to 126 dbuv External filters (Ceramic) External varactors Bipolar

13 1 st trial by CMOS technology 13 1 st trial to realize AM/FM tuner by CMOS technology, many external components should be reduced. FM inter-stage Tunig L and varactor FM IFT and Ceramic filters De-coupling Capacitors FM Demod RSSI Level Can be integrated on a chip Ceramic resonator for Stereo decoder and LPF for PLL FM Antenna Tunig L and varactor FM LNA FM MIX FM IF BPF LIMITER FM DEMOD STEREO DECODER SW LEFT RIGHT LO inductor and Varactor AM Bar Antenna and Varactor AM LNA LOCAL OSC(FM) LOCAL OSC(AM) AM MIX AM IFT and Ceramic filter FREQUENCY SYNTHESIZER AM IF BPF AM IFA AM DEMOD AGC smoothing Capacitor RDS DECODER SERIAL INTERFACE LPF for Synthesizer + VCC - Xtal Element for Synthe. De-coupling Caps for amplifier

14 Result of analog-centric CMOS tuner 14 Characteristics is affected by process variation easily. Element mismatch causes DC offset, noise, distortion, and low filter performance. The reduction of # of external components is not attractive for users. External components

15 Analog-centric CMOS tuner technology 15 1 st trial was analog-centric CMOS tuner technology. Circuits have been replaced by CMOS, however still use analog technology. Thus it had many issues and many external components were still needed. Parts AM/FM IF BPF FM Demodulator Stereo Decoder RSSI Level adj. Varactor AGC smoother Capacitors Methods for on-chip 1. Low IF( a few hundred KHz) 2.Gm-C BPF with auto alignment, SCF Pulse count FM detector Multi-vibrator VCO, SCF filter Signal detector with DC compensation MOS varactor Time division charge and discharge Stages Direct connection, use small value coupling capacitor Problems 1.poor selectivity(-45db), 2. SCF Switch noise 3. Center frequency shift by DC offset 4. Poor image rejection ratio (25 to 35dB) Poor THD (0.5%) Large variation of free-run frequency Still need external LPF for PLL Can t cover all process corner Too much sharp C-V curve, distorted signal Needs large capacitor for low audio frequency High impedance required, Difficult for low frequency

16 Issues and advanced solutions of AM/FM tuner 16 Lower frequency AM: 522 KHz to 1710 KHz SW: 2.3MHz to 26MHz FM: 87.5 to 108 MHz Larger Inductance and capacitance Serious 1/f noise Digital filter, Mixer, PLL GHz OSC with divider PMOS Larger signal dynamic range AM: 14 dbuv to 126 dbuv FM: 0 dbuv to 126 dbuv Sharp and fine filter High linearity ckt. Digital Signal processing With high resolution ADC IF Freq. changed from 10.7 MHz to several 100 KHz High resolution ADC Switch mixer Watching desired and undesired signals

17 Advanced CMOS tuner 17 Digital-centric CMOS tuner has been developed. FM Tune or BPF AGC FM LNA Cap. Array Cap. Array AM LNA FM MIX LOCAL OSC(FM) AGC Anti- Alias LPF FREQUENCY SYNTHESIZER VGA ADC DECI. STEREO DAC LPF DECODER AGC REGISTER AGC SERIAL INTERFACE FMIF BPF FM DEMOD AGC GENERATOR AM MIX DIGITAL AM LO AMIF BPF DSP RDS DEC AM DEMOD XOSC SYS CLK GEN Power Decoupling Cap + VCC - Xtal LEFT RIGHT AM Bar Antenna (No need for Car radio) To/From MPU

Digital-centric CMOS tuner 18 One-chip CMOS tuner has been successfully developed. It can attain high tuner performance and can reduce the # of external components.

18 Digital-centric CMOS tuner 18 One-chip CMOS tuner has been successfully developed. It can attain high tuner performance and can reduce the # of external components. Furthermore it can realize no adjustment points. Full CMOS one-chip solution # of external components are 11 No adjustment points Sensitivity: FM: 9dBuV, AM: 16dBuV Selectivity: FM/AM >65dB SNR: FM: 63dB, AM: 53dB Stereo sep: 55dB Image ratio: FM: 65dB, AM: Infinity Distortion: FM: 0.09%, AM=0.25%

19 Digital-centric CMOS tuner technology 19 FM AM LNA LNA Main signal processing is done by DSP. MIXER I Q VGA +Filter ADC DSP processes DSP 1. AM/FM demodulations 2. Stereo decoder 3. AM mixer 4. Channel select filter 5. Support for image reject 6. Watch the signal revel and control gain of each stage 7. Parameter control and adjustment with MCU

20 Demodulation of AM/FM signal 20 AM/ FM signals can be demodulated by simple arithmetic operations 1) AM demodulation [ 1 + S( t) ] exp( jω t ) exp( jω t ) = 1 S( t) c c + Received signal x Demodulated signal ω c 2) FM demodulation Q R(t) θ I ( Δjωt + jk ) m( τ dτ R( t)exp d ) dθ dt θ = dθ dt Δω : Frequency offset R( t) : Amplitude variation m() τ : Baseband signal to be re covered Δωt + K d m( τ) dτ = Δω + K d m(t) m(t) can be demodulated

21 Stereo decoder 21 Te stereo signal can be reconstructed by numerical PLL, mixer, and filter. ( L + R) + ( L R) cosω t + K ω t S( t) = cos s p Level Frequency Spectrum of FM Stereo Signal ω ω s p : Sub carrier = 38KHz : Pilot tone = 19KHz 0 L + R from Demodulator 15K 23K Pilot tone =19KHz L - R (lower sideband) LPF L+R L-R Sub-carrier =38KHz Decoder Matrix L - R (Upper sideband) Left Right 53K Baseband Frequency ( L + R ) + ( L R ) = 2L ( L + R ) ( L R ) = 2R PLL 38KHz 19KHz PLL locks the pilot tone and generates 38KHz for sub-carrier Stereo Detector

22 Image rejection in low IF receiver 22 Image signal can be rejected by using I/Q mixer and phase shift. V in (t) LPF sin( ω LO t ) cos( ω LO t ) LPF V 1 V 2 90 V 3 + V out (t) Desired Input Output ω des ω IF ωif ωlo Image ω im ω Image rejection mixer Vdes Vim V1( t) = sin( ωdes ωlo ) t + sin( ωlo ωim ) t 2 2 Vdes Vim V2( t) = cos( ωdes ωlo ) t + cos( ωlo ωim )t 2 2 Vdes V V1( t) 90 shift = V3( t) = cos des LO LO 2 2 Vout ( t) = Vdes cos( ωdes ωlo )t Image is rejected, however, 0 ω IF im ( ω ω ) t cos( ω ω ) im t ω

23 Required gain and phase mismatch deg and 0.01% are needed for IRR of 60dB Conventional IRR: 35dB IRR: Image rejection ratio IRR G Δ G ( Δθ) 2 A. Rofougaran, et al., IEEE J.S.C. Vol.33, No.4, April PP

24 Image rejection 24 FM The dummy image signal is generated by IMO and the controller controls signal delay and amplitude on Q path to minimize the I/Q imbalance. LNA MIXER I Q VGA +Filter ADC to DSP Image Rejection Ratio >60dB Image frequency oscillator IMO Controller From ADCs Deci. LPF Deci. LPF Vari. Delay Fixed. Delay Vari. Gain DSP BPF BPF IM detect

25 25 DRP: Digital RF Processing Courtesy Dr. R. B. Staszewski, TI

26 DRP approach for transceivers 26

27 DRP approach for transceivers 27

28 DRP Architecture 28

29 Issues of conventional PLL 29 Performance of conventional PLL will degrade along with technology scaling. Functions is not sufficient for future systems.

30 All-Digital PLL 30 Digital filter Digital Controlled Oscillator Time to Digital Converter

31 Digitally-controlled oscillator 31 Pros: Small effect to AM/PM conversion and noise on control voltage. Cons: Extremely small capacitor L.T 1fF is needed. Courtesy Dr. R. B. Staszewski, TI

32 Proposed DCO 32 We proposed distributed DCO to realize fine frequency tuning with conventional capacitors Same df osc /dc Small df osc /dc Large df osc /dc Conventional DCO resonators Short end Distributed DCO resonator Open end Small voltage swing Large voltage swing Win Chaivipas, Takeshi Ito, Takashi Kurashina, Kenichi Okada, and Akira "Fine and Wide Frequency Tuning Digital Controlled Oscillators Utilizing Capacitance Position Sensitivity in Distributed Resonators" A-SSCC, 16-1, pp , korea, jeju, Nov, 2007

33 Measured C to F osc sensitivity 33 Over 100x capacitance to frequency sensitivity has been observed Oscillation frequency (GHz) Distance of Capacitance from short, total 2487um Frequency Step (MHz) Outer Step C0 376 MHz Inner Step C MHz Min Step C7 <100kHz

34 TDC: Time-to-Digital Converter 34 Issue: more small delay will be required.

35 Digital polar modulation 35 Amplitude modulation has been realized by RF-DAC. PA consists of DAC. A. Kavousian, D. K. Su, Bruce A. Wooly, A Digitally Modulated Polar CMOS PA with 20MHz Signal, IEEE ISSCC 20007, Dig. of Tech. Papers, pp.78-79, Feb I Q Polar Decomp Digital Amplitude Phase 6 Decoder PA 1 PA2 η 50% Proposed approach Class-A PA PA 64 P sat P out

36 PA using DAC small PAs are controlled by digital BB signal. ctrl1 ctrl2 ctrln Matching Network RF Phase Quadrature Clocks RF in

37 Results 37 Po=13dBm PAE=7.2% BW=20MHz Technology Supply Voltage Digital Hardware Driver Stage Output Stage Linear 64 QAM OFDM Output Power EVM for 64 QAM OFDM Dissipated Power Output Stage Driver Stage Digital 0.18μm CMOS, 2P5M 1.8V 2.2V 1.7V 14.7dBm 13.6dBm (balun included) 26.8dB 247mW 66mW 3.4mW PAE (for 64QAM OFDM) 8.9% 6.7% (baluns included) Center Frequency 1.56GHz Total Chip Area 1.8mm 2

38 サンプリングミキサー 38 標本化回路はそれ自体ミキサー作用を持つが容量アレーを用いて演算を行うことによりフィルター特性を持たせることができる ( 離散時間信号処理の RF 応用 ) スイッチと容量という準受動回路で実現できるので微細化に向いており低電力である K. Muhanmad (TI) et al. All-Digital TX Frequency Synthesizer and Discrete-Time Receiver for Bluetooth Radio in 130-nm CMOS (JSSC Vol.39, No.12, pp , Dec. 2004)

39 1 st Sinc Filter 39 LO クロック N 回の移動平均 N 1 l = 0 w i = u i l LO N クロック ui : i 番目にサンプリングされた電荷 wi : N クロックの間に蓄積された電荷 w i W ( Z ) = F N 1 l = 0 u 1stSinc i l N 1 Z = U ( Z ) 1 1 Z sin Nπ ( ω) = f sin π f f f s s db f s N 3 f s N=8 2N f / f s

40 1 st IIR Filter 40 電荷が C h と C r に分割して蓄積される s + w j i= Nj = asj 1 + wj si = asi N i a = C h Ch + C r as j-1 : j-1のときc h に蓄積された電荷 W j : jのときc h とC r 注入された電荷 W ( Z ) si = asi N + wi S( Z ) = N 1 az 1 F1 stiir ( f / f s ) = a 2a cos N 2π f f s S j : j で C h と C r に蓄積されている電荷の合計 w j 切替 as j-1 C h C r C r

41 フィルター特性の可変化 41 容量比や平均化回数などを変えることによりフィルター特性を可変にできる 0-20 WLAN B=10M Bluetooth B=1M GSM B=200K Hz db WLAN B=10M Bluetooth B=1M GSM B=200K E+05 5.E+08 1.E+09 2.E+09 2.E+09 3.E+09 db E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 1.E+09 1.E+10 Hz

42 Sampling mixer vs. switch mixer 42 Switch mixer has almost same frequency characteristics as sampling mixer. LO V out Can t use, because of large aliases Voltage sampling V sig C This is a sampling mixer. Current integration and sampling TA LO V out 0 f s 2f s 3f s 4f s Freq. Can use V sig V to I 0 f s 2f s 3f s 4f s Freq. Almost same Double balanced Switch mixer TA +V out Can use +V sig -V sig TA -V out 0 f s 2f s 3f s 4f s Freq. LO

43 Passive SCF filter vs. CT filter 43 Passive SCF filter looks less attractive, so far. RF LO BB Passive SCF filter Poor performance Not suitable for reconfigurability Pros: Low power Cons: Poor SNR Still needs an anti-alias filter Narrow band and low filter order Restricted operating frequency RF LO BB CT filter High performance Suitable for reconfigurability Pros: No needs an anti-alias filter Wider band and higher order Cons: consumes power

44 Conclusion 44 Analog-centric CMOS technology will go away No attractive performance and affected by PVT fluctuation seriously. Cost increase for further technology scaling Still need large # of external components and adjusting points Digital-centric CMOS technology must be right way High performance and very robust against PVT fluctuations Further performance increase and cost reduction are expected by using more scaled technology No or less external components and no adjustment points Digital-RF technology sounds interesting, however not matured yet. Performance is not attractive

45 45 mm-wave SoCs

60GHz ミリ波 CMOS レシーバー 1 46 90nm CMOS を用いて 60GHz

46 60GHz ミリ波 CMOS レシーバー nm CMOS を用いて 60GHz のレシーバーを実現 B. Razavi A mm-wave CMOS Heterodyne Receiver with On-Chip LO and Driver, IEEE ISSCC 20007, Dig. of Tech. Papers, pp , Feb

60GHz ミリ波 CMOS レシーバー 2 47 0.13um CMOS を用いても 60GHz のレシーバーが実現できる S. Emami, C. H. Doan, A. M. Niknejad, R. W.

47 60GHz ミリ波 CMOS レシーバー um CMOS を用いても 60GHz のレシーバーが実現できる S. Emami, C. H. Doan, A. M. Niknejad, R. W. Broderson, A Highly Integrated 60GHz CMOS Front-End Receiver, IEEE ISSCC 20007, Dig. of Tech. Papers, pp , Feb

48 トランスミッションラインの応用 48 ミリ波では波長が短いためトランスミッションラインが使用できるインピーダンス整合や共振器発振器として使用できる Z in Z o Z L Z in = Z 0 Z Z l 0 + jz + jz 0 l tanβ d tanβ d d Z in 2 λ Z 0 4 = Z in = when Z l = 0 4 Z l λ resonator Coplanar transmission line

49 ミリ波フェーズドアレーシステム 49 ミリ波では波長が数 mm になるのでチップ上にアンテナを集積することが可能給電位相の変化により電子的にビームフォーミング可能オンチップ上に 4 つのアンテナを配置 A. Natarajan, et. al., IEEE, Journal of Solid-State Circuits, Vol. 40, No. 12, pp , Dec A. Natarajan, et. al., IEEE, Journal of Solid-State Circuits, Vol. 41, No. 12, pp , Dec

50 ビームフォーミング 50 ビームフォーミングは信号強度を上げ伝送レートを速くするためにも有効

51 レンズの集積 51 77GHz のミリ波トランシーバ : オンチップアンテナとレンズを集積 IEEE ISSCC 2006, Dig. Technical Papers, pp

52 性能 52 レンズを用いることにより 10 数 db の感度アップ

53 近接磁気結合 53 磁気結合により高速低電力データ伝送が可能 i 1 i 2 M v 1 v 2 v v 2 di1 di2 = L1 + M dt dt di1 di2 = M + L2 dt dt 1 = di 2 M L 1 L dt 2 v 1 M L x L N. Miura, et. al., IEEE, JSC, Vol. 41, No. 1, pp , Jan

54 近接磁気結合 54 スタックされた LSI 間の高速データ通信に有効である Data rate: 1Gbps/ch Energy consumption:140fj/b

磁気結合による電力の伝送 55 磁気結合によりデータのみならず電力を送ることができる体内チップへの応用などが期待される i 1 i 2 M L v v 1 L 2 1 2 R L P = k L I 2 1 2 L 1R L L2 k = M L 1 L 2 1 3 d K decreases rapidly with

55 磁気結合による電力の伝送 55 磁気結合によりデータのみならず電力を送ることができる体内チップへの応用などが期待される i 1 i 2 M L v v 1 L R L P = k L I L 1R L L2 k = M L 1 L d K decreases rapidly with increase of distance 1 k turns 85.6mm x 54 mm T. Tanaka, et. al., Tech. Dig. of Int. 3D S I Conference, 6-1, 2007

LI, PL = 2 1 ΔI L Lf f LI 2 Q = 2π fl R T off L C R L L μr =

56 マイクロ電力システム 56 チップ上に電力供給システムを構築する動きが始まった低インダクタでも周波数が高ければ効率は高い T on V in I L V out V out = T on Ton + T CTRL 2 2 off V in 1 EL = LI, PL = 2 1 ΔI L Lf f LI 2 Q = 2π fl R T off L C R L L μr = 900, = 50ns R G. Schrom, et. al., Proc. ISLPED 04, pp , 2004.

57 配線技術の様々な応用 57 Interconnection Wire line Metallization Wire Wireless (EM wave) Resonator Energy conversion Antenna Wireless (Magnetic) Transmission line Transformer Z in Z o Z L d

58 まとめ 58 RFCMOS の動向インダクタをなるべく使用しない方向広帯域化省面積化低コスト化デジタル PA が出現 D/A 変換技術を RF 信号の発生に利用サンプリングミキサースイッチと容量という準受動素子で Mixer と Filter を実現離散時間信号処理技術が RF にも適用可能にミリ波 SoC が出現 130nm~90nmCMOS で 60GHz が可能にオンチップアンテナ位相差給電方式可変ビームフォーミングオンチップレンズインダクタの応用が活発化近接データ伝送近接電力供給オンチップDC/DC

59 結論 :RF-SoC の動向 59 CMOS を用い殆どのワイアレスシステムをワンチップに集積する RF-SoC の開発が進行している大量品においては RF-SoC がコスト的にも有利との見方アナログ技術中心のRF-CMOSからデジタル技術中心のRF-CMOSに技術が転換し成功を収めつつあるアナログ技術中心 :PVT ミスマッチに弱く性能量産性ともに課題デジタル技術中心 : ばらつきに強く性能量産性ともにクリアー外部部品や調整箇所が少なくコストも安い RF 回路にデジタル技術を適用するデジタル RF 技術の開発が進められているアイデアはおもしろいが性能は今一歩さらなる技術開発が必要ミリ波用途の RF-CMOS 開発が台頭し電磁波的回路のチップ集積が可能となり新たな技術領域を拓きつつある

Digital-Centric RF-CMOS technology

1 Digital-Centric RF-CMOS technology Akira Department of Physical Electronics Tokyo Institute of Technology Contents 2 Digital-centric CMOS tuner technology Conventional AM/FM tuner Analog-centric CMOS