RH850/F1x-176pin PiggyBack board V3

Transcription

1 User Manual RH valuation Platform RH/Fx-pin PiggyBack board V Y-RH-FX-P-PB-T-V All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas lectronics orp. without notice. Please review the latest information published by Renesas lectronics orp. through various means, including the Renesas Technology orp. website ( The newest version of this document can be obtained from the following web location RUTD, Rev.. --

2 Table of ontents hapter Introduction... hapter Overview.... Overview.... Mounting of the device... hapter Jumper onfiguration... hapter Power supply.... Board power connection.... Voltage distribution... hapter lock sources.... MainOsc.... SubOS... hapter Debug and Programming interface... hapter onnectors for ports of device.... onnectors to MainBoard..... onnector N..... onnector N..... onnector N... hapter Other circuitry.... Push button for RST.... Mode Selection.... Signalling LDs... hapter Mechanical dimensions... hapter Schematic... hapter Revision History... RUTD Rev.. --

3 hapter Introduction The RH/Fx Application Board is part of the RH valuation Platform and serves as a simple and easy to use platform for evaluating the features and performance of Renesas lectronics -bit RH/Fx microcontrollers. The piggyback board (Y-RH-FX-P-PB-T-V) can be used as a standalone board, or can be mated with a mainboard (e.g. Y-RH-XX-MB-Tx-Vx) for extended functionality. Main features: Socket for mounting of device Standalone operation of the board Direct supply of device voltage (typ..v-.v) Device programming capability Device debugging capability Pin headers for direct access to each device pin Reset switch MainOS and SubOS circuitry Signal LDs Jumpers for device mode selection onnectors to MainBoard This document describes the functionality provided by the piggyback board and guides the user through its operation. For details regarding the operation of the microcontroller, refer to the related User s Manual and Datasheet This manual describes the following board revision: Y-RH-FX-P-PB-T-V The main difference to the previous board revision (Y-RH-FX-P-PB- T-V) are: Added support for the RH/FKM-S device Added jumpers for mode selection Added signal LDs RUTD Rev.. --

4 Device pin # hapter Overview. Overview Figures and provide the views of the Piggyback Board. Figure PiggyBoard top view Figure PiggyBoard bottom view RUTD Rev.. --

5 . Mounting of the device The board is designed for use with the following devices (each in the pin package version): RH/FL RH/FM RH/FH RH/FK RH/FKM-S The device must be placed inside the socket I. To insert the device, press down the lid, align the # pin of the device to the #pin of the socket, insert the device inside the socket and release the lid. RUTD Rev.. --

6 hapter Jumper onfiguration The function of the board can be configured via jumpers. This chapter describes the standard configuration, i.e. jumper setting for the intended devices. For the supported function of the used device, please refer to the corresponding HW user s manual. The table has the following meaning: x-y: onnect the pins x and y; valid for -pin jumpers (e.g. JP) The pin # can be identified by a small circle in the vicinity of the jumper Depending on the used device a configuration of several jumpers is required. The detailed configuration is shown below: FL FM FH FK FKM-S Function JP closed open open closed open JP open closed closed open open JP open open open open closed JP closed open open closed open JP open closed closed open open JP open open open open closed Selection of Pin : P_, VSS or RGV Selection of Pin : P_, RGV or VSS JP - closed closed closed closed open Selection of Pin : JP - open open open open closed P_ or ISOVL JP - closed closed closed closed open Selection of Pin : JP - open open open open closed P_ or VSS JP - closed closed closed closed open Selection of Pin : JP - open open open open closed P_ or VSS JP - closed closed closed closed open Selection of Pin : JP - open open open open closed P_ or ISOVL JP - closed open open ither open Selection of PWGA: JP - open closed closed Or closed ither from P_ or P_ JP - closed open open ither open Selection of PWGA: JP - open closed closed Or closed ither from P_ or P_ JP - open open closed open open Selection of THRXRR: JP - open open closed open open ither from P_ or P_ RUTD Rev.. --

7 The jumper setting also are shown in this picture: The green jumper JP for FLMDO always must be closed for a normal (user mode and debug) operation of the device. The red jumpers must be set for a single Voltage (typ +.V) operation of the device. The blue jumper must be set for a single Voltage (typ +.V) operation of the device. The orange jumpers must be selected depending on the used device. See the printing on the board for the applicable setting. For jumper settings related to the device operation mode, refer to the chapter.. RUTD Rev.. --

8 hapter Power supply. Board power connection For operation of the device, a supply voltage must be connected to the board. Though a single supply voltage is sufficient for the operation of the device, two (different) voltages can be supplied to the board. Within this document the following voltages are considered as typical connections: Voltage =.V Voltage =.V The following connectors are available to supply those voltages: Three mm banana-type connectors: - Two red connectors for voltages Voltage (N) and Voltage (N). - A black connector for VSS connection (N). Note: The three connectors are supplied with the board but not assembled. The emulator that is used for debug purposes and flash programming can also supply a single operating voltage ( Dbg_Voltage ). The voltage is programmable via the GUI as. or.v (typ). See the documentation of the and chapter Debug and Programming interface for details. Note: The voltage is connected to Voltage, what is typically V. Still,.V can be provided by the. In case the PiggyBoard is mounted on a MainBoard, the voltages Voltage and Voltage are supplied by the on-board regulators of the MainBoard. NOT: Do not supply any voltage directly to the PiggyBoard in case it is mounted on the MainBoard. For each of the two voltages, Voltage and Voltage, a green LD (LD and LD) is available to signal that the related voltage is available on the PiggyBoard. RUTD Rev.. --

9 . Voltage distribution The table shows the required device power supply pins and their function: Device supply pin Name on PiggyBoard Function RGV RGVDD Supply for the device internal regulators for the digital logic. V VDD Supply for ports. BV BVDD Supply for ports. AVRF AVRF VDDIOF Supply for ports and analog functions of AD. Supply for ports and analog functions of AD. IO supply voltage for components located on a connected mainboard. For each of the above voltages, the voltage source can be selected from Voltage (typ..v) or Voltage (typ..v) by the jumpers JP-JP, JP, respectively the jumpers JP and JP. JP VOLTAG VOLTAG JP JP RGV JP V JP JP VDDIOF BV JP AVRF JP AVRF RUTD Rev.. --

10 hapter lock sources Three external crystal oscillators for the device clock supply are provided with the board.. MainOsc A crystal or ceramic resonator can be mounted on socket X. The applicable frequency range can be found is the devices electrical specification. A MHz and a MHz oscillator is supplied with the board.. SubOS An oscillator with a frequency of.khz is supplied with the board and can be soldered into the connector X. RUTD Rev.. --

11 hapter Debug and Programming interface For connection of the microcontroller debug and flash programming tools, the connector N is provided. The signal connection of the connector N is shown in the picture below: N pin Device Port Device signal JP_ DUTK / LPDLK GND GND JP_ DUTRST FLMD FLMD JP_ DUTDO / LPDO P_* FLMD JP_ DUTDI / LPDI Dbg_Voltage - JP_ DUTMS - - JP_ DURDY / LPDLK GND - RST - GND - * In case the FLMD signal must be controlled by the debug/programming tool, the pin header JP must be closed. The Dbg_Voltage (on N pin ) is monitored or supplied by the debug and flash programming tools. Therefore, it is necessary to select either Voltage (V) or the Voltage (.V) by pin header JP: JP pin Selection for Dbg_Voltage - V is selected -.V is selected RUTD Rev.. --

12 hapter onnectors for ports of device onnection to each pin of the device is possible via the connectors N to N. Note: The pin headers are directly connected to the pins of the device, therefore special care must be taken to avoid any electrostatic or other damage to the device.. onnectors to MainBoard Three connectors (N to N) are available to connect the PiggyBoard to a MainBoard. The signal connection of each connector is described in the following tables:.. onnector N Pin Function Device Port Pin Function Device Port VOLTAG - VOLTAG - VOLTAG - VOLTAG - RST _RST NMI P_ WAK T P_ T P_ T P_ T P_ UARTTX P_ UARTTX P_ UARTRX P_ UARTRX P_ LTX P_ LTX P_ LRX P_ LRX P_ IISDL P_ IISDL - IISDA P_ IISDA - ANTX P_ ANTX P_ ANRX P_ ANRX P_ SNT - SNT - SNT - SNT - PSIRx - PSIRx - PSITx - PSITx - PSISnyc - PSISync - FLXTX P_ FLXN P_ FLXRX P_ FLXSTPWT P_ FLXTX P_ FXN P_ FLXRX P_ FXLK P_ THMDIO P_ THMD P_ THRXD P_ HTXD P_ THRXD P_ HTXD P_ THRXD P_ HTXD P_ RUTD Rev.. --

13 Pin Function Device Port Pin Function Device Port THRXD P_ HTXD P_ THRXDLK P_ THTXLK P_ THRXR P_ THTXR P_ THRSDV P_ THTXN P_ THRXDV P_ THOL P_ THRST P_ THLK P_ USBUDMF - USBUDMH - USBUDPF - USBUDPH DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ DIGIO_ P_ MUX P_ MUX P_ MUX P_ - - AD AP_ AD AP_ AD AP_ AD AP_ AD AP_ AD AP_ AD AP_ AD AP_ VDDIOF - VDDIOF - VOLTAG - VOLTAG - VOLTAG - VOLTAG - RUTD Rev.. --

14 .. onnector N Pin Function Device Port Pin Function Device Port ANTx P_ ANTx P_ ANRx P_ ANRx P_ ANTx P_ ANTx P_ ANRx P_ ANRx P_ LTx P_ LTx P_ LRx P_ LRx P_ LTx P_ LTx P_ LRx P_ LRx P_ LTx P_ LTx P_ LRx P_ LRx P_ LTx P_ LTx P_ LRx P_ LRx P_ LTx P_ LTx P_ LRx P_ LRx P_ LTx P_ LTx P_ LRx P_ LRx P_ LTx P_ LTx P_ LRx P_ LRx P_ ANTx P_ ANTx P_ ANRx P_ ANRx P_ RUTD Rev.. --

15 Pin Function Device Port Pin Function Device Port RUTD Rev.. --

16 .. onnector N Pin Function Device Port Pin Function Device Port PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ or P_ PWM P_ or P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM P_ PWM - PWM - PWM - PWM - PWM - PWM - PWM - PWM - PWMAD AP_ PWMAD AP_ RUTD Rev.. --

17 Pin Function Device Port Pin Function Device Port PWMAD AP_ PWMAD AP_ PWMAD AP_ PWMAD AP_ PWMAD AP_ PWMAD AP_ PWMAD AP_ PWMAD AP_ PWMAD AP_ PWMAD AP_ PWMAD AP_ PWMAD AP_ PWMAD AP_ PWMAD AP_ RUTD Rev.. --

18 hapter Other circuitry. Push button for RST In order to issue a RST to the device, the push-button SW is available.. Mode Selection The PiggyBack Board gives the possibility to configure the following mode pins FLMD via jumper JP FLMD via jumper JP MOD via jumper JP MOD via jumper JP MOD via jumper JP To apply High or Low to the mode pins, the pins and, or the pins and (if available) of the corresponding jumper must be closed, respectively. Note: Pin of all jumpers is marked by a small circle. AUTION: Be careful in configuration of mode related pins. Wrong configuration and operation of the device outside of its specification can cause irregular behaviour of the device and long term damage cannot be excluded. Be sure to check the corresponding User s Manual for details, which modes are specified for the used device Note: In the very most cases the Normal operating mode of the device will be used. This mode is for execution of the user program. The on-chip debug functions also use this mode. To select the Normal operating mode of the device, the FLMD pin must be pulled low. To do so, close the pins - on the jumper JP: All other jumper related to the mode selection can be left open.. Signalling LDs ight LDs are provided to allow visual observation of the output state of device port pins. Device pins P_ to P_ are connected to the even pins to of the pin header N, while the LDs to are connected to the odd pins to, respectively. Thus the LDs can be either connected to - the device port pins P_ to P_ by closing the connection on N using a jumper, or - any device port pin by using the provided wire connections. RUTD Rev.. --

19 hapter Mechanical dimensions,mm,mm,mm,mm N N,mm,mm N,mm,mm N RUTD Rev.. --

20 Z_PS<..> A P P P RH/FL O ADVAND, PRMIUM (named FL) P<> P<> P<> P<> P<> P<> RH/FM O, ADVAND (named FM) P<> P<> P<> P<> ISOVL ISOVSS RH/FH O, PRMIUM (named FH) P<> P<> P<> P<> ISOVL ISOVSS RH/FK O, ADVAND, PRMIUM (named FK) P<> P<> P<> P<> P<> P<> Rh/FKM S/S ISOVL ISOVSS ISOVSS ISOVL ISOVSS RGV select_ (name FKM ) P<> RGV (FL, FK) JP (FM, FH) JP (FKM) JP (FL, FK) JP (FM, FH) JP (FKM) JP P P P. OR V n HADR WAY N HADR WAY N AVRF. OR V ISOVL select_ P<..> P<..> select_ select_ n (FL, FM, FH, FK) JP select_ Z_PS<..> P<> ISOVL AVRF n. OR V ISOVL P<> AP<..> (FL, FM, FH, FK) JP select_ N (FKM) D P<> (FL, FM, FH, FK) JP select_ (FKM) P<..> P<..> P<..> P<..> HADR WAY N HADR WAY N Z_PS<..> A B AP[] AP[] AP[] AP[] AP[] AVRF AVSS BVDD[] ISOVDD ISOVSS P[] P[] P[] P[] P[] P[] P[] P[] BVSS[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] BVDD[] BVSS[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] VSS[] P[] P[] P[] P[] P[] P[] P[] FLMD X X RGVDD AWOVDD AWOVSS IP[] XT VDD[] RST* P[] P[] P[] P[] P[] P[] JP[] JP[] JP[] RH_FL YAM_SOKT I P<..> P<..> P<..> P<..> select_ select_ P<..> P<..> RST_Z AWOVL. OR V FLMD D R R RGV SOKT WAY N.KHZ SUB_OSILLATOR X X N. MHZ + SOKTMA_OSILLATOR PF P<..> P<..> p p p p JP<..> P<> (FL, FM, FH, FK) JP ISOVL P[] P[] P[] BVDD[] BVSS[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] VDD[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] VSS[] P[] P[] P[] P[] JP[] JP[] JP[] P<..> AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] VDD[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] VSS[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AP[] AVRF AVSS Z_PS<..> (FKM) Z_PS<..> B AP<..> P<> Z_PS<..> select_ RGV V BV. OR V. OR V. OR V AVRF AVRF. OR V. OR V P<..> P<..> P<..> P<..> R P<..> P<..> P<..> select_ select_ F BV. OR V N N N N N N N N N n K (FKM) F V. OR V lectronics urope GmbH Title Rh_FX_pin_PB_T_V Size V. changed connection AN on N and value R from k to K.. W.Rauser A Date: TRU Document Number SS--- Fri Nov :: PAG OF. hapter Schematic RUTD Rev.. --

21 K K K K K K K K K K K K K K K K K K RUTD Rev.. -- A B D F N.A. N SMA STRAIGHT DBUG AND PROGRAMMG TRFA R D SMABTG_.V TO B PRTD ON PB ALLOWD D SUPPLY MAX V STD POWR LAB SOKT MM RD N N.A. STD POWR LAB SOKT MM BLAK N N.A. TO B PRTD ON PB V_.V ALLOWD D SUPPLY.V MAX.V STD POWR LAB SOKT MM RD N N.A. L RST JP<..> LX R N.A. R R OVRVOLTAG PROTTION V_V V JP.V.V HADR WAY SHROUDD N FLMD MF-USMF FU MF-USMF FU JP.V D SMABTG_.V.V P<..> D SMABTG_.V LD GRN R LD GRN R u u VOLTAG DISTRIBUTION.V.V TP TSTPOT_SMALL_RD TP TSTPOT_SMALL_RD JP JP JP JP JP JP JP VV_SLT V RGV. OR V V. OR V BV. OR V AVRF. OR V AVRF. OR V Port Port TP TSTPOT_SMALL_RD JP R K R K VDDIOF. OR V LD yellow TR B R LD yellow TR B R R NXP_B R NXP_B Port Port LD - P<..> PUSH BUTTON FOR RST FUDUIALS AND GROUND TST POTS R K R K LD yellow NXP_B NXP_B V. OR V n header way N D NW-V RST_Z PUSH BUTTON P SMD SW R K R K LD yellow NXP_B NXP_B TP GND-TSTPOT TP GND-TSTPOT TP GND-TSTPOT TP GND-TSTPOT TP GND-TSTPOT TP GND-TSTPOT RUBBR FT RUBBR FOOT D=.MM/H=MM GRY MP RUBBR FOOT D=.MM/H=MM GRY MP RUBBR FOOT D=.MM/H=MM GRY MP yellow yellow yellow TR B R LD TR B R P<..> R R R Port Port Port Port Port Port Port Port Port Port TR B R LD TR B R R R Port Port R K R K Title Size A Date: TR B R LD LD yellow TR B R R NXP_B R NXP_B TOP TP FIDUIAL_MM TP FIDUIAL_MM BOTTOM TP FIDUIAL_MM TP FIDUIAL_MM RUBBR FOOT D=.MM/H=MM GRY MP RUBBR FOOT D=.MM/H=MM GRY MP V. OR V Rh_FX_pin_PB_T_V Document Number SS--- lectronics urope GmbH Thu Aug :: PAG OF. A B D F

22 RUTD Rev.. -- ONNTOR ONNTOR MOD Jumper ONNTOR FLMD MOD MOD MOD ONNTOR MA BOARD ONNTORS Fri Nov :: PAG OF. SS--- Rh_FX_pin_PB_T_V lectronics urope GmbH K N.A. QSH---F-D-A.V VDDIOF VDDIOF. OR V.V.V V. OR V V. OR V. OR V V. OR V V. OR V V K K K K QTH---F-D-A.V K K K. OR V QSH---F-D-A QTH---F-D-A R JP JP JP JP JP JP R R R JP JP R R R R N N N N LRX LTX LRX LTX LRX LTX LRX P<> P<> P<> P<> P<> P<> LRX P<> P<> AP<> AP<> LRX P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> UARTRX P<> P<> P<> P<> DIGIO_ P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> PWM P<> P<> ANTX P<> P<> P<> P<> P<> P<> P<> P<> PWM P<> P<> P<> P<> P<> THRXR AP<> AP<> AP<> AP<> AP<> AP<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> AP<> AP<> AP<> AP<> AP<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> AP<> AP<> P<> P<> P<> AP<> AD AD AD AP<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> THRST MUX MUX DIGIO_ DIGIO_ DIGIO_ DIGIO_ DIGIO_ THRSDV THRXDV THRXLK THRXD THRXD THRXD THMDIO THRXD FLXTX FLXRX FLXTX FLXRX P<> P<> P<> P<> P<> P<> P<> P<> P<> RST_Z UARTTX T T RST AD AD AD AD DIGIO_ THLK THOL THTXN THTXR THTXLK THTXD THTXD THTXD THTXD THMD FLXLK FLXN FLXSTPWT FLXN SNT ANTX LRX LTX T T NMI AP<> AP<> AP<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> DIGIO_ P<> P<> P<> LTX LRX LTX LRX LTX LRX LTX LRX LTX ANRX ANTX ANRX LRX LTX LTX LRX LTX ANRX ANTX ANRX P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> FLMD P<..> P<..> P<..> P<..> P<> AP<> AP<> P<> P<> P<> LRX ANTX LRX LTX P<> P<> P<> P<> P<> P<> P<> P<> P<> P<> MUX DIGIO_ DIGIO_ DIGIO_ DIGIO_ DIGIO_ P<> P<> IISDA SNT SNT ANRX ANTX LTX LRX IISL ANRX SNT DIGIO_ AD AP<> DIGIO_ DIGIO_ UARTRX UARTTX AP<> P<> LTX P<> LTX P<> P<> NRX NTX NTX NRX P<> Size Document Number A Title Date: A B D F A B D F

23 hapter Revision History The table provides information about the major changes of the document versions. Date Version Description --. Initial release RUTD Rev.. --

24 Notice. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas lectronics products listed herein, please confirm the latest product information with a Renesas lectronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas lectronics such as that disclosed through our website.. Renesas lectronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas lectronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas lectronics or others.. You should not alter, modify, copy, or otherwise misappropriate any Renesas lectronics product, whether in whole or in part.. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas lectronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information.. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas lectronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. Renesas lectronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations.. Renesas lectronics has used reasonable care in preparing the information included in this document, but Renesas lectronics does not warrant that such information is error free. Renesas lectronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein.. Renesas lectronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas lectronics product depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas lectronics product before using it in a particular application. You may not use any Renesas lectronics product for any application categorized as "Specific" without the prior written consent of Renesas lectronics. Further, you may not use any Renesas lectronics product for any application for which it is not intended without the prior written consent of Renesas lectronics. Renesas lectronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas lectronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas lectronics. The quality grade of each Renesas lectronics product is "Standard" unless otherwise expressly specified in a Renesas lectronics data sheets or data books, etc. "Standard": omputers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots. "High Quality":Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti- crime systems; safety equipment; and medical equipment not specifically designed for life support. "Specific": Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life.. You should use the Renesas lectronics products described in this document within the range specified by Renesas lectronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas lectronics shall have no liability for malfunctions or damages arising out of the use of Renesas lectronics products beyond such specified ranges. RUTD Rev.. --

25 . Although Renesas lectronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas lectronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas lectronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you.. Please contact a Renesas lectronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas lectronics product. Please use Renesas lectronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the U RoHS Directive. Renesas lectronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations.. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas lectronics.. Please contact a Renesas lectronics sales office if you have any questions regarding the information contained in this document or Renesas lectronics products, or if you have any other inquiries. (Note ) "Renesas lectronics" as used in this document means Renesas lectronics orporation and also includes its majority-owned subsidiaries. (Note ) "Renesas lectronics product(s)" means any product developed or manufactured by or for Renesas lectronics. RUTD Rev.. --