64 bit Read Only ISO15693 Standard Compliant Contactless Identification Device

Transcription

1 EM MICROELECTRONIC - MARIN SA EM bit Read Only ISO15693 Standard Compliant Contactless Identification Device General Description The EM4033 is a 64 bit Read Only CMOS integrated circuit intended for use in passive long-range applications. The IC is full compliant with the ISO/IEC15693 and ISO standards. Each device contains a 64 bit unique serial number, programmed during the production, which guarantees the uniqueness of each device. The read only memory offers 200 years data retention, tailored feature for long life-term asset applications such as archives and libraries. The chip's low current consumption offers many essential benefits such as long reading ranges and makes it a robust and reliable solution in harsh environments. Features Supports ISO15693 / ISO standards Operating Frequency: 13.56MHz ± 7kHz (ISM, world-wide licence free available) 200 years data retention Long read range IC offering high and reliable performances ISO/IEC anticollision algorithm allowing several tags within the reader field at the same time 64-bit Unique Identifier (UID) Quiet Storage feature to speed up inventory processes On-chip resonant capacitor: 23.5pF No external supply buffer capacitor needed -40 to +85 C temperature range Bonding pads optimised for flip-chip assembly Available on a 2 leads Plastic Package: EMDFN02 The EM4033 integrates an optimized command set thus supporting all mandatory, an optional and one custom command. The ISO15693 anticollision algorithm allows several tags to be simultaneously in operation within the field. The Advanced Quiet storage feature, implemented in the chip, speeds up the inventory processes, increasing in a meaningful way the item detection speed. Applications Laundry Long-term asset management Archives and collections Libraries Access Control and Ticketing IC Block Diagram Typical Operating Configuration C1 EM4033 C2 Fig. 1 L2 Lr Cr RECTIFIER VPOS C BUF R E G Vdd POWER MONITOR POR PCK L1 CLOCK EXTRACTOR RECEIVED CLOCK R O Memory AM DEMODULATOR PULSE LOGIC MODULATOR MOD LIMITER Fig. 2 Copyright 2012, EM Microelectronic-Marin SA 1

2 Definitions, abbreviations and symbols Terms and definitions Downlink communication tag to reader communication link Uplink communication reader to tag communication link Modulation index index equal to [a-b]/[a+b] where a and b are the peak and minimum signal amplitude respectively. Note: The value of the index may be expressed as a percentage. Subcarrier a signal of frequency fs used to modulate the carrier of frequency fc Byte a byte consists of 8 bits of data designated b1 to b8, from the most significant bit (MSB,b8) to the least significant bit (LSB,b1) Anticollision loop Algorithm used to prepare for and handle a dialogue between a VCD and one or more VICCs from several in its energising field. Absolute Maximum Ratings Parameter Symbol Conditions Supply Voltage V POS -0.3 to 7V Voltage at any other pin except L1,L2 V pin VSS-0.3 to 3.6V Storage temperature T store -55 to +125 C Maximum AC current induced on L1, L2 I coil_rms 50mA Electrostatic discharge 1) V ESD 2000V Table 1 Note 1: Human Body Model (HBM; 100pF, 1.5k Ohms) between L1 and L2. Stresses above these listed maximum ratings may cause permanent damages to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction. Abbreviations AFE Analog Front-End AFI Application family identifier ASK Amplitude shift keying CRC Cyclic redundancy check DSFID Data storage format identifier EOF End of frame LSB Least significant bit MSB Most significant bit PPM Pulse position modulation RF Radio frequency RFU Reserved for future use SOF Start of frame SUM Super User Memory SM System Memory VCD Vicinity coupling device (reader) VICC Vicinity integrated circuit card (tag) UID Unique identifier EM4033 Symbols a Carrier amplitude without modulation b Carrier amplitude when modulated fc Frequency of operating field (carrier frequency) fs Frequency of subcarrier Handling Procedures This device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the voltage range. Unused inputs must always be tied to a defined logic voltage level. Operating Conditions Parameter Symbol Min Max Unit AC peak current induced on I coilop 30 ma L1, L2 in operating conditions Operating temperature T op C Table 2 Electrical Characteristics Operating conditions (unless otherwise specified): V coi l= 4Vpp V SS = 0V f coil=13.56mhz Sine Wave T op=25 C Parameter Symbol Conditions Min. Typ. Max. Unit Resonance Capacitor f = MHz, C r pf U = 2 Vrms Quite Store Time 2) T qstore 3 s Table 3 Note 2: Typical value is not guaranteed. Quiet Store Time is sensitive to light. There has to be provided additional light shielding during packaging. Copyright 2012, EM Microelectronic-Marin SA 2

3 Timing Characteristics All timings are derived from the field frequency and are specified as a number of RF periods. EM4033 Parameter Symbol Min Max Unit 1 out of 256 mode Initialization Tinit RF periods Table 4 ISO15693 Functional Description 1. Initial dialogue for vicinity cards The dialogue between the VCD and the VICC (one or more VICCs may be present at the same time) is conducted through the following consecutive operations: Activation of the VICC by the RF operating field of the VCD VICC waits silently for a command from the VCD Transmission of a command by the VCD Transmission of a response by the VICC 3.1 Modulation Communications between the VCD and the VICC takes place using the modulation principle of ASK. Two modulation indexes are used, 10% and 100%. The VICC decodes both. The VCD determines which index is used. Depending on the choice made by the VCD, a "pause" will be created as described in Fig.3 Modulation of the carrier for 100% ASK These operations use the RF power transfer and communication signal interface specified in the following paragraphs and are performed according to the protocol defined in ISO/IEC Power transfer Power transfer to the VICC is accomplished by radio frequency via coupling antennas in the VCD and in the VICC. The RF operating field that supplies power to the VICC from the VCD is modulated for communication from the VCD to the VICC, as described in clause Frequency The frequency fc of the operating field is 13,56MHz ±7 khz. 2.2 Operating field The VCD is capable of powering any single reference VICC (defined in the test methods) at manufacturer s specified positions (within the operating volume). The VCD does not generate a field higher than the value specified in ISO/IEC (alternating magnetic field) in any possible VICC position. Test methods for determining the VCD operating field are defined in ISO/IEC Communications signal interface VCD to VICC For some parameters several modes have been defined in order to meet different international radio regulations and different application requirements. From the modes specified any data coding can be combined with any modulation. However, combination of 1 out of 256 coding and 100% ASK modulation is not recommended as it may lead to synchronisation problems. Regulatory wise, this combination do not have any benefit. The following combinations are recommended: 1 out of % ASK for FCC part 15 compliance 1 out of % ASK or 10% ASK for ETSI compliance Modulation of the carrier for 10% ASK Fig.3.a Fig.3.b Copyright 2012, EM Microelectronic-Marin SA 3

4 3.2 Data rate and data coding Data coding is implemented using pulse position modulation. Two data coding modes are supported by the VICC. The selection is made by the VCD and indicated to the VICC within the start of frame (SOF), as defined in chapter Data coding mode: 1 out of 256 The value of one single byte is represented by the position of one pause. The position of the pause on 1 of 256 successive time periods of 256/fc (~18,88 µs), determines the value of the byte. In this case the transmission of one byte takes ~4,833 ms and the resulting data rate is 1,65 kbits/s (fc /8192). The last byte of the frame is completely transmitted before the EOF is sent by the VCD Data coding mode: 1 out of 4 Pulse position modulation for 1 out of 4 mode is used, in this case the position determines two bits at a time. Four successive pairs of bits form a byte, where the least significant pair of bits is transmitted first. The resulting data rate is 26,48 kbits/s (fc /512). Fig. 6 illustrates the 1 out of 4 pulse position technique and coding. 1 out of 4 coding mode Fig. 4 illustrates this pulse position modulation technique. 1 out of 256 coding mode Fig. 4 In Fig 4, data 'E1' = ( )b = (225) is sent by the VCD to the VICC. The pause occurs during the second half of the position of the time period that determines the value, as shown in Fig 5. Detail of one time period Fig. 6 For example Fig. 7 shows the transmission of 'E1' = ( )b = 225 by the VCD. 1 out of 4 coding example Fig VCD to VICC frames Framing has been chosen for ease of synchronisation and independence of protocol. Fig. 5 Note 3: In case of usage of 1/256 coding with 100% modulation index, an accurate timing is needed to ensure proper decoding. Frames are delimited by a start of frame (SOF) and an end of frame (EOF) and are implemented using code violation. Unused options are reserved for future use by ISO/IEC. The VICC is ready to receive a frame from the VCD within 300 s after having sent a frame to the VCD. The VICC is ready to receive a frame within Tinit of activation by the powering field. ISO defines 1 ms Copyright 2012, EM Microelectronic-Marin SA 4

5 3.3.1 SOF to select 1 out of 256 code The SOF sequence described in Fig. 8 selects the 1 out of 256 data coding mode. Start of frame of the 1 out of 256 mode Fig SOF to select 1 out of 4 code The SOF sequence described in Fig. 9 selects the 1 out of 4 data coding mode. Start of frame of the 1 out of 4 mode Fig EOF for either data coding mode The EOF sequence for either coding mode is described in Fig.. End of frame for either mode When two subcarriers are used, the frequency fs1 is fc /32 (423,75 khz), and the frequency fs2 is fc /28 (484,28 khz). If two subcarriers are present there is a continuous phase relationship between them. 4.3 Data rates A low or high data rate may be used. The selection of the data rate is made by the VCD using the second bit in the protocol header as defined in Table 6. The VICC supports the data rates shown in Table 5. Data Rate Single Subcarrier Dual Subcarrier Low 6,62 kbits/s ( fc /2048) 6,67 kbits/s ( fc /2032) High 26,48 kbits/s ( fc /512) 26,69 kbits/s ( fc /508) Table Bit representation and coding Data are encoded using Manchester coding, according to the following schemes. All timings shown refer to the high data rate from the VICC to the VCD. For the low data rate the same subcarrier frequency or frequencies are used, in this case the number of pulses and the timing is multiplied by Bit coding when using one subcarrier A logic 0 starts with 8 pulses of fc /32 (~423,75 khz) followed by an unmodulated time of 256/ fc (~18,88 µs), see Fig. 11. Logic 0 Fig Communications signal interface VICC to VCD For some parameters several modes have been defined in order to, allow for use in different noise environments and application requirements. 4.1 Load modulation The VICC is capable of communication to the VCD via an inductive coupling area whereby the carrier is loaded to generate a subcarrier with frequency fs. The subcarrier is generated by switching a load in the VICC. The load modulation amplitude is at least 10 mv when measured as described in the test methods. Test methods for VICC load modulation are defined in International Standard ISO/IEC Fig. 11 A logic 1 starts with an unmodulated time of 256/ f c (~18,88µs) followed by 8 pulses of f c /32 (~423,75 khz), see Fig. 12. Logic 1 Fig Subcarrier One or two subcarriers may be used as selected by the VCD using the first bit in the protocol header as defined in Table 5. The VICC supports both modes. When one subcarrier is used, the frequency f s1 of the subcarrier load modulation is fc /32 (423,75 khz). Copyright 2012, EM Microelectronic-Marin SA 5

6 4.4.2 Bit coding when using two subcarriers A logic 0 starts with 8 pulses of f c /32 (~423,75 khz) followed by 9 pulses of f c /28 (~484,28 khz),see Fig. 13. Start of frame when using one subcarrier Logic 0 Fig. 13 A logic 1 starts with 9 pulses of f c /28 (~484,28 khz) followed by 8 pulses of f c /32 (~423,75 khz), see Fig. 14. Fig SOF when using two subcarriers SOF comprises 3 parts: 27 pulses of f c /28 (~484,28 khz). 24 pulses of f c /32 (~423,75 khz). a logic 1 which starts with 9 pulses of f c /28 (~484,28 khz) followed by 8 pulses of f c /32 (~423,75 khz). The SOF for 2 subcarriers is illustrated in Fig. 16. Start of frame when using two subcarriers Logic 1 Fig. 16 Fig VICC to VCD frames Framing has been chosen for ease of synchronisation and independence of protocol. Frames are delimited by a start of frame (SOF) and an end of frame (EOF) and are implemented using code violation. Unused options are reserved for future use by the ISO/IEC EOF when using one subcarrier EOF comprises 3 parts: a logic 0 which starts with 8 pulses of fc /32 (~423,75 khz), followed by an unmodulated time of 256/ fc (~18,88 µs). 24 pulses of fc /32 (~423,75 khz). an unmodulated time of 768/ fc (~56,64 µs). The EOF for 1 subcarrier is illustrated in Fig. 17. End of frame when using one subcarrier All timings shown below refer to the high data rate from the VICC to the VCD. For the low data rate the same subcarrier frequency or frequencies are used, in this case the number of pulses and the timing is multiplied by 4. The VCD is ready to receive a frame from the VICC within 300 s after having sent a frame to the VICC SOF when using one subcarrier SOF comprises 3 parts: an unmodulated time of 768/ f c (~56,64 µs). 24 pulses of f c /32 (~423,75 khz). a logic 1 which starts with an unmodulated time of 256/ f c (~18,88 µs), followed by 8 pulses of f c /32 (~423,75 khz). Fig EOF when using two subcarriers EOF comprises 3 parts: a logic 0 which starts with 8 pulses of f c /32 (~423,75 khz) followed by 9 pulses of f c /28 (~484,28 khz). 24 pulses of f c /32 (~423,75 khz). 27 pulses of f c /28 (~484,28 khz). The EOF for 2 subcarriers is illustrated in Fig. 18. End of frame when using 2 subcarriers The SOF for one subcarrier is illustrated in Fig. 15. Fig. 18 Copyright 2012, EM Microelectronic-Marin SA 6

7 5. Definition of data elements 5.1 Unique identifier (UID) The VICCs are uniquely identified by a 64 bit unique identifier (UID). This unique number is used for addressing each VICC uniquely and individually, during the anticollision loop and for one-to-one exchange between a VCD and a VICC (addressed mode). The UID is set permanently by the IC manufacturer in accordance with Figure below: UID format MSB E0 IC Mfg Code IC manufacturer serial number LSB Upon reception of a request from the VCD, the VICC verifies that the CRC value is valid. If it is invalid, it will discard the frame and will not answer (modulate). Upon reception of a response from the VICC, it is recommended that the VCD verify that the CRC value is valid. If it is invalid, actions to be performed are left to the responsibility of the VCD designer. The CRC is transmitted least significant byte first. Each byte is transmitted least significant bit first. CRC bits and bytes transmission rules LSByte MSByte LSBit MSBit LSBit MSBit CRC 16 (8 bits) CRC 16 (8 bits) first transmitted bit of the CRC 1 bit CAP 5 bit IC Id 4 bit UID CRC 6 bit Customer Id 32 bit Unique Serial Number (UID) Fig. 19 The UID comprises: The 8 MSB bits are 'E0' value according to ISO/IEC15693 standard The IC manufacturer code, on 8 bits according to ISO/IEC EM-Microelectronic Marin is identified by code 0x16. A unique serial number on 48 bits assigned by the IC manufacturer. Note 4: The 48 bits of IC manufacturer serial number are composed by: 1 bit capacitor value (CAP), set to a 0 value which corresponds to a resonant capacitor of 23.5pF 5 bit IC code (IC id), different for each member of EM ISO family, set to a value of 0x08 4 bit UID CRC. Calculated over the 32 bit of the unique serial number (UID) using an enhanced CRC mechanism 6 bit Customer Id 32 bit unique serial number (UID). 5.2 Application family identifier (AFI) EM4033 does not support AFI feature. 5.3 Data Storage identifier (DSFID) EM4033 does not support DSFID feature. The EM4033 responds with a zero value ( 00 ). 5.4 Block security status EM4033 does not support the block security status feature. 5.5 CRC The CRC is calculated in accordance with ISO/IEC Information on how to calculate the CRC can be found in annex C of ISO/IEC document. The initial register content is all ones: 'FFFF'. The two bytes CRC are appended to each request and each response, within each frame, before the EOF. The CRC is calculated on all the bytes after the SOF up to but not including the CRC field. 6. Overall protocol description Fig Protocol concept The transmission protocol (or protocol) defines the mechanism to exchange instructions and data between the VCD and the VICC, in both directions. It is based on the concept of "VCD talks first". This means that any VICC does not start transmitting (i.e. modulating according to ISO/IEC ) unless it has received and properly decoded an instruction sent by the VCD. a) Protocol based on an exchange of a request from the VCD to the VICC a response from the VICC(s) to the VCD The conditions under which the VICC sends a response are defined in clause 9.1. b) each request and each response are contained in a frame. The frame delimiters (SOF, EOF) are specified in 3.3. c) each request consists of the following fields: Flags Command code Mandatory and optional parameters fields, depending on the command Application data fields CRC d) each response consists of the following fields: Flags Mandatory and optional parameters fields, depending on the command Application data fields CRC Copyright 2012, EM Microelectronic-Marin SA 7

8 e) the protocol is bit-oriented. The number of bits transmitted in a frame is a multiple of eight (8), i.e. an integer number of bytes. f) a single-byte field is transmitted least significant bit (LSBit) first. g) a multiple-byte field is transmitted least significant byte (LSByte) first, each byte is transmitted least significant bit (LSBit) first. h) the setting of the flags indicates the presence of the optional fields. When the flag is set (to one), the field is present. When the flag is reset (to zero), the field is absent. i) RFU flags are set to zero (0). 6.2 Modes The term mode refers to the mechanism to specify in a request the set of VICC s that answers to the request Addressed mode When the Address_flag is set to 1 (addressed mode), the request contains the unique ID (UID) of the addressed VICC. Any VICC receiving a request with the Address_flag set to 1 compares the received unique ID (address) to its own ID. If it matches, it executes it (if possible) and returns a response to the VCD as specified by the command description. If it does not match, it remains silent Non-addressed mode When the Address_flag is set to 0 (non-addressed mode), the request does not contain a unique ID. Any VICC receiving a request with the Address_flag set to 0 executes it (if possible) and returns a response to the VCD as specified by the command description. If tag detects an error in received message (incorrect flags, out of memory, etc.) it remains silent and doesn t respond to the VCD interrogation Select mode EM4033 does not support Select mode. 6.3 Request format The request consists of the following fields: Flags Command code (see clause 9) Parameters and data fields CRC (see 5.5) Request flags In a request, the field "flags" specifies the actions to be performed by the VICC and whether corresponding fields are present or not. It consists of eight bits. Request flags 1 to 4 definition Bit Flag name Value Description A single sub-carrier 0 frequency is used by the b1 Sub-carrier_flag VICC Two sub-carriers are 1 used by the VICC 0 Low data rate is used b2 Data_rate_flag 1 High data rate is used Flags 5 to 8 meaning is 0 according to Table 7 b3 Inventory_flag Flags 5 to 8 meaning is 1 according to Table 8 No protocol format 0 extension Protocol b4 Protocol format is Extension_flag 1 extended. Reserved for future use Table 6 Note 5: Note 6: Sub-carrier_flag refers to the VICC-to-VCD communication as specified in 4.3. Data_rate_flag refers to the VICC-to-VCD communication as specified in 4.3. Request flags 5 to 8 definition when inventory flag is NOT set Bit Flag name Value Description b5 Select_flag 0 EM4033 does not support Select feature. If this flag is set EM4033 will not respond 0 Request is not addressed. UID field is not included. It is Executed by any VICC b6 Address_flag 1 Request is addressed. UID field is included. It is executed only by the VICC whose UID matches the UID specified in the request Meaning is defined by the command description. It is 0 set to 0 if not otherwise b7 Option_flag defined by the command 1 Meaning is defined by the command description b8 RFU 0 Table 7 General request format SOF Flags Command code Parameters Data CRC EOF Fig. 21 Copyright 2012, EM Microelectronic-Marin SA 8

9 Request flags 5 to 8 definition when inventory flag is set Bit Flag name Value Description EM4033 does not support AFI feature. If this bit is set b5 AFI_flag 0 EM4033 does not respond to Inventory command 0 16 slots b6 Nb_slots_flag 1 1 slot Meaning is defined by the command description. It is 0 set to 0 if not otherwise b7 Option_flag defined by the command Meaning is defined by the 1 command description b8 RFU Response format The response consists of the following fields: Flags one or more parameter fields Data CRC General response format SOF Flags Parameters Data CRC EOF Table 8 Fig Response flags In a response, it indicates how actions have been performed by the VICC and whether corresponding fields are present or not. Response flags 1 to 8 definition Bit Flag name Value Description b1 Error_flag b2 RFU 0 b3 RFU 0 b4 Extension_flag b5 RFU 0 b6 RFU 0 b7 RFU 0 b8 RFU 0 0 No error Not supported. A 0 value is always reported by the EM4033 No protocol format extension Protocol format is extended. Reserved for future use. Table Response error code If an error occurs, the EM4033 remains silent and does not respond to the VCD interrogation. EM4033 does not support error codes. There is no response from VICC: when Select or AFI flag is set when CRC error is detected when wrong flags are set in Inventory when command was sent in non-addressed mode when RFU or Protocol Extension flag is set 6.5 VICC states A VICC can be in one of the 4 following states: Power-off Ready Quiet Quiet Storage The transition between these states is specified in Fig. 23. EM4033 supports mandatory power-off, ready and quiet states Power-off state The VICC is in the power-off state when it cannot be activated by the VCD Ready state The VICC is in the Ready state when it is activated by the VCD. It processes any request where the select flag is not set Quiet state When in the quiet state, the VICC processes any request where the Inventory_flag is not set and where the Address_flag is set. Reset To Ready command is accepted and executed also with address flag cleared Quiet Storage state When Tagged items are moving on a conveyor, the position and orientation of the attached Tags are uncontrolled. In order for the conveyor Interrogator to power and communicate with Tags independent of Tag position and orientation it could generate an Interrogator field that is switched cyclically between the X, Y and Z direction orthogonal axes. A consequence of cycling the field is that Tags periodically lose power. Special regard shall been given to management of power outages arising from the operation of orientation insensitive Interrogators. For example, where multiple Tags are being identified there is a requirement for identified Tags to be temporarily silenced so as not to interfere with the identification of any remaining Tags. During these power outages ISO Quiet state could be lost. EM4033 supports a proprietary state called Quiet Storage which is kept during short power outages. Quite Storage state is entered by sending command Quiet Storage having a similar syntax as ISO Stay Quiet. It has also the same behaviour as ISO Quiet State except: it is kept for Quiet Store Time when power is lost it could be released by Reset To Ready command with or without UID The second feature allows to user release all tags in Quiet Storage state at once by only one command. Copyright 2012, EM Microelectronic-Marin SA 9

10 VICC state transition diagram Power-Off Out of field Reset to ready Stay Quiet (UID) Out of field Ready In Field Any other command where Select_flag is not set Quiet Storage (UID) Reset to ready Out of field for Quiet Store Time Quiet Quiet Storage (UID) Quiet Storage Stay quiet (UID) Any other command where the Address_flag is set AND wher Inventory_flag is not set Any other command where the Address_flag is set AND wher Inventory_flag is not set Note 7: The VICC state transition diagram shows only valid transitions. In all other cases the current VICC state remains unchanged. When the VICC cannot process a VCD request (e.g. CRC error, etc.), it stays in its current state. Fig Anticollision The purpose of the anticollision sequence is to make an inventory of the VICCs present in the VCD field by their unique ID (UID). The VCD is the master of the communication with one or multiple VICCs. It initiates card communication by issuing the inventory request. The VICC sends its response in the slot determined or does not respond, according to the algorithm described in clause Explanation of an anticollision sequence Fig.24 summarises the main cases that can occur during a typical anticollision sequence where the number of slots is 16. The different steps are: a) the VCD sends an inventory request, in a frame, terminated by a EOF. The number of slots is 16. b) VICC 1 transmits its response in slot 0. It is the only one to do so, therefore no collision occurs and its UID is received and registered by the VCD; c) the VCD sends an EOF, meaning to switch to the next slot. d) in slot 1, two VICCs 2 and 3 transmits their response, this generates a collision. The VCD detects it and remembers that a collision was detected in slot 1. e) the VCD sends an EOF, meaning to switch to the next slot. f) in slot 2, no VICC transmits a response. Therefore the VCD does not detect a VICC SOF and decides to switch to the next slot by sending a EOF. g) in slot 3, there is another collision caused by responses from VICC 4 and 5 h) the VCD then decides to send an addressed request (for instance a Read Block) to VICC 1, which UID was already correctly received. i) all VICCs detect a SOF and exit the anticollision sequence. They process this request and since the request is addressed to VICC 1, only VICC1 transmit its response. j) all VICCs are ready to receive another request. If it is an inventory command, the slot numbering sequence restarts from 0. Note 8: The decision to interrupt the anticollision sequence is up to the VCD. It could have continued to send EOF s till slot 15 and then send the request to VICC 1. Copyright 2012, EM Microelectronic-Marin SA 10

11 Description of a possible anticollision sequence Slot 0 VCD SOF Inventory request EOF EOF VICCs Response 1 Timing t1 t2 t1 Comment No collision Time Continued Slot 1 Slot 2 Slot 3 VCD EOF EOF VICCs Response 2 Response 4 Response 3 Response 5 Timing t1 t3 t1 Comment Collision No VICC response Time Collision Continued VCD SOF Request to VICC 1 EOF VICCs Response from VICC1 Timing t2 t1 Comment Time Fig. 24 Note 9: t1, t2 and t3 are specified in clause 8.1. Copyright 2012, EM Microelectronic-Marin SA 11

12 Request processing by the VICC Principle of comparison between the mask value, slot number and UID The Inventory request contains the mask value and its length. The mask is padded with 0 s to a whole number of bytes. Padding The mask value less the padding is loaded into comparator. Mask value received in Inventory request Mask length Upon reception of the Inventory request, the VICC resets its slot counter to 0 Upon reception of an EOF, the VICC increments its slot counter and loads it into the comparator, concatenated with the mask value (less padding) Slot counter The concatenated result is compared with the least significant bits of the VICC UID. If it matches, the VICC shall transmit its response, according to the other criteria (e.g. AFI, Quiet state). Slot number Mask value(less padding) Ignore Compare Unique identifier (UID) Fig. 25 Copyright 2012, EM Microelectronic-Marin SA 12

13 Note 10: When the slot number is 1 (Nb_slots_Flag is set to 1), the comparison is made only on the mask (without padding). Upon reception of a valid request, the VICC processes it by executing the operation sequence specified in the following text. The step sequence is also graphically represented in Fig. 5. NbS is the total number of slots (1 or 16) SN is the current slot number (0 to 15) SN_length is set to 0 when 1 slot is used and set to 4 when 16 slots are used LSB (value, n) function returns the n least significant bits of value "&" is the concatenation operator Slot_Frame is either a SOF or an EOF SN= 0 if Nb_slots_flag then NbS =1 SN_length=0 else NbS = 16 SN_length=4 endif label1: if (LSB(UID,SN_length+Mask_length)=LSB(SN,SN_length)& LSB(Mask,Mask_length)) then transmit response to inventory request endif wait (Slot_Frame) if Slot_Frame= SOF then Stop anticollision and decode/process request exit endif if SN<NbS-1 then SN = SN +1 goto label1 exit endif 7.2 Request parameters When issuing the Inventory command, the VCD sets the Nb_slots_flag to the desired setting and add after the command field the mask length and the mask value. The mask length indicates the number of significant bits of the mask value. It can have any value between 0 and 60 when 16 slots are used and any value between 0 and 64 when 1 slot is used. LSB is transmitted first. The mask value is contained in an integer number of bytes. LSB is transmitted first. The next field starts on the next byte boundary. Inventory request format SOF Flags Command Mask length Mask Value 8 bits 8 bits 8 bits 0 to 8 bytes Example of the padding of the mask Pad Mask value Fig. 27 CRC bits EOF Fig. 26 In the example of the Fig., the mask length is 12 bits. The mask value MSB is padded with four bits set to 0. To switch in next slot, an EOF has to be sent from a Reader. Any pulse with minimal specified width is considered as EOF in anti-collision sequence. The first slot starts immediately after the reception of the request EOF. To switch to the next slot, the VCD sends an EOF. The rules, restrictions and timing are specified in clause Timing specifications The VCD and the VICC comply with the following timing specifications. 8.1 VICC waiting time before transmitting its response after reception of an EOF from the VCD When the VICC has detected an EOF of a valid VCD request or when this EOF is in the normal sequence of a valid VCD request, it waits for a time t1 before starting to transmit its response to a VCD request or before switching to the next slot when in an inventory process. t1 starts from the detection of the rising edge of the EOF received from the VCD (see 3.3.3). Note 11: The synchronisation on the rising edge of the VCD-to- VICC EOF is needed for ensuring the required synchronisation of the VICC responses. The minimum value of t1 is t1min= 4320/fc (318,6 µs) The nominal value of t1 is t1nom= 4352/fc (320,9 µs) The maximum value of t1 is t1max= 4384/fc (323,3 µs) t1 max does not apply for Write alike requests. Timing conditions for Write alike requests are defined in the command descriptions. If the VICC detects a 100% carrier modulation during this time t1, it resets its t1 timer and waits for a further time t1 before starting to transmit its response to a VCD request or to switch to the next slot when in an inventory process. If the mask length is not a multiple of 8 (bits), the mask value MSB is padded with the required number of null (set to 0) bits so that the mask value is contained in an integer number of bytes. Copyright 2012, EM Microelectronic-Marin SA 13

14 8.2 VICC modulation ignore time after reception of an EOF from the VCD When the VICC has detected an EOF of a valid VCD request or when this EOF is in the normal sequence of a valid VCD request, it ignores any received 10 % modulation during a time t mit. t mit starts from the detection of the rising edge EOF received from the VCD. The minimum value of t mit is t mit tmin = 4384/fc (323,3 µs) + t nrt where t nrt is the nominal response time of a VICC. t nrt is dependent on the VICC-to-VCD data rate and subcarrier modulation mode. Note 12: The synchronisation on the rising edge of the VCD-to- VICC EOF is needed for ensuring the required synchronisation of the VICC responses. 8.3 VCD waiting time before sending a subsequent request Remark: This chapter refers to VCD only. a) When the VCD has received a VICC response to a previous request other than Inventory and Quiet, it waits a time t2 before sending a subsequent request. t2 starts from the time the EOF has been received from the VICC. b) When the VCD has sent a Quiet request (which causes no VICC response), it waits a time t2 before sending a subsequent request. t2 starts from the end of the Quiet request EOF (rising edge of the EOF plus 9,44 µs). The minimum value of t2 is t2min = 4192/fc (309,2 µs). Note 13: This ensures that the VICCs are ready to receive this subsequent request. Note 14: The VCD should wait at least 1 ms after it activated the powering field before sending the first request, to ensure that the VICCs are ready to receive it.. c) When the VCD has sent an Inventory request, it is in an inventory process. 8.4 VCD waiting time before switching to the next slot during an inventory process Remark: This chapter refers to VCD only When the VCD has started to receive one or more VICC responses Remark: This chapter refers to VCD only. During an inventory process, when the VCD has started to receive one or more VICC responses (i.e. it has detected a VICC SOF and/or a collision), it: waits for the complete reception of the VICC responses (i.e. when a VICC EOF has been received or when the VICC nominal response time t nrt has elapsed), waits an additional time t2 and then sends a 10 % or 100 % modulated EOF to switch to the next slot. t2 starts from the time the EOF has been received from the VICC. The minimum value of t2 is t2min = 4192/fc (309,2 µs). t nrt is dependent on the VICC-to-VCD data rate and subcarrier modulation mode When the VCD has received no VICC response Remark: This chapter refers to VCD only. During an inventory process, when the VCD has received no VICC response, it waits a time t3 before sending a subsequent EOF to switch to the next slot. t3 starts from the time the VCD has generated the rising edge of the last sent EOF. a) If the VCD sends a 100 % modulated EOF, the minimum value of t3 is t3min = 4384/fc (323,3 µs) + t sof b) If the VCD sends a 10 % modulated EOF, the minimum value of t3 is where t3min = 4384/fc (323,3 µs) + t nrt t sof is the time duration for a VICC to transmit an SOF to the VCD. t nrt is the nominal response time of a VICC. t nrt and t sof are dependent on the VICC-to-VCD data rate and subcarrier modulation mode. An inventory process is started when the VCD sends an Inventory request. (see 0, 7.1, 9.3.1), To switch to the next slot, the VCD may send either a 10 % or a 100 % modulated EOF independent of the modulation index it used for transmitting its request to the VICC, after waiting a time specified in and Copyright 2012, EM Microelectronic-Marin SA 14

15 Sub-carrier Data rate Inventory Protocol ext. Select Addressed Option RFU Sub-carrier Data rate Inventory Protocol ext. Select Addressed Option RFU EM Commands 9.1 Command types Three sets of commands are defined: mandatory, optional, and custom. All VICCs with the same IC manufacturer code and same IC version number behave the same. Inventory request format SOF Flags Inventory Mask length Mask value CRC 16 8 bits 8 bits 8 bits 0-64 bits 16 bits EOF Fig Command codes Table 10 shows all implemented commands in EM4033. Command codes Command Code Type Function Active Flags b1 b2 B3 b4 B5 b6 b7 b8 01 Mandatory Inventory x x x Mandatory Stay Quiet x x Optional Reset to x x x 0 0 ready AA Custom Quiet Storage x x The response contains: The DSFID DSIFD feature is not supported by EM4033, zero value is returned The unique ID number If the VICC detects an error, it remains silent. Inventory response format SOF Flags DSFID UID CRC 16 EOF 8 bits 8 bits 64 bits 16 bits Fig Stay quiet Command Table 10 x means used flag, can be 0 or 1. The EM4033 remains silent for the erroneous and nonsupported commands. 9.3 Mandatory commands Command Code Type Function Active Flags b1 b2 B3 b4 B5 b6 b7 b8 01 Mandatory Inventory x x x Mandatory Stay Quiet x x When receiving the Stay quiet command, the VICC enters the quiet state and does not send back a response. There is NO response to the Stay quiet command. When in quiet state: the VICC does not process any request where Inventory_flag is set, the VICC processes any addressed request The VICC exits the quiet state when: reset (power off), receiving a Reset to ready request with UID. It goes then to the Ready state. receiving a Quiet Storage request. It goes then to Quiet Storage state. Stay quiet request format Inventory Command Table 11 SOF Flags Stay quiet UID CRC 16 EOF 8 bits 8 bits 64 bits 16 bits Fig. 30 When receiving the Inventory request, the VICC performs the anticollision sequence. The request contains: The flags, The Inventory command code The mask length The mask value The CRC Request parameter: UID (mandatory) The Stay quiet command is always executed in Addressed mode (Address_flag is set to 1). The Inventory_flag is set to 1. The meaning of flags 5 to 8 is according to Table 8. Copyright 2012, EM Microelectronic-Marin SA 15

16 Sub-carrier Data rate Inventory Protocol ext. Select Addressed Option RFU Sub-carrier Data rate Inventory Protocol ext. Select Addressed Option RFU EM Optional Commands supported by EM4033 Command Code 26 Optional Type Function Active Flags Reset to ready b1 b2 B3 b4 b5 b6 b7 b8 x x x 0 0 Quiet Storage Command When receiving the Quiet Storage command, the VICC enters the Quiet Storage state and does not send back a response. There is NO response to the Stay quiet command. When in Quiet Storage state: Reset to ready Command Table 12 When receiving a Reset to ready command, the VICC shall return to the Ready state. Reset to ready request format the VICC does not process any request where Inventory_flag is set, the VICC processes any addressed request The VICC exits the Quiet Storage state when: after Quite Store Time in reset (power off), receiving a Reset to ready request with or without UID. It goes then to the Ready state. receiving a Quiet State request with UID. It goes then to Quiet State SOF Flags Reset to ready UID CRC 16 EOF 8 bits 8 bits 64 bits 16 bits Fig. 31 Quiet Storage request format SOF Flags Quiet Storage IC Manufacturer code UID CRC 16 EOF Request parameter: UID (optional) 8 bits 8 bits 8 bits 64 bits 16 bits Fig. 33 Reset to Ready response format SOF Flags CRC16 EOF 8 bits 16 bits Fig Custom commands Request parameters: UID (Mandatory) IC Manufacturer code, 0X16 for EM Microelectronic The Quiet Storage command is always executed in Addressed mode (Address_flag is set to 1). Command Code Type Function Active Flags b1 b2 B3 b4 b5 b6 b7 b8 AA Custom Quiet Storage x x Table 13 Copyright 2012, EM Microelectronic-Marin SA 16

17 10. IC Chip Floorplan EM Y X 725 Pad size : 68 X 68 All dimensions in m Fig.34 Pin description Pin Name I/O Description 1 COIL2 ANA Antenna terminal 2 COIL1 ANA Antenna terminal 3 TEST_IO I/O Test purposes (disconnected when wafer is sawn) 4 TEST_IO I/O Test purposes (disconnected when wafer is sawn) Table 14 Copyright 2012, EM Microelectronic-Marin SA 17

18 11. Packaging information leads Plastic Package: EMDFN-02 Fig Package mechanical dimensions: A D E B l1 l2 Size Tolerance Table 15 Note: all dimensions in mm. Copyright 2012, EM Microelectronic-Marin SA 18

19 12. Ordering Information For wafer form delivery format, please, refer to EM4033 wafer specification document DIE Form: EM4033 WW 6 E - %%% Circuit Name: EM4033 Customer version: Bumping: (blank) = no bumps E = with Gold Bumps Die Form: WW = Unsawn Wafer WS = Sawn Wafer / Frame Thickness: 6 = 6 mils (152 um) 7 = 7 mils (178 um) 11 = 11 mils (280 um) Fig Standard Versions: The versions below are considered standards and should be readily available. For the other delivery form, please contact EM Microelectronic-Marin S.A. Please make sure to give the complete part number when ordering. Part Number Package / Die Form Delivery form / Bumping EM4033WW6 Unsawn wafer, 6 mils thickness No bump EM4033WS6E Sawn wafer, 6 mils thickness Gold bump EM4033DF2C+ 2 leads Plastic Package - EMDFN-02 Package Table 16 EM Microelectronic-Marin SA ( EM ) makes no warranties for the use of EM products, other than those expressly contained in EM's applicable General Terms of Sale, located at EM assumes no responsibility for any errors which may have crept into this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property rights of EM are granted in connection with the sale of EM products, neither expressly nor implicitly. In respect of the intended use of EM products by customer, customer is solely responsible for observing existing patents and other intellectual property rights of third parties and for obtaining, as the case may be, the necessary licenses. Important note: The use of EM products as components in medical devices and/or medical applications, including but not limited to, safety and life supporting systems, where malfunction of such EM products might result in damage to and/or injury or death of persons is expressly prohibited, as EM products are neither destined nor qualified for use as components in such medical devices and/or medical applications. The prohibited use of EM products in such medical devices and/or medical applications is exclusively at the risk of the customer Copyright 2012, EM Microelectronic-Marin SA 19