Short protection circuit Various Dimming Control

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1 Ordering number : ENA2132 LV5029MD Bi-CMOS IC LED Driver IC for LED Lighting Overview LV5029MD is a High voltage LED drive ctroller which drives LED current with external MOSFE. LV5029MD is realized very simple LED circuits with a few external parts. It correspds to active power factor corrector ctrol. Note) his LV5029MD is designed or developed for general use or csumer appliance. herefore, it is NO permitted to use for automotive, communicati, office equipment, and industrial equipment. Functis High voltage LED ctroller Short protecti circuit Various Dimming Ctrol Selectable reference Voltage -Analog Input & PWM Input -Internal 0.605V & External Input Voltage Selectable Switching frequency Low noise switching system/skip frequency functi [50 khz or 70 khz, open: 50 khz] - 5 stages skip mode Frequency Built-in overvoltage detecti of pin. - Soft driving Built-in active power factor corrector. Specificatis Maximum Ratings at a = 25 C Parameter Symbol Cditis Ratings Unit Maximum input voltage V IN max (Note1) -0.3 to 42 V REF_OU,, R,, PWM_D -0.3 to 7 V OU pin V OU _abs -0.3 to 42 V Allowable power dissipati Pd max With specified board* 1.0 W Juncti temperature j C Operating juncti temperature opj (Note2) -30 to +125 C Storage temperature stg -40 to + C *1 Specified board: 58.0mm 54.0mm 1.6mm (glass epoxy board) Note1) Absolute maximum ratings represent the values which cannot be exceeded for any length of time. Note2) Even when the device is used within the range of absolute maximum ratings, as a result of ctinuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please ctact us for the further details. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings ly. Functial operati above the Recommended Operating Cditis is not implied. Extended exposure to stresses above the Recommended Operating Cditis may affect device reliability. Semicductor Compents Industries, LLC, 2013 August, 2013 O0312NK S00012 No.A2132-1/15

2 Recommended Operating Cditis at a = 25 C LV5029MD Parameter Symbol Cditis Ratings Unit Input voltage V IN 8.5 to 24 V * Note : supply the stabilized voltage. Electrical Characteristics at a = 25 C, = 12V, unless otherwise specified. Ratings Parameter Symbol Cditis Unit min typ max Reference voltage block Built-in reference voltage VREF V VREF V IN line regulati VREF_LN V IN = 8.5 to 24V ±0.5 % Reference output voltage REFOU I REFOU = 0.5mA 3.0 V - Maximum load REFOU_MAX 0.5 ma - equivalent output impedance REFOU_RO 10 Ω Under voltage lockout Operati start Input voltage UVLOON V Operati stop input voltage UVLOOFF V Hysteresis voltage UVLOH 1.7 V Oscillati Frequency FOSC1 R =OPEN khz FOSC2 R = REF_OU khz FOSC1 Switch voltage V OSC V FOSC2 Switch voltage V OSC V Maximum ON duty MAXDuty 93 % Comparator Input offset voltage V IO _VR 1 10 mv (Between and VREF) Input offset voltage V IO _RI 1 10 mv (Between and REFIN) Input current I IO SC 160 na I IO REF 80 na pin max voltage VOM 1 V malfuncti preventi mask MSK ns time PWM_D circuit OFF voltage V OFF 2 5 V ON voltage V ON V hermal protecti circuit hermal shutdown temperature SD *Design guarantee 165 C hermal shutdown hysteresis ΔSD *Design guarantee 30 C Drive Circuit OU sink current I O I ma OU source current I O O 120 ma Minimum On time MIN ns Ctinued next page. No.A2132-2/15

3 Ctinued from preceding page. Ratings Parameter Symbol Cditis Unit min typ max V IN current UVLO mode V IN current I IN OFF V IN < UVLOON μa Normal mode V IN current I IN ON V IN > UVLOON, OU = OPEN 0.8 ma V IN over voltage protecti circuit V IN over voltage protecti V IN OVP V voltage V IN current at OVP I IN OVP V IN = 30V ma terminal abnormal sensing circuit Abnormal sensing voltage OCP 1.9 V *: Design guarantee (value guaranteed by design and not tested before shipment) Package Dimensis unit: mm (typ) 3426A MAX SANYO : SOIC10 Allowable power dispati, Pd max - W Pd max -- a Spesified board: mm 3 glass epoxy board Ambient temperature, a - C Pin Assignment R REF_OU PWM_D LV5029 **** (NC) OU No.A2132-3/15

4 Block Diagram LV5029MD REF_OU 8 2 3V 0.605V Built-in Regulator Reference Voltage SD UVLO OVP Current Limit Comparator Oscillator S R Q 7 OU Short Protecti Circuit 10 9 (NC) 1 R 5 PWM_D 6 Sample Applicati Circuit N isolati Isolati No.A2132-4/15

5 Pin Functis LV5029MD Pin No. Pin name Pin functi Equivalent circuit 1 R Switching frequency selecti pin. L or Open : 50kHz switching, H: 70 khz switching. In case of 70kHz, cnect to R pin to REFOU pin. time VREF-OU (3V typ) R 1kΩ 2 REF_OU Built-in 3V Regulate out Pin. If this functi isn t used, please cnect to nothing. VREF-OU (3V typ) 3 External LED current Limit Setting pin. If less than VREF (0.61V) voltage is input, Peak current value is used at the input voltage. If more than voltage is input, it is de at VREF voltage. If this functi isn t used, please cnect nothing. 4 LED current sensing in. If this terminal voltage exceeds VREF (Or ), external FE is OFF. And if the voltage of the terminal exceeds 1.9V, LV5029MD turns to latch-off mod 5 PWM_D PWM Dimming pin. L or open: normal operati, H: Stop operati. V IN PWM_D 200kΩ 700kΩ 6 pin. 7 OU Driving the external FE Gate Pin. 8 V IN Power supply pin. Operati : V IN > UVLOON Stop: V IN < UVLOOFF Switching Stop : V IN > V IN OVP V IN OU 9 NC Cnect to nothing 10 pin. No.A2132-5/15

6 LED current and inductance setting Relati ship between and pin voltage (Power Factor Correcti (PFC)) he output current value is the average of the current value that flows during e cycle. he current value that flows into coil is a triangular wave shown in the figure below. Make sure to set Ipk so that (average of current value at e cycle) is equal to (LED current value).ipk is set by the relatiship between voltage and Rcs voltage. his relatiship make Power Factor Correcti (PFC).herefore, it is available to make LED current a sine curve. Setting Zener voltage Vzd depend LED voltage (VF). Choose Zener diode around Vf (LED voltage).when VAC voltage is lower than Vf, LED operati is not normal. Using Zener diode prevents incorrect operating during VAC voltage lower than Vf. In detail, refer to [LED current and inductance setting] In case of pin open, this error amplifier negative input(-) is under ctrol of internal VREF voltage (0.605Vtyp). a blockdiagram in outline R1 Vzd + -- CLK Q RESE OU L FE current VREF (0.605V typ) FE current R2 VREF (0.605V typ) LED current and inductance setting It is available to use both no-isolati and isolati applicatis. Rcs FE off ON OFF R2 (-Vzd) R1+R2 Ipk = Rcs Ipk: peak inductor current Vf: LED forward voltage drop : effective value, R.M.S value VREF: Built-in reference voltage (0.605V) V: voltage (6 pin) Rs: External sense resistor Vzd: Zener diode voltage ( pin) (For n-isolati applicati) he output current value is the average of the current value that flows during e cycle. he current value that flows into coil is a triangular wave shown in the figure below. Make sure to set IL_PK so that (average of current value at e cycle) is equal to (LED current value). a blockdiagram in outline R1 Vzd R2 CLK Q RESE OU + -- VREF (0.605V typ) LED L Rcs Inductor current FE Ipk IL = /L VREF (0.605V typ)/built-in reference ILED slope is proporti to voltage (REF pin voltage) ON OFF Ipk = (-Vf)/L _c = Vf/L _d Inductor current IL = Vf/L _c FE d FE_off (1cycle) No.A2132-6/15

7 Given that the period when current flows into coil is DutyI = _c+_d Ipk 1 2 (Duty )/ = ILED Ipk 2 ILED DutyI (1) since Ipk VREF _IN Rcs Rcs VFEF _IN Ipk = DutyI VFEF _IN 2ILED (2) LV5029MD Ipk: peak inductor current Vf: LED forward voltage drop : effective value(r.m.s value) VREF: Built-in reference voltage (0.605V) V: voltage (6 pin) Rs: External sense resistor Vzd: Zener diode voltage ( pin) Since formula for LED current is different between period and off period as shown above, Ipk -Vƒ L _c = Vƒ L _d (3) Since _c + _d = DutyI, _c = DutyI - _d (4) Based the result of (3) and (4), _d = DutyI -Vƒ (5) o obtain L from the equati (1), (3), (5), Vƒ DutyI L 2 ILED DutyI = - Vƒ Vƒ = 2 ILED 1 ƒosc - Vƒ (DutyI) 2 (6) Since LED and inductor are cnected in serial in n-isolati mode, LED current flows ly when AC voltage exceed VF. 2 Vrms VF (AC voltage, R.M.S) Inductor current Arcsin (Vf/ 2Vrms) Arcsin (Vf/ 2Vrms) Arcsin ( 2Vrms/ 2Vrms) =90 (Deg) Given that the ratio of inductor current to AC input is DutyAC. Vƒ 90 - arcsin ( 2Vrms ) DutyAC = 90 Since the period when the inductor current flows are limited by DutyAC, the formula (6) is represented as follows: 2 Vƒ 90 - arcsin ( Vƒ L = 2 ILED 1 ƒosc Vf 2Vrms ) (DutyI) 2 90 (7) No.A2132-7/15

8 (for Isolati circuit) Using the circuit diagram below, the wave form of the current that flows to Np and Ns is as follows. Current waveform flows to primary side and secdary. a blockdiagram in outline R1 Vzd R2 CLK Q RESE OU + -- VREF (0.605V typ) LP (Np) Rcs Ls (Ns) Ip (Primary side current) FE Is (Secdary side current) VREF (0.605V)typ Ip (primary side) Ip slope is proporti to voltage (REF pin voltage) ON OFF Is (Secdary side current) Ipk_p Ipk_p = /Lp _p Primary side Ip = /Lp _p FE_ON (_p) FE_OFF (1cycle) Secdary side Ipk_s Is = Vf/Ls _s Ipk_s = Vf/Ls _s Iout (_s) [Inductance Lp of primary side and sense resistor Rs] If a peak current flow to transformer is represented as Ipk_p, the power (Pin) charged to the transformer primary side can be represented as: Pin = 1 2 Lp (Ipk_p)2 ƒosc (11) Ipk_p = Lp _p (12) Lp = 2 _p 2 ƒosc = 2 D_p 2 2 Pin 2 Pin ƒosc (D_p = _p = _p ƒosc), o substitute the following to the formula below,... Pout η = Pin (14) (13) Lp = 2 _p 2 ƒosc η = 2 D 2 η 2 Pout 2 Pout ƒosc (15) No.A2132-8/15

9 Sense resistor is obtained as follows. Rs = VREF _IN Ipk_p = VREF _IN Lp _p = VREF _IN Lp (16) D_p [Inductance Ls of secdary side] Since output current Iout is the average value of current flows to transformer of secdary side Iout = Ipk_s _s 1 2 = Ipk _s D_s 2 Ipk_s = Vout Vout Ls _s = Ls = D _s ƒosc (D_s = _s = _s ƒosc) (17) (18) Ls = Vout D _s 2 = Vout D _s 2 2 Iout 2 Iout ƒosc = Vout2 D_s 2 (19) 2 Pout ƒosc Calculati of the ratio of transformer coil primary side and secdary side Since ratio and inductance of transformer coil is Ns Np = Ls (20) Lp substituted equatis (15), (19) for (20) Np Ns = Vout η D _p D_s (21) Calculati of transformer coil primary side and secdary side 10 8 N = (22) 2 ΔB Ae ƒosc ΔB: variati range of core flux density [Gauss] Ae: core secti area [cm 2 ] o use Al (L value at 100), L N = Al 102 (23) L: inductance [μh] Al: L value at 100 [uh/n 2 ] lg (Air gap) is obtained as follows: lg = μ r μ 0 N 2 A e 10 2 L (24) μr: relative magnetic permeability, μr = 1 μ0: vacuum magnetic permeability μ0 = 4π*10-7 N: turn count [] Ae: core secti area [m 2 ] L: inductance [H] No.A2132-9/15

10 Descripti of operati Protecti functi LV5029MD tilte outline mitor point note 1 UVLO Under voltage lock out V IN voltage 2 OCP Over current protecti voltage available FE current 3 OVP Over voltage protecti V IN voltage 4 OP (SD) Over emperature Protecti (hermal Shut Down) PN Juncti temperature 1. UVLO (Under voltage lock out) If voltage is 7.3V or lower, then UVLO operates and the IC stops. When UVLO operates, the power supply current of the IC is about 80μA or lower. If voltage is 9V or higher, then the IC starts switching operati. voltage UVLOON (9V typ) UVLOOFF (7.3V typ) A B IN VCC voltage Outputstage time off 2. OCP (Over current protecti) he pin senses the current through the MOS FE switch and the primary side of the transformer. his provides an additial level of protecti in the event of a fault. If the voltage of the pin exceeds VOCP (1.9V typ) ( A ), the internal comparator will detect the event and turn off the MOSFE. he peak switch current is calculated Io (peak) [A] = VSOCP [V]/Rsense [Ω] he pin is pulled down to fixed level, keeping the ctroller latched off. he latch reset occurs when the user discnects LED from VAC and lets the falls below the reset voltage, UVLOOFF (7.3V typ)( B ). hen rise UVLOON (9V typ) ( C ), restart the switching. voltage OCP (1.9V typ) A C Outputstage voltage UVLOON (9V typ) UVLOFF (7.3V typ) B ime ime off No.A /15

11 3. OVP (Over voltage protecti) If the voltage of pin is higher than the internal reference voltage OVP (27V typ), switching operati is stopped. he stopping operati is kept until the voltage of is lower than 7.3V. If the voltage of pin is higher than 9V, the switching operati is restated. voltage A OVP reset OVP B 27V typ C Operati start 9V typ 7.3V typ ime Outputstage off ime 4. OP (Over temperature protecti) he over temperature protecti functi works when the juncti temperature of IC is 165 C (typ) (A ), and the IC switching stops. he IC starts switching operati again when the juncti temperature is 135 C typ (B) or lower. j (Juncti tmperature) 165 C 135 C SD (design target) A B ime Outputstage off ime Skip frequency functi LV5029MD ctains the skip frequency functi for reducti of the peak value of cducti noise. his functi changes the frequency as follows. Skip frequency functi UVLO unlocked OU 45k 55k 52.5k 50k 47.5k 45k Switching frequency is changed as follows It s repeated by this loop. No.A /15

12 PWM dimming functi LED current can be adjusted according to Duty of PWM pulse input to PWM dimmer pin. PWM pulse is High (2V to 5V) then switching operati stops, and LED current stops flowing. PWM pulse is Low (under 0.6V), then switching operati stop is released, and it returns to normal operati. he OUPU FE is turned OFF within 100ns if PWM input turns into High when the OUPU FE is turned. he recommended frequency of PWM dimming input is 100Hz (twice the AC voltage frequency) to 5 khz. When frequency of the PWM is less than twice the AC frequency, a flicker becomes easy to be observed. On the other hand, if PWM frequency rise to around 50 khz that is driving frequency of the switching of the OUPU FE, the flicker is easy to occur. An outline of PWM_D pin LED current vs PWM_D duty (outline) Delay is <100ns No.A /15

13 0.63 VREF a 3.2 IREF_OU = 0.5mA REFOU a Built-in reference voltage, VREF -- V = 8.5V = 12V = 24V Reference output voltage, REFOU -- V Operati start input voltage,operati stop input voltage, UVLOON, UVLOOFF -- V UVLOON, UVLOOFF a UVLOOFF UVLOON Hysteresis voltage, UVLOH -- V 3 UVLOH a FOSC1 a 80 FOSC2 a Frequency, FOSC1 -- khz = 24V = 8.5V = 12V Frequency, FOSC2 -- khz V IN = 24V V IN = 12V = 8.5V VIO_VR a 2 VOFF, VON a Input offset voltage, V IO _VR -- V OFF voltage, ON voltage, VOFF,VON -- % No.A /15

14 over voltage protecti voltage, OVP -- V OVP a Abnormal sensing voltage, OCP -- V OCP a No.A /15

15 ON Semicductor and the ON logo are registered trademarks of Semicductor Compents Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representati or guarantee regarding the suitabilityof its products for any particular purpose, nor does SCILLC assume any liability arising out of the applicati or use of any product or circuit, and specifically disclaims any and all liability, including without limitati special, csequential or incidental damages. ypical parameters which may be provided in SCILLC data sheets and/or specificatis can and do vary in different applicatis and actual performance may vary over time. All operating parameters, including ypicals must be validated for each customer applicati by customer s technical experts. SCILLC does not cvey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as compents in systems intended for surgical implant into the body, or other applicatis intended to support or sustain life, or for any other applicati in which the failure of the SCILLC product could create a situati where persal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized applicati, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasable attorney fees arising out of, directly or indirectly, any claim of persal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Acti Employer. his literature is subject to all applicable copyright laws and is not for resale in any manner. PS No.A /15

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