Possibility of Phasor Estimation in Digital Relays without Using Anti-Aliasing Filter and Very High Sampling Rates

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1 Possibility of Phasor Estimation in Digital Relays without Using Anti-Aliasing Filter and Very High Sampling Rates Sarasij Das Department of Electrical Engineering Indian Institute of Science, Bangalore Abstract In digital relays, anti-aliasing filters introduce additional time-delays in the phasor estimations. This time-delay reduces the speed of the protection relay. Removal of antialiasing filter from digital relay is beneficial from the point of view of cost, compactness, power dissipation, reliability and maintainability. Previously efforts have been made to remove anti-aliasing filter from digital relays using very high sampling rates. However, existing digital relays do not support very high sampling rates. The purpose of this paper is to investigate the possibility of phasor estimation without using anti-aliasing filter and very high sampling rates. Compressive Sampling (CS) theory has opened up a new possibility of signal reconstruction from sub-yquist rate samples. This paper proposes a CS based phasor estimation method for digital relays. The proposed method can work with the lower A/D sampling rates. The performance of the proposed method has been evaluated using signals generated by PSCAD software and mathematical equations. It is shown that the proposed phasor estimation method has faster response than the conventional approach. Results show that the frequency specification of anti-aliasing filter can be significantly relaxed in the proposed method. The complete removal of anti-aliasing filter is also possible at the cost of significant computational burden. In summary, this paper presents some promising results regarding removal of antialiasing filter from digital relays with lower sampling rates. Index Terms-- Compressive sampling, digital relays, measurements, phasor estimation, power system protection I. ITRODUCTIO Measurement unit is the basic building block of any power system protection device. Measurement unit of a digital relay primarily computes voltage and current phasors along with system frequency from analog voltage and current waveforms. Discrete Fourier Transform (DFT)-based algorithms are popularly used for phasor estimations in digital relays. Performance of conventional DFT algorithm deteriorates in the presence of decaying DC and off-nominal frequencies. Several approaches have been taken to address the issue of off-nominal frequency. In the first approach, A/D sampling is carried out at a constant frequency and the estimated phasor is compensated as a function of the estimated frequency [][2]. In the second approach, the sampling rate is varied to maintain an exact number of periods of the signal in the estimation window [3][4]. In the third approach, the sampling rate is fixed and the window length is varied to take care of the offnominal frequency [5]. In the fourth approach [6], sample values are adjusted to improve the phasor estimation at offnominal frequencies. Apart from DFT algorithms, least square based algorithms [7][8] can also be used for phasor estimations. Digital relays mostly use one cycle window for phasor estimations. However, there are algorithms [9] which use half-cycle window for phasor estimations. Half-cycle algorithms usually have inferior performance with respect to full cycle algorithms. Operating principle of a digital relay heavily depends on the yquist theory. As per yquist theory, the A/D sampling rate should be greater than or equal to the twice of the signal bandwidth to avoid aliasing. Power system signals are not band limited in nature. As a result, digital relays always use anti-aliasing filter to band-limit the voltage and current signals before A/D conversion. The choice of A/D sampling rate depends on the design of anti-aliasing filter. Currently, commercial relays use sampling rates ranging from 8 samples/cycle to 96 samples/cycle [0]. Anti-aliasing filters usually introduce.5-2 ms [0] time-delay in the phasor estimation depending on the sampling rate. This additional time-delay reduces the speed of protection. In addition, antialiasing filters are comparatively expensive [0]. Anti-aliasing filters also take some physical space in the digital relay due to bulky circuitry []. Removal of anti-aliasing filter is beneficial from the point of view of power dissipation, reliability and maintainability. Previously, efforts [0][] have been made to remove anti-aliasing filter by using very high sampling rate. However, existing protection relays do not support very high sampling rates for phasor estimations. Compressive Sampling (CS) [2] theory has opened up a new possibility of signal reconstruction from sub-yquist rate

2 samples. Principle of CS goes against the traditional data acquisition policies. CS is based on random sampling whereas traditional signal processing is based on equally spaced sampling. Random sampling reduces the effective sampling rate in CS. Success of CS reconstruction heavily depends on the sparsity property of the signal. CS is comparatively new in the area of power systems. CS has been used for wireless meter reading [3] in distribution systems. CS has also been used for synchrophasor communications [4][5], line outage detection [6], etc. However, CS has been also applied in many research areas including data acquisition, resolution enhancement [7], data compression, channel coding, etc. The purpose of this paper is to investigate the possibility of phasor estimation in digital relays without using very high sampling rates and anti-aliasing filter. A CS based phasor estimation method has been proposed for digital relays. A pseudo-random sampling strategy which can be easily implemented in digital relays is proposed. The proposed sampling strategy is an extension of the sampling strategy mentioned in [4][5]. The proposed method can estimate phasors with lower sampling rates of existing relays. It is shown that the proposed phasor estimation method has faster response than the conventional method. Results show that the frequency specifications of anti-aliasing filter can be significantly relaxed in the proposed method. The complete removal of anti-aliasing filter is also possible at the cost of significant computational burden. The performance of the proposed method has been evaluated using signals generated by PSCAD software and mathematical equations. II. OVERVIEW OF COMPRESSIVE SAMPLIG Measured values of a time domain signal g can be expressed as [2]: y k or, y = g, ϕ, for k =0,, 2,, - k = ϕ g () If φ is Dirac delta function or spike then y is a vector of sampled values. For digital signals, y and g are the vectors of dimension and φ is sensing matrix of dimension. is the number of samples in the data window. ow, suppose the signal g can be expressed in ѱ basis. Then, g = ψ x (2) where, x is the coefficient vector corresponding to the basis ψ. Thus, y = ϕψ x or, y = Ax, where, A = ϕψ (3) Given y and A, one may find solutions for x. ow, let us consider an under-sampled situation in which the number of measurements (m) is much smaller than the signal dimension. Thus, y = ϕψ x (4) Or, y = Ax where, y is m matrix, x is matrix and A,ϕ are m matrix. In traditional approach, accurate reconstruction of x from m measurements is difficult. Theoretically, x can be recovered from y by solving a l0- minimization problem. However, this l0-minimization approach is numerically infeasible. The appeal of CS is that compressive sampling can recovery x from y if the signal is sparse or has sparse representation in some basis. Compressive sampling uses random sampling to reduce the effective sampling rate. Random sampling preserves the signal structure even at sub- yquist rate. CS mainly consists of two major steps. The steps are: Sampling: The signal is randomly sampled and transmitted to the receiver/decoder. Reconstruction: Original signal is reconstructed at higher rates from random samples using reconstruction algorithms. The success of reconstruction depends on the choice of sensing (ϕ ) and basis (ψ ) matrix. Smaller number of measurements (m) is needed when sensing and basis matrices are incoherent with each other. Restricted isometric property (RIP) [2] has been proposed as a condition for exact recovery of sparse signals. RIP is closely related to the incoherence property between sensing and basis matrix. Exact recovery is possible if A obeys the restricted isometry property (RIP). Random Gaussian, Bernoulli, and partial Fourier matrices [25] are found to satisfy the restricted isometry condition. Signal reconstruction is the main algorithmic challenge in the CS theory. Initially, Basis Pursuit was proposed for signal reconstruction. Basis Pursuit uses following l-minimization problem [8]: Min x subject to y = Ax (5) where, x denotes l norm of vector x Extensive research works have been carried out on CS reconstruction. Greedy Pursuit algorithms are most popular CS reconstruction algorithm. Examples of greedy algorithms include orthogonal matching pursuit (OMP) [9], regularized OMP (ROMP) [20], compressive sampling matching pursuit (CoSaMP) [2] and Subspace Pursuit (SP) [22] algorithms. CoSaMP and SP algorithms are very much similar in nature and provide rigorous performance guarantees in terms of recovery and program runtime. CS algorithms usually use fixed orthogonal basis during reconstruction. However, real world signal pattern often changes with time. So, best basis extension of CS reconstruction have been proposed in [23]. Many real world signals are compressible in nature. These signals are characterized by few dominant components. Other components of these signals have very small magnitudes. These signals are often termed as nearly sparse signals in CS literature. CS theory is also applicable [25] for nearly sparse signals. In this case, dominant signal components are used for

3 signal reconstruction. Detailed review of CS reconstruction algorithms and CS applications can be found in [24]. III. SPARSITY OF VOLATGE AD CURRET WAVEFORMS Digital relays receive analog voltage and current waveforms from CVTs and CTs. During steady state, voltage and current waveforms mainly contain sinusoid of fundamental frequency and noises. Small amount of harmonics/inter-harmonics may also be present in the steady state waveforms. A window of steady state voltage/current waveform is expected to have few dominant frequency components when expressed in Fourier basis. As a result, steady state voltage and current signals are nearly sparse in nature. Faults and switching events are very common in power systems. During power system transients, various high and low frequency components may appear in the voltage and current waveforms. These high and low frequency components are transient in nature and eventually decay with time. A window of transient state voltage/current signal will have some dominant high and low frequency components in addition to the fundamental frequency component. As a result, transient state voltage and current signals can also be considered nearly sparse in nature. As an example, frequency spectrum of transformer inrush current is presented in Figure. Frequency spectrum of Figure is computed over a window of samples. The current waveform of Figure is obtained using PSCAD software. Frequency spectrum of Figure contains dominant DC, fundamental, 2nd harmonic, 3rd harmonic, 4th harmonic and 5th harmonic components. early sparse nature of inrush current is demonstrated in Figure. Similarly, nearly sparse nature of other power system transient events can also be established. Fault induced transients often contain much higher frequency components than inrush. From the above discussion, it can be concluded that the voltage and current signals are suitable for CS application due to the sparse or near sparse nature during both steady state and dynamic situations. diagram presented in [26]. In Figure 2, digital relay receives analog voltage and current signals from CT and CVT. These analog signals are filtered using surge suppression filters to remove any destructive transient voltage or current surge. The analog voltage and current signals are then pseudo-randomly sampled using ADC. Sampling of ADC is controlled by a clock generating pseudo-random timing sequence. The average sampling rate of the ADC is comparable with respect to the existing sampling rates of digital relays. It is to be noted that there is no anti-aliasing filtering stage in the proposed CS based digital relay (Figure 2). The output of the ADC goes to the processor. Processor computes magnitude and angle of the fundamental voltage and current phasors. In the proposed scheme, CS reconstruction algorithm is used to calculate the fundamental frequency voltage and current phasors. The proposed CS based phasor estimation method consists of two major functional components: - Pseudo-random sampling strategy - CS reconstruction RAM ROM EPROM Figure 2: Proposed block diagram of a digital relay with compressive sampling based phasor estimation Figure : Frequency spectra of transformer inrush current obtained using PSCAD IV. PROPOSED PHASOR ESTIMATIO METHOD Proposed block diagram of a digital relay incorporating CS based phasor estimation method is presented in Figure 2. Figure 2 is created by modifying the conventional relay block A. Pseudo-random sampling strategy The sampling strategy of the proposed method is based on the onuniform Sampler (US) architecture [2]. In this architecture, signals are digitized at the pseudo-randomly spaced time instances. Due to the incoherence between spikes and sinusoids, this architecture can be used [2] to sample signals at sub-yquist rate. In the existing digital relays, voltage and current waveforms are mostly sampled/re-sampled at equally spaced time instants. Relay manufacturers are often reluctant [27] to make any significant change in the data acquisition system of the relay. So, the pseudo-random sampling strategy of proposed method should require minimum change from the existing sampling strategy. Proposed pseudo-random sampling strategy is an extension of the sampling strategy mentioned in [4][5]. The pseudo-random sampling sequence is generated by pseudorandomly choosing time instants from a series of equally

4 spaced time instants. Suppose, t 0, t, t 2, t 3, t 4, t 5, t 6, t 7, t 8, t 9, t 0, t, t 2, t 3, t 4, t 5, t 6, t 7,,t t is a series of equally spaced (Δt spacing) time instants. So, one example of pseudo-random sampling sequence can be t 0, t 4, t 5, t 9, t, t 3, t 6, t 7,.. In the proposed sampling strategy, the time interval for the next sampling is pδt where p is a positive integer number. The value of p is chosen from a discrete uniform distribution on to n. The value of n decides the average sampling rate of the pseudo-random sampling sequence. Suppose, FUS = sampling rate of the equally spaced time instants FCS = average sampling rate of pseudo random sampling sequence SR = ratiobetween sampling rates FUS and FCS FUS SR = (6) FCS The ideal relationship between SR and n is presented in the Figure 3. It is to be noted that the relationship is linear. B. CS reconstruction Spikes and Fourier basis are incoherent with each other. In addition, power system voltage and current signals are sparse in Fourier basis. As a result, partial Fourier matrices are suitable for phasor estimation in protection relays. Suppose, we have a window of measurements sampled at equally spaced time instants and measurements correspond to one fundamental cycle. Suppose, measurement vector y contains samples sampled at equally spaced time instants. So, y j y j+ y = y j+ In (7), y j corresponds to j th time instant. Suppose, x is the fundamental phasor and x 2, x - are the harmonic phasors. In classical approach, fundamental phasor x can be computed by the following DFT based filter [28]: (7) 2 i2 π ( k+ 0.5)/ [ ( 0.5)]. (8) k = 2 2 x = y Δ t k+ e In eq. (8), is even and the reference time is taken at the center of the estimation window and Δt is sampling interval. Similar equations can also be written for DC and harmonic components. So, Figure 3: Ideal relationship between n and SR In the proposed method, one cycle time window has been used for the phasor estimation. Once a new sample appears, the estimation window is shifted to make the next phasor estimation. Figure 4 presents an example of the phasor estimation window. In Figure 4, sampled values are marked with blue dots. In the proposed approach, relays will have an average value for the protection pass. Figure 4: Example of phasor estimation windows It is proposed that the pseudo-random sampling sequence should be same for all the three phases in a digital relay. This will ensure that all voltage and current phasors are available at a particular time instant for protection functions in the relay.... x0 yj i2 ( 0.5)/ i2 ( 0.5)/ x π + π e... e y j+ (9) = x i2 π( )( + 0.5)/ i2 π( )( 0.5)/ y j+ 2 2 e... e x y B In (9), B is a matrix of filter coefficients. By taking inverse of B, we can write: y = [ B ] x y = A x (0) Eq. (0) has the form of eq. (3). Suppose, after pseudo-random sampling we get a sample sequence with m samples So, it can be written. y = A x () m m Vector x of Eq. () will have sparse or nearly sparse nature for power system signals. Eq. () can be solved by existing CS reconstruction algorithms to get the vector x. In the proposed CS based method, time tagging of estimated phasors depends on the reference time of the basis matrix. If the basis matrix is constructed with reference time at the center of the estimation window, then the time tagging will be at the center of the window [30].

5 V. PERFORMACE EVALUATIO The performance of the proposed algorithm has been evaluated using signals generated by both PSCAD simulations and mathematical equations. Phasors are computed using method described in section IV. Phasors are time tagged at the center of the estimation window. A. Evaluation using PSCAD simulation In this section current and voltage data of a 3-bus system (Figure 5), simulated in PSCAD, are used for performance evaluation. Parameters of the generators and transmission line are taken from [29]. Bus 3 is located at the mid-point of a 200 km long transmission line between bus and 2. A load with 00 MW and 0 MVAr rating is connected at the bus 3. A harmonic source is injecting 29 th harmonic (740 Hz) current (THD=0%) at bus 3. A digital relay is located on the line side of bus. The relay is receiving voltages and line currents via CVTs and CTs. ominal system frequency is 60 Hz. Load Figure 5: 3-bus system for performance evaluation Case- represents the situation where fundamental voltage and current phasors are computed using proposed phasor estimation method as described in section IV. In Case, voltage and current signals are pseudo-randomly sampled at 920 samples/s rate (average) without using anti-aliasing filter. The pseudo-random time sequence is derived from a uniform sampling rate. One cycle window has been used for phasor estimation. Approximately 920 phasors are computed in one second in Case. Case 2 represents the conventional approach. At first, voltage and current signals are uniformly sampled at samples/s rate. Then, 4th order Butterworth filter with 720 Hz cut-off frequency is used as anti-aliasing filter. Finally, one cycle DFT filter is used for phasor estimation after down-sampling to 920 samples/s (as per the steps of [0]). In one second, 920 phasors are calculated. A single-line-to-ground (SLG) fault is created on phase A of bus 3. Figure 6 presents the estimated magnitudes of phase A current at the relaying location. In Figure 6, there is an additional time delay in Case 2 with respect to Case. This is expected as anti-aliasing filter is used in Case 2 while there is no anti-aliasing filter in Case. From Figure 6 it is evident that the proposed CS based phasor estimation method has faster response than the traditional phasor estimation approach. Figure 6: Phase-A current of line -3 during SLG fault B. Evaluation using signals generated by equations Performance of sampling strategy: As per the sampling strategy of section IV.A, many pseudo-random sampling sequences can be generated from a uniform sampling sequence. Table summarizes the estimation performance of the proposed algorithm for variour pseudo-random sampling sequences. Phasors are computed over samples generated by following equation. yt ( ) = sin(2 π 60 t) + η rnd (2) In (2), rnd is a random variable generating noise values from uniform distribution in the open interval (0,). The variable η has been used in (2) to change the noise level. Phasor estimation errors are computed using Total Vector Error (TVE) as defined in [30]. Table presents the average and maximum TVE values for pseudo-random sampling sequences. In Table, average TVE values remain within % and maximum TVE values remain within 2%. From Table, it is evident that the proposed method performs robustly for various pseudorandom sampling sequences and noises. Table : Performance of the proposed sampling strategy Computed over pseudo-random sampling sequences η Avg TVE (%) Max TVE (%) Frequency Response: Frequency response of the proposed algorithm has been presented in Figure 7 and Figure 8. Pseudo-random sampling rate is 920 samples/s (average) in both the figures. Figure 7 presents the frequency response zoomed around fundamental frequency. In Figure 7, proposed phasor estimation method shows good harmonic rejection property. Figure 8 presents the frequency response of the proposed method over large frequency range.

6 depends on the number of iterations and stopping criteria. Figure 9 presents the number of iterations taken for each phasor estimation in Figure 6. The number of iterations varies from to 4. In Figure 6, the number of iteration increases when power system goes through transient phases. Existing relay hardware may not meet the computational requirements of the proposed method. Hardware implementation of the proposed method will be taken as a future work to analyze this. Figure 7: Frequency response of the proposed phasor estimation method (zoomed around fundamental frequency) Figure 9: Iteration numbers corresponding to the phasor estimation of Figure 6 Figure 8: Impact of on frequency response of the proposed phasor estimation method In the proposed sampling strategy (section IV.A), pseudorandom sampling instants are derived from uniform sampling rate. Value of has an impact on the frequency response of the proposed method. In Figure 8, frequency responses are presented for three values of (96, 28 and 92) while keeping m fixed at 32. corresponds to one fundamental cycle. The pseudo-random sampling rate is 920 samples/s (average) for all. In Figure 8, frequency responses repeat themselves after 5760 Hz, 7680 Hz and 520 Hz. As per the yquist theory, aliasing starts above 960 Hz for a uniform sampling rate 920 samples/s. But in Figure 8, aliasing starts at much higher frequencies than 960 Hz. From Figure 8 it is evident that the frequency specifications of anti-aliasing filters can be significantly relaxed in the proposed method. Paper [3] has also reported relaxation in the anti-aliasing filter design due to use of CS in embedded applications. As per Figure 8, the frequency at which aliasing starts depends on the value of. For a particular pseudo-random sampling rate, aliasing frequency increases with increasing. Aliasing will start at a very high frequency for a very large. So, anti-aliasing filtering can be avoided by using a very large while keeping pseudo-random sampling rate low. Paper [0] uses 96 khz uniform sampling rate to ensure zero aliasing. Similarly, value of corresponding to 96 khz (an example) can be used in the proposed CS based approach. However, large will cause significant increase in the computations in the proposed approach. Computations: In the proposed CS based phasor estimation, modified Subspace Pursuit algorithm [4] has been used for the reconstruction. Subspace Pursuit is an iterative algorithm. In each iteration, sorting and pseudoinverse computations are performed. Being an iterative algorithm, the performance of the proposed algorithm VI. COCLUSIOS In this paper, a compressive sampling based phasor estimation method has been proposed for digital relays. A pseudo-random sampling strategy has also been proposed for easy implementation in digital relays. The proposed method works with the comparatively lower sampling rates of existing relays. Performance of the proposed method has been evaluated using both PSCAD and mathematically generated data. Results show that the proposed method has faster response than the traditional phasor estimation approach. This is an important advantage from the point of view of power system protection. Results also show that the proposed method performs satisfactorily and robustly for various pseudo-random sampling sequences and in presence of noises. Proposed method also shows good harmonic rejection properties. Results show that the design requirements for antialiasing filters can be significantly relaxed in the proposed method. However, complete removal of antialiasing filter will need large computations. Large computational requirement is the major obstacle towards practical implementation of the proposed phasor estimation method. Research is needed to reduce the computational burden. Research is also needed to come up with basis matrices which have better frequency response characteristics. In short, this paper presents some promising results regarding removal of anti-aliasing filter from digital relays with lower sampling rates. Significant research attention is needed to develop this area. REFERECES [] System and algorithm for exact compensation of fundamental phasors, by G. Benmouyal. (2005, August 23). Patent [2] Method and apparatus for compensation of phasor estimation, by W. S. Premerlani, D. J. Hoeweler, A. A. M. Esser, J. P. Lyons, G. B. Kliman, R. A. A. Koegi, and M. G. Adamiak. (200, Oct. 3). Patent [3] G. Benmouyal, An adaptive sampling interval generator for digital relaying, IEEE Trans. Power Del., vol. 4, no. 3, pp , Jul. 989.

7 [4] Apparatus and method for estimating synchronized phasors at predetermined times referenced to an absolute time standard in an electrical system, by G. C. Zweigle, L. S. Anderson, and A. Guzmancasillas. (2009, Jan. 20). Patent B2. [5] D. Hart, D. ovosel, H. Yi, B. Smith, and M. Egolf, A new frequency tracking and phasor estimation algorithm for generator, IEEE Trans. Power Del., vol. 2, no. 3, pp , Jul [6] Akke, Magnus, and James S. Thorp. "Sample value adjustment improves phasor estimation at off-nominal frequencies." Power Delivery, IEEE Transactions on 25, no. 4 (200): [7] Sachdev, M. S., and M. agpal. "A recursive least error squares algorithm for power system relaying and measurement applications." Power Delivery, IEEE Transactions on 6, no. 3 (99): [8] Barbosa, Daniel, Renato M. Monaro, Denis V. Coury, and Mário Oleskovicz. "Digital frequency relaying based on the modified least mean square method." International journal of electrical power & energy systems 32, no. 3 (200): [9] Sidhu, Tarlochan S., Xudong Zhang, and Vinayagam Balamourougan. "A new half-cycle phasor estimation algorithm." Power Delivery, IEEE Transactions on 20, no. 2 (2005): [0] Brahma, Sukumar M., Phillip L. De Leon, and Rajesh G. Kavasseri. "Investigating the option of removing the antialiasing filter from digital relays." Power Delivery, IEEE Transactions on 24, no. 4 (2009): [] Banerjee, P., and S. C. Srivastava. "A subspace-based dynamic phasor estimator for synchrophasor application." Instrumentation and Measurement, IEEE Transactions on 6, no. 9 (202): [2] E. J. Candès and M. B. Wakin, An introduction to compressive sampling, IEEE Signal Process.Magazine, vol.25, pp.2 30, [3] H. Li, R. Mao, L. Lai, and R. C. Qiu, Compressed meter reading for delay-sensitive and secure load report in smart grid, in Proc.IEEE Int. Conf. Smart Grid Communication, 200, pp [4] Sarasij Das and Tarlochan Sidhu. Application of Compressive Sampling in Synchrophasor Data Communication in WAMS, IEEE Transactions on Industrial Informatics, Volume: 0, Issue:, Feb [5] Sarasij Das and Tarlochan Sidhu. 'Reconstruction of Phasor Dynamics at Higher Sampling Rates using Synchrophasors Reported at Sub-yquist Rate.' Innovative Smart Grid Technologies (ISGT), 203 IEEE PES, Feb 203, Washington, D.C [6] H. Zhu and G. B. Giannakis, Sparse Overcomplete Representations for Efficient Identification of Power Line Outages, IEEE Trans. Power Systems, 202. [7] Bertocco, Matteo, Guglielmo Frigo, Claudio arduzzi, and Federico Tramarin. "Resolution Enhancement by Compressive Sensing in Power Quality and Phasor Measurement." Instrumentation and Measurement, IEEE Transactions on 63, no. 0 (204): [8] E. Cand`es, J. Romberg, and T. Tao, Robust uncertainty principles: Exact signal reconstruction from highly incomplete frequency information, IEEE Trans. Inform. Theory, vol. 52, no. 2, pp , Feb [9] Tropp, Joel, and Anna C. Gilbert. "Signal recovery from random measurements via orthogonal matching pursuit." Information Theory, IEEE Transactions on 53, no. 2 (2007): [20] eedell, Deanna, and Roman Vershynin. "Signal recovery from incomplete and inaccurate measurements via regularized orthogonal matching pursuit." Selected Topics in Signal Processing, IEEE Journal of 4, no. 2 (200): [2] D. eedell and J. Tropp, CoSaMP: Iterative signal recovery from incomplete and inaccurate samples, Applied and Computational Harmonic Analysis, vol. 26, no. 3, pp , [22] W. Dai and O. Milenkovic, Subspace pursuit for compressive sensing signal reconstruction, IEEE Transaction on Information Theory, Vol. 55, no. 5, pp , [23] Peyre, Gabriel. "Best basis compressed sensing." Signal Processing, IEEE Transactions on 58, no. 5 (200): [24] Das, Sarasij, and Tarlochan Sidhu. "Application of Compressive Sampling in Computer Based Monitoring of Power Systems." Advances in Computer Engineering 204 (online). [25] E. Cand`es and T. Tao, ear optimal signal recovery from random projections: Universal encoding strategies?, IEEE Trans. Inform. Theory, vol. 52, no. 2, pp , Dec [26] Horowitz, Stanley H., and Arun G. Phadke. Power system relaying, John Wiley & Sons, third edition, [27] Zhang, Zhiying, Oleksandr Korovin, Sridevi Mutnuri, Ihab Hamour, Ilia Voloh, and Lebo Jiang. "An innovative timestamp-based convolution integral method in synchrophasor estimation within digital relays." In Advanced Power System Automation and Protection (APAP), 20 International Conference on, vol., pp IEEE, 20. [28] Adamiak, Mark, Bogdan Kasztenny, and William Premerlani. "Synchrophasors: definition, measurement, and application." Proceedings of the 59th Annual Georgia Tech Protective Relaying, Atlanta, GA (2005): [29] Brahma, Sukumar M., and Adly Girgis. "Fault location on a transmission line using synchronized voltage measurements." Power Delivery, IEEE Transactions on 9, no. 4 (2004): [30] IEEE Standard for Synchrophasor Measurements for Power Systems, IEEE C , (Revision of IEEE Std. C ). [3] Satyanarayana, J. V., and A. G. Ramakrishnan. "Low order antialiasing filters for sparse signals in embedded applications." Sadhana 38, no. 3 (203):