Theoretical Design of Compact Multi-phase Interleaved Buck DC-DC Converter for Automotive Power Applications

Transcription

1 heoretical esign of Compact Multi-phase Interleaved Buck C-C Converter for Automotive Power Applications Yabin Zhang*, Paolo Emilio Bagnoli* and Emilio Franchi** * epartment of Information Engineering, University of Pisa, Via G. Caruso 16, Pisa Italy ** RICO S.p.A. Castel Fidardo, Ancona, Italy ch.zhyb@gmail.com, emilio.franchi@gmail.com Abstract -- heoretical design of a multiphase interleaved buck C-C converter is introduced based on corresponding requirements from automotive industry. Particularly, multiphase interleaved topology is adopted to prevent much heat generated in devices and large voltage ripple in the load. Ceramic capacitors will be used to replace electrolytic capacitors in order to meet the requirement of long life-time. Control strategy in the converter is mainly based on formulas derived for calculating duty cycle of PWM signals in both continuous mode and discontinuous mode. PI control is also included to correct the error generated from the difference in duty cycle between the ideal condition and the actual one as well as to realize fast recovery of nominal put during variation of working condition, such as variation of input voltage and variation of load. All control functions will be realized by means of a single microcontroller. he theoretical design has been tested through simulation in Simulink model, in which particular sampling frequency and control frequency of the actual microcontroller were taken into account. Index erms--c-c power converters, multiphase interleaved topology, PWM, PI Control I. INROUCION Electronic equipments used in the field of automobile industry able to manipulate high current values are usually required to have long life-time and reliability, small volume and high capability to dissipate excess heat in the switching devices [1-7]. herefore, conventional C-C converters with single re topology for power conversion are usually not adopted due to relatively high heat produced in switches. Also, in conventional converters high-capacitance electrolytic capacitors are used to decrease as much as possible residual ripple on put voltage, but characteristic of long life-time has to be scarified even though electrolytic capacitors have high capacitance to volume ratio. On the other hand, if long life-time capacitors, such as ceramic capacitors are used to replace electrolytic capacitors, high put ripple couldn t be prevented due to lower capacitance value for equal capacitor volume. he above mentioned problems may be overcome using multi-phase (multiple parallel branch res) interleaved (MPI) C-C conversion topology [5-7]. Multi-phase means multiple parallel branch res of C- C conversion, while interleaved means all branches are working in respective period postponed to each other even though they work in same frequency, same duty cycle and same rms current. In this way, not only the current is divided evenly in each re thus much less heat is produced, but current ripple flowing into the load can also be eliminated theoretically as long as the product of branch number or equivalent branch number (when the delay between each two braches make some branches work in the same phase, equivalent branch number is smaller than actual branch number) and duty cycle of switches is an integer. Another merit of MPI topology is the capability of fast response to requirement of changing duty cycle, because the equivalent frequency of pumping energy to the load is multiple times (equal to the number of parallel phases) of working frequency in each re, thus the response to variation of condition is much faster than traditional one-re topology. However, put capacitor is still necessary to help stabilize put voltage during change of duty cycle, variation of input C supply voltage and variation of load. Since in multiphase converter put current is equally divided in all branches much smaller size of power switching devices and inductors can be selected and all devices can be placed intensively in the PCB due to low heat produced. o achieve the requirement of put capability, volume and stability from automobile industry as shown in able I, one 6-phase C-C buck converter was theoretically designed and testified through simulation. Particularly, PI feedback control, protection control and self-adapted duty cycle function has been implemented in the simulation model mainly to realize fast response to variation of input voltage of battery and variation of load. In Section II calculation principle of duty cycle, selection of devices and brief control strategy are introduced and explained. In Section III, simulation results from Simulink are presented, especially taking into account the actual sampling frequency and calculation period of PI function in the microcontroller. II. ESIGN OF HE CONVERER Since put voltage is less than input voltage, buck converter is adopted as the main circuit topology. Principle and specified waveform of buck converter has been widely explained in lots of literatures, so in this section only some key equations are given to help understand the principle in the converter.

2 Figure 1. Schematics of circuit topology Figure 2. CONROL BLOCK diagram in Simulink

3 ABLE I. ECHNICAL REQUIREMEN OF C-C CONVERER FROM AUO INUSRY Input voltage V in Nominal 27V (min 19V, max 35V) Output voltage V Nominal 13.5V (min 13V, max 14V) Output ripple <250mV p-p Load regulation I o 2A-20A, 30A for 2ms Efficiency ƞ > 88% Board imension <10cm*10cm Ambient temp. -40 C -70 C, 85 C for 10min Microcontroller was selected to realize all control function instead of analog control circuits, so large space on the board can be saved and control parameters can be easily adjusted in the software. As mentioned before, the higher is the number of branches, the less heat produced, but meanwhile higher possibilities of interference and less stability due to more complicated circuits in the board, especially under high ambient temperature. ogether with the dimension requirement, the size of inductor, switch driver, microcontroller, capacitors and other devices, finally we chose 6 branch res. he schematic of circuit topology in the converter is shown in the Figure 1. On the other hand, to obtain a relative low ripple in the put, the inductor current ripple should also be low. But restricted by the size of the converter, only small inductor of low inductance can be selected, thus switches should work at a relative high frequency to reduce amplitude variation of inductor in each switching cycle. Mosfet is a good substitute and we chose Si7812N n- mos, which can work at MHz level and has a relative low gate charge between 16nc and 24nc under high gate driving voltage. But too high working frequency will also influence the stability of switches. First, between driver signals of high side mos and low side mos, there should be some dead time left for the mosfet to recover from on state to off state. Also the drawback in the driver circuit requires the gate of mosfet not be discharge in too short time. In the buck topology, high side mosfet should be driven by a bootstrap circuit [8] in order to boot the gate voltage higher than the input voltage thus the mosfet could safely turn on. When the high-side mos is turned off, the negative voltage appearing in the source of high side mos due to sudden conduction of low side freewheeling diode and current pulse flowing in parasitic inductor in the re could probably damage the boot capacitor or forces the mos driver to latch-up the put state [8], which potentially leads to the short-circuit of high-side and low-side switches. One solution is to connect resistor at the gate of high-side mos or in the loop where the gate discharges to decrease the abrupt current flowing through the low side freewheeling diode and the parasitic inductor. While, the drawback of this protection resistor is increasing the charging and discharging time of the gate, thus limits the working frequency of the mosfet. Another drawback of high frequency is to increase ironloss of magnetic core in inductors. herefore, those mosfets in this converter are working at a much lower frequency 250kHz but not at MHz level. A. Continuous mode As mentioned before, small inductor can be selected due to high working frequency of mosfets and effect of eliminating current ripple flowing to the load in MPI topology. Since each phase current is equal to 3.33A under the maximum nominal put, we can expect a p-p fluctuation more or less equal to this current to guarantee continuous working under 20A load or heavier one. It s well-known that the duty-cycle in continuous mode in buck converter is equal to the ratio of put voltage to input voltage: V c = (1) Vin Let s derive this formula according to the energy conservation law in multiphase topology. In the converter, ideally the average input power should be equal to average put power. When the high-side switch is on, the current flowing in the inductor is also the current flowing from power supply to each branch re. So the energy conservation can be expressed as: c c Imax ' Imin ' 6 in in ' 6 in ( min ' + ) 0 0 c V I dt V I t dt = = c ( Imax ' + Imin ') = 6V in = 6 Vin Io ' c = V Io 2 in which, input current to a single re I in is a periodic function, so we just integrate the first cycle of I in to obtain the equivalent average input power supplying to the load. So I in is equal to the inductor current expressed as [I min +(I max -I min )/ c ] t in that re when high-side mosfet is turned on. I max is the current at the moment when high-side switch is turned off. I o is the average current of each inductor and put average current of the converter I o is equal to 6 I o, so the duty cycle in continuous mode in multiphase topology is also equal to the ratio of put voltage to input voltage. As given in able I, put voltage is just half of nominal input voltage. So the duty cycle is 50% in continuous mode under the nominal input voltage 27V. With fluctuation of current equal to 3.33A and 2µs turnon period for each mosfet, we can calculate the inductance required: 6 ul t 13.5V 2 10 L = = = 8.18µ H i 3.33 in which, u L is inductor voltage, and i is current variation during the period t. So a SM cube inductor (size 1210) of 8.2 µh with SRF (self resonant frequency) up to 34MHz produced by WE C.O. was selected. For the mosfet driver, we selected UCC27201 which can provide two driving channels with maximum 3A driving current and more than 1MHz driving signal. (2) (3)

4 B. iscontinuous mode When the load is decreasing to 10A (6*1.67A) under 27V input, the converter is working in the critical continuous mode, in which the inductor current starts to increase from 0A to 3.33A in the end of 50% duty cycle and then decreases to 0A in the end of the period. So when the load is less than 10A, the converter is working in discontinuous mode and the duty cycle is less than 50%. Certainly, the duty cycle in critical mode is depending on the input voltage. We can also derive the duty cycle in discontinuous mode according to energy conservation law: d d Imax ' Vin Iin dt Vin tdt 0 0 d 6 ' 6 = = d Imax ' = 6V in = V Io 2 where I max is the maximum current of inductor in the end of duty cycle. So according to equation 3, I max can be expressed as: I max ' in (4) V V = d (5) L So the duty cycle in discontinuous mode can be given as follows: d = 2V LI 6 V ( V V ) o in in By replacing 6 with general phase number N p, we can obtain the general form of duty cycle in discontinuous mode: d = 2V LI N V ( V V ) o p in in By substituting the relation V in =2V under nominal input in 6, we can obtain d of the converter: d (7) (6) = LIo L 6V = 6R (8) L So d is inversely proportional to square root of the load under nominal 27V input. In those formulas V is always substituted by 13.5V to calculate duty cycle. C. Control Strategy Straightly, based on upper relations of duty cycle, we could apply a control strategy by measuring input voltage, put voltage and put current to adjust the duty cycle, especially in discontinuous mode. he switching rule between continuous mode and discontinuous mode is depending on the put current. According to equation 5, put current in the critical mode can be expressed as: I oc 6( Vin V ) 3*13.5( Vin 13.5) = d = (9) 2L V L in So when the put current is larger than I oc, the duty cycle of PWM signals given to the mosfet driver should be defined based on formula 2. When I o is less than I oc duty cycle should be calculated based on formula 6. However, in automotive applications the put current of the converter is influenced by engine status, ambient temperature and electrical appliances operated by the driver, which further influences the devices status and the efficiency of the converter. Also since there are only limit number of put filter capacitors, the put voltage could vary abruptly when working condition changes, thus there is always a little difference between theoretical duty cycle and actual required one. herefore, theoretically calculated relationships (2) and (6) should be assisted by an error correction control in order to compensate the influence of the actual working conditions. PI feedback control is competent to error correction in many applications [9]. Especially, integration part can help lead error to approach zero, but also easily leads to windup of error when the integral coefficient is set too large. While derivative part can help reduce influence of windup, but may leads to oscillation of high amplitude in error when the derivative coefficient is too high. However, under appropriate setting of these coefficients, the objective quantity could smoothly approach the reference value, especially after transient variation of the error input. Since actual non-ideal condition in the converter is not easy to be quantitatively analyzed to help select PI coefficients, those coefficients are better to be searched during simulation, in which the acceptable maximum abrupt variation in the supply input or load could also be tested according to able I. Certainly these coefficients should be further adjusted during the experiments due to non-known condition in the prototype. As mentioned before, all mathematical functions and PI control will be realized in a microcontroller, which can also help save the space in the PCB as substituting several operation circuits. But limited sampling frequency and calculation period in the microcontroller would lead to imperfection in real-time feedback control, and additional protection logic has to be included, which will be explained in Section III. III. SIMULAION OF HE CONVERER IN SIMULINK Simulink simulation environment was selected due to its convenience in realizing mathematical operation and defining sampling frequency, thus control logic in the microcontroller and influence of its limitation can be simulated and investigated. he control block diagram realized in simulink is shown in Fig.2. he puts of PI error correction and duty cycle calculation function blocks (right on the figure 2) are summed and then compared with saw-tooth wave (amplitude is 1) unit in order to generate PWM signals. As shown in Fig.1, all equivalent series resistance in inductors and put capacitor are represented in the simulation circuit. According to following simulation results, only 100µF

5 Figure 3. Simulation result of V during abrupt variations of load and input voltage events reported in able II under 1GHz sampling frequency. Figure 4. Output voltage ripple under nominal input of 27V and load 20A ceramic capacitor is needed as put filter capacitor in the condition of real-time ideal feedback control. A. Simulation under ideal Real-time feedback control By using ideal switch block in Simulink, the abrupt change of input supply or load can be realized. he following figure shows the corresponding put in presence of changing working condition events under 1GHz sampling frequency and optimized PI coefficients of C P =3, C I =4000, C = in order to approximately simulate ideal real-time feedback control. In the figure 3 those events of abrupt changes of current load or input voltage are marked by several capital letters. he load is changing in the period of 3.2ms with 50% duty cycle between 20A and 2A, while the input supply voltage starts at 27V and at 2ms it changes to 19V and then follows a changing period of 5ms with 50% duty cycle between 19V and 35V. able II shows the event and influence on V at each time instant specified by those capitalized letters. Figure 5. Six phases current under nominal input of 27V and load 20A. ABLE II. VARIAION EVENS LABELE IN FIGURE 3 ime Event V variation A 1.6ms load 20A 2A <0.2V B 2ms input 27 V 19V << 0.1 V C 3.2ms load 2A 20A <0.9V 4.5ms input 19V 35V << 0.1 V E 4.8ms load 20A 2A <0.2V F 6.4ms load 2 A 20A 0.1V G 7ms input 35V 19V << 0.1 V H 8ms load 20A 2A <0.2V I 9.5ms input 19V 35V << 0.1 V J 9.6ms load 2A 20A 0.1V So the control strategy can theoretically fast respond to abrupt change of the input or the load, also the peak variation of put is not exceeding the limited range between 13V and 14V. Under higher input voltage of 35V, the variation amplitude is much less than that under 19V input voltage, because higher input voltage can induce higher transient current through inductor, thus fast charge the put load and capacitor. he steady ripple of V is always less than 5mV under any situation. Figure 4 shows an example of the put ripple voltage of less than 0.6mV under nominal input of 27V and load 20A. Such low ripple just benefits from interleaving of Figure 6. PWM signals of six phases under 19V input and 2A load. inductors current shown in the Figure 5. While, figure 6 shows PWM signals of six phases under 19V input voltage and 2A load. As shown in the figure, in any 4µs switching cycle, same delay is defined between any two adjacent phases, thus load current can be averagely divided in each phase and interleaved superposition of all phase current can be realized. Certainly, since the product of duty cycle and phase number is not an integer under the condition in figure 6, there will be small ripple in the current flowing to the load, but such current ripple will be further filtered by the put capacitor. B. Simulation under efficient control frequency of 125kHz However, since the control algorithm will be realized in the microcontroller, limited sampling frequency and

6 calculation cycle of PI would influence the performance of the converter. At the moment we write this paper, the program is still not ready, but 1 MHz sampling frequency ( for both measurement and updating the duty cycle) and 8µs PI-calculation cycle has already been determined. So efficient frequency of control signal updated for generating PWM signals is only 125 khz. Such lower updated frequency of control signal does indeed increase the response delay of the converter when there is variation of working condition, because the control signal can respond to the variation at least 8µs late after the moment of variation event. So theoretically more put capacitance is needed. If no additional control method is included, at least 500 µf should be mounted to suffice the limit variation range of the put. But due to limit volume of the converter, such amount of ceramic capacitor can t be placed. Instead, additional protection logic can help fast respond to the variation. uring the event of abruptly changing the load from minimum to maximum, when the load voltage is lower than 13.2V, duty cycle of all high-side mosfets will be increased to 100% while the inductor current is still interleaved to each other. On the other hand, when the put is exceeding 13.8V, all mosfets should be turned off thus no more power is supplied to the load. Since the sampling frequency in microcontroller is much faster than PI calculation frequency, fast response to variation events of working conditions can be realized. Also only 240µF can thoroughly complete the task of stabilizing the put voltage. Figure 7 shows the put voltage under this efficient control frequency and additional protection control. Events labeled by each capitalized letter in the figure are explained in able III. Under the actual control frequency, PWM signal of each phase can only be renovated in the cycle of 8µs except during protection control. Previous PI coefficients can t be used in such condition, because in each time step of 8µs the put seems of control since the feedback couldn t be concerned at once, so that previous large C P and C I could induce high-amplitude oscillation of the error, which could further generate high derivative manipulation value even with previous small C. Figure 7. Simulation result of V during abrupt variations of load and input voltage events reported in able III under 1MHz sampling frequency and 8µs PI-calculation cycle. ABLE III. VARIAION EVENS LABELE IN FIGURE 7 ime Event V variation A 2.5 ms input 27 V 19V <0.4V B 5 ms load 20A 2A < 0.4V C 7.5 ms load 2A 20A <0.5V 11 ms input 19V 35V < 0.4V E 13.5 ms load 20A 2A <0.4V F 16 ms load 2A 20A <0.4V herefore, three PI coefficients had to be decreased to 0.15, 200 and 2.0e-6 respectively after testing. IV. CONCLUSION he theoretical design of the multiphase interleaved topology has been testified by the simulation under both real-time feedback control and 125 khz control frequency with 1 MHz sampling frequency. Particularly, control logic of self-adapted duty cycle, PI operation for put error and protection control have been realized in the model. However 240µF put capacitor are still needed to help stabilize the put in required range. According to simulation results, technical requirement for put of the converter from automotive industry can been sufficed. While actual performance, especially the PI coefficients and thermal stability of the prototype according to the design will be tested in the experiment. REFERENCES [1]. Bagnoli P.E., Emilio Franchi E., i Pascoli S., hermal analysis of high power hybrid electronic circuits for motorbike regulators, Proceedings of Small Engine echnology Conference and Exibition, pp 1, Pisa, Italy, vol. 1, (2001) [2]. Pennatini A., Stefani F., Cefalo A., AC voltage series regulator for Permanent Magnets Generators, Prime 2009 Ph conference, Cork ( Ireland ), July (2009). [3]. Pennatini A., Bagnoli P. E., Franchi E., AC series voltage regulator for Permanent Magnet Generators., Proceedings of SPEEAM 2010 Conference. NAPOLI: Università degli Studi di Napoli "Federico II", Pisa, Italia pp 1-7, (2010) [4]. Ali Emadi, Sheldon S. Williamson, and Alireza Khaligh," Power Electronics Intensive Solutions for Advanced Electric, Hybrid Electric, and Fuel Cell Vehicular Power Systems" IEEE ransactions on Power Electronics.VOl.21, NO.3, May, (2006). [5]. M. A. Shrud, A. H. Kharaz, A. S. Ashur, A. Faris, M. Benamar, Analysis and Simulation of Automotive Interleaved Buck Converter, World Academy of Science, Engineering and echnology, Vol 63, pp , (2010) [6]. Consoli, G. Scarcella, G. Giannetto, and A.esta, A multiphase C/C converter for automotive dual voltage power systems, Industry Applications Magazine, IEEE, Vol.10, Issue 6, pp , Nov.-ec, (2004 ). [7]. García, P. Zumel, A. de Castro, and José A. Cobos," Automotive C C Bidirectional Converter Made With Many Interleaved Buck Stages" IEEE ransactions On Power Electronics.VOl.21., NO.3, May (2006). [8]. esign and Application Guide of Bootstrap Circuit for High-Voltage Gate-rive IC, Application note AN-6076, Fairchild Semiconductor, September, [9]. Su Whan Sung, Jietae Lee and In-Beum Lee, Process Identification and PI Control, IEEE Press, John Wiley&Sons(Asia) Pte Ltd, 2009.