IRDCiP2021C-1. Overview. IRDCiP2021C-1 Recommended Operating Conditions. Demoboard Quick Start Guide Initial Settings:

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1 REFERENCE DESIGN IRDCiPC- International Rectifier 33 Kansas Street, El Segundo, CA 945 USA IRDCiPC-: 5kHz, 4A, Single Output, Dual Phase Synchronous Buck Converter Featuring ipc and IR363M Overview This reference design is capable of delivering a continuous current of 4A, single output without heatsink at an ambient temperature of 45ºC and airflow of LFM. Fig. 4 Fig. 6 provide performance graphs, thermal images, and waveforms. Fig. Fig. 3 are provided to engineers as design references for implementing an IR363+iPC solution. The components installed on this demoboard were selected based on operation at an input voltage of V (+/-%), a switching frequency of 5kHz (+/- 5%), and an output voltage of.v. Major changes from these set points may require optimizing the control loop and/or adjusting the values of input/output filters in order to meet the user s specific application requirements. Refer to ipc and IR363 datasheets for more information. IRDCiPC- Recommended Operating Conditions (refer to the ipc datasheet for maximum operating conditions) Input voltage: 8.5V 4.5V Output voltage:.8 5V Switching Freq: 5kHz Output current: This reference design is capable of delivering a continuous current of 4A without heatsink at an ambient temperature of 45ºC and airflow of LFM. Demoboard Quick Start Guide Initial Settings: VOUT is set to.v, but can be adjusted from.8v to 5V by changing the values of R and R5 according to the following formula: R = R5 = (k *.8) / (VOUT -.8) The switching frequency is set to 5kHz, but can be adjusted by changing the value of R6. See Fig. 4 for the relationship between R6 and the switching frequency. 8/3/9

2 IRDCiPC- Power Up Procedure:. Apply input voltage across VIN and.. Apply load across VOUT pads and pads. 3. Toggle the SEQ (SW) and EN (SW) switches to the ON position. 4. Adjust load to desired level. See recommendations above.

3 Demoboard Schematic IRDCiPC- D C B A C3 uf C33.uF R R C3 pf C34 B BOARD TP7 TP TP9 +VINS CC +VINS TP3 SYNC R VCC ENABLE SEQ SYNC TRACK PGOOD COMP VSEN Ph_En PWM OCSET C4 pf R5 K R6 R5 K C35 5.6pF C36 C37 7pF C38 R7 R9 K R K R3 K R8 R R R4 C39 39pF C4 R9 R TP4 -VOUTS TP6 -VOUTS R9.6K R7 3.65K L.uH C5 uf TP3 +VOUTS C7 uf C9 uf C uf C3 C5.V PGD TP6 PGOOD PGOOD VREF 7 VREF C4 R6 R47 VP SS SS TP4 FAULT FLT RT R6 78.7K (5kHz) 59.K (6kHz) 6.K (MHz) Title ip & IR363M Eval - Single Output Size: Tabloid Number: Revision: B Date: -Jul-9 Time: :38:39 Sheet of International Rectifier 33 Kansas St. ipowir Group El Segundo CA TP VIN C4 68uF T3 VOUT T5 T VIN T T4 VOUT T6 D C B A : 5 6 5V _SNS VOUT3 3 3 TRACK U3 IRU363M FB COMP FB VSEN 9 5 VP TP EN 6 VP R8 L PH_EN EN VSW VOUT.V Ph_En 7.uH SS PWM_IC PWM PWM C6 C8 C C C4 C6 C8 C3 R3 uf uf uf uf SS TP R34 PWM R3 C5 K TP34.6K.47uF FAULT TP5 3 RT +VOUTS OC R8 R4 FB OCSET 3.65K C5 pf TP VSW VOUT GND 9 OCGnd R5 3.K VOUT TP8 TRACK TP3 SS VIN R35 C3.uF TP4 SS C53 TP7 VDD VOUT3 uf VIN VDD C54 C C C3 C4 C5 C6 C7 C8 C9 C C C TP8 R45 uf uf 6V uf 6V uf 6V uf 6V uf 6V uf 6V uf 6V uf 6V uf 6V uf 6V uf 6V uf 6V R3 K TP7 TRACK TP5 PGOOD SW EN R3 R K R K VCC R4 K EN SEQ SW SEQ SYNC VOUT3 TRK VOUT3 TRK VOUT3 PGD VOUT3 CC FB TP5 FB VSEN PH_EN PWM_IC OC TP CC CC FB TP6 FB VSEN R36 R46 9.3K R7 R3 TP9 EN TP PWM C57 pf C45 uf VDD EN PWM C43 uf R33 K TP9 VOA TP3 VOB TP3 VOA TP3 VOB -VOUTS -VOUTS VSW TP VSW C5 pf C49.47uF R39 VOUT VP VOUT VOUT R4 R4 R43 R44 C7 C9 TP33 VIN TP8 TP37 C6 TP35 VOUT C55 TP36 VOUT C56 TP38 T7 T9 VIN ENA PWM 5 7 CVCC VIN VIN 4 9 ENA PWM U ip VSW VSW OC R37 R38 R48 R49 VOSS+ VOSD- VOSS C6 uf VOSD+ VOS+ VOS- VOS- C58 VOUT C59 uf C6 C44 C46 uf C47 C48 Fig. Schematic 3

4 IRDCiPC- Bill of Material Quantity Designator Type Type Value Value Tolerance Packag e Manufac Manufac No 6 C, C, C3, C4, C5, C6, C7, C8, C9, C, C, C, C7, C8, C, C capacitor X7R.uF 6V % 6 TDK C36X7RC6KT C3, C33 capacitor X7R.uF 5V % 63 TDK C68X7RH4K C4 capacitor electrolytic 68uF 6V % SMD Panasonic EEV-FKC68GP 4 C5, C6, C9, C capacitor X5R uf 6.3V % TDK C35X5RJ7M 6 C3, C43, C45, C53, C54, C6 capacitor X7R.uF 6V % 63 TDK C68X7RC5KT 4 C3, C4, C5, C5 capacitor NPO pf 5V 5% 63 Phycomp 63CGJ9B C35 capacitor NPO 5.6pF 5V +/-.5pF 63 KOA NPO63HTTD5R6D C37 capacitor X7R 7pF 5V % 63 KOA X7R63HTTD7K C39 capacitor NPO 39pF 5V 5% 63 KOA NPO63HTTD39J C46, C59 capacitor tantalum polymer uf.5v % 7343 Sanyo R5TPCM C49, C5 capacitor X7R.47uF 6V % 63 TDK C68X7RC474KT C57 capacitor X7R pf 5V % 63 BC Component 63BK5NT L, L inductor ferrite.uh 47A % SMT Vitec 59PR9873N 8 R, R, R9, R3, R3, R4, R33, R34 resistor thick film.k /W % 63 KOA RK73HJF R, R5 resistor thick film.k /W % 63 KOA RK73HJF R3, R4, R6, R7, R8, R3, R3, R38, R39, R4, R49 resistor thick film /W % 63 KOA RK73ZJLTD R7, R8 resistor thick film 3.65K /W % 63 KOA RK73HJLTD365F R9 resistor thick film /8W <5m 85 ROHM MCREZHJ R5 resistor thick film 3.K /W % 63 KOA RK73HJ3F R6 resistor thick film 78.7K /W % 63 KOA RK73HJLTD787F R9, R3 resistor thick film.6k /W % 63 KOA RK73HJLTD6F R35 resistor thick film /8W <5m 6 Panasonic ERJ-8GEYR 4 R4, R4, R43, R44 resistor manganin-foil W n/a 87 Isotek Corp SMT-R R46 resistor thick film 9.3K /W % 63 KOA RK73HJLTD93F R5 resistor thick film.k /W % 63 KOA RK73HJLTDF R7 resistor thick film /W % 63 KOA RK73HJF SW, SW switch slide SPDT 3VDC.A pcb mount E-Switch EG8 8 TP, TP, TP3, TP4, TP5, TP6, TP7, TP8, TP7, TP8, TP9, TP3, TP3, TP3, TP33, TP34, TP35, TP36 TP9, TP, TP, TP, TP3, TP4, TP5, TP6, TP7, TP8, TP9, TP, TP, TP, TP3, TP4, TP5, TP6, TP37, TP38 hardware test point 9 mils x 5 mils - 56 Keystone 56 hardware test point 6 mils 4 x 5 mils - 55 Keystone 55 U ip LGA unit rev a mm x mm IRF rev a U3 IC analog PWM controller -.5-6V -.5-6V -4 - C MLPQ-3L IRF IR363M 4

5 Demoboard Component Placement IRDCiPC- Fig. Top Layer (Face View) Fig. 3 Bottom Layer (Through View) 5

6 IRDCiPC- Description of Test Points and Connectors. Jumpers Jumper Pin Name Description SW EN Board Enable ( switch Up = Off, Down = On ) - Vin pin on top SW SEQ Sequence ( switch Up = Off, Down = On ) - Vin pin on top. Test Points/Connectors Test Point Pin Name Description T / T VIN / Vin supply voltage T P / TP8 VIN / Vin supply voltage sense T3 / T5 / T7 VOUT / / Channel Output, connect to DC load TP35 / TP33 VOUT / Channel Output sense TP / TP37 VSW / Channel switch node / test points TP9 EN Channel Enable test point TP PWM Channel PWM test point TP9 CC Channel error amplifier output TP5 FB Channel error amplifier non-inverting input T4 / T6 / T9 VOUT / / Channel Output, connect to DC load TP36 / TP34 VOUT / Channel Output sense TP / TP38 VSW / Channel switch node / test points TP EN Channel Enable test point TP PWM Channel PWM test point TP CC Channel error amplifier output TP6 FB Channel error amplifier non-inverting input TP7 / TP8 VDD / Supply voltage for IRU363 and ipowir module TP3 SYNC External frequency synchronization input TP7 TRACK Channel tracking input, pull-up to Vout3 if not used TP8 TRACK Track test point TP5 PGOOD Channel Power good test point TP6 PGOOD Channel Power good test point TP3 SS Channel Soft start test point TP4 SS Channel Soft start test point TP4 FAULT Fault monitor test point 3. Test points for Efficiency Measurement Test Point Pin Name Description TP / TP4 +VINS / -VOUTS Channel Vin sense for efficiency measurement TP3 / TP4 +VOUTS / -VOUTS Channel Output sense for efficiency measurement TP7 / TP6 +VINS / -VOUTS Channel Vin sense for efficiency measurement TP5 / TP6 +VOUTS / -VOUTS Channel Output sense for efficiency measurement 6

7 Test Results IRDCiPC- Fig. 4 Relationship Between Switching Frequency and R6 VIN = V, VOUT =.V, I out = 4A, f sw = 5 khz Fig. 5 Power Up Sequence (C3: EN, C: SS, C4: VOUT) VIN = V, VOUT =.V, I out = 4A, f sw = 5 khz Fig. 6 Power Down Sequence (C3: EN, C: SS, C4: VOUT) 7

8 IRDCiPC- VIN = V, VOUT =.V, f sw = 5 khz Fi g. 7 Hiccup Mode Over Current Protection (C: SS, C4: I out, C3: VOUT) VIN = V, VOUT =.V, f sw = 5 khz Fi g. 8 Hiccup Mode Over Current Protection (C: SS, C4: I out, C3: VOUT) Fig. 9 Deadtime and Ringing on Switch Node 8

9 IRDCiPC- VIN = V, VOUT =.V, I = A, f = 5 khz out sw V p-p = mv Fig. Output Voltage DC Ripple VIN = V, VOUT =.V, I out = A, f sw = 5 khz Fig. Output Voltage DC Ripple VIN = V, VOUT =.V, I out = -4A,.5A/µs, f sw = 5 khz Fig. Load Transient Response (C: VOUT AC, C: I out divided by ) 9

10 IRDCiPC- fc = 65 khz PM = 49 Fig. 3 Bode Plot (VIN = V, VOUT =.V, I out = A) Current Sharing Accuracy The accuracy of current sharing is tested by measuring the DC voltage across the two inductors at the following operating conditions: VIN = V; VOUT =.V; I out = 4A. The test results are shown below: Table Inductor DC Voltages at Different Currents for Single Output Configuration I out (A) V L (mv) V L (mv)

11 IRDCiPC VIN = V, VOUT =.V, LFM, fsw = 5kHz, No Heatsink 45C Room Temperature Power Loss (W) Load Current (A) Fig. 4 Power Loss VIN = V, VOUT =.V, LFM, fsw = 5kHz, No Heatsink 9% 9% 88% 86% Efficiency 84% 8% 8% 78% 76% 74% 7% 45C Room Temperature Load Current (A) Fig. 5 Efficiency

12 IRDCiPC- Fig. 6 Thermal Image: I out = 4A, VIN = V, VOUT =.V, TA = 45 o C, f sw = 5kHz, LFM, No Heatsink, Maximum IC Temperature = 94. o C Refer to the following application notes for detailed guidelines and suggestions when implementing ipowir Technology products: AN-43: Stabilize the Buck Converter with Transconductance Amplifier This paper explains how to design the voltage compensation network for Buck Converters with Transconductance Amplifier. The design methods and equations for Type II and Type III compensation are given. AN-8: Recommended Design, Integration and Rework Guidelines for International Rectifier s ipowir Technology BGA and LGA and Packages This paper discusses optimization of the layout design for mounting ipowir BGA and LGA packages on printed circuit boards, accounting for thermal and electrical performance and assembly considerations. Topics discussed include PCB layout placement, and via interconnect suggestions, as well as soldering, pick and place, reflow, inspection, cleaning and reworking recommendations. AN-3: Applying ipowir Products in Your Thermal Environment This paper explains how to use the Power Loss and SOA curves in the data sheet to validate if the operating conditions and thermal environment are within the Safe Operating Area of the ipowir product. AN-47: Graphical solution for two branch heatsinking Safe Operating Area Detailed explanation of the dual axis SOA graph and how it is derived. Use of this design for any application should be fully verified by the customer. International Rectifier cannot guarantee suitability for your applications, and is not liable for any result of usage for such applications including, without limitation, personal or property damage or violation of third party intellectual property rights. IR WORLD HEADQUARTERS: 33 Kansas St., El Segundo, California 945, USA Tel: (3) 5-75 TAC Fax: (3)