Factors Affecting the Reliability of VSC-HVDC for the Connection of Offshore Windfarms

Transcription

1 Factors Affecting the Reliability of VSC-HVDC for the Connection of Offshore Windfarms A thesis submitted to The University of Manchester for the degree of Doctor of Philosophy in the Faculty of Engineering and Physical Sciences 2014 Antony James Beddard School of Electrical and Electronic Engineering

2 Table of Contents Table of Contents Table of Contents... 2 List of Figures... 7 List of Tables Nomenclature Abstract Declaration Copyright Statement Acknowledgements Introduction Background The Connection of Round 3 Windfarms Impact Factors on the Connection s Reliability Availability Analysis HVDC Circuit Breakers Accurate Electromagnetic Transient Models for Radial and MT VSC-HVDC Connections Aims and Objectives Main Thesis Contributions Publications Thesis Structure Availability Analysis Radial System Component Availability Converter Reactor MMC with Cooling System and Ventilation System Control System GIS and Transformer DC Switchyard DC Cable Radial VSC-HVDC Scheme Availability Analysis Offshore System Availability Analysis (subsystem 1)

3 Table of Contents Onshore System Availability Analysis (subsystem 3) DC System Availability Analysis (subsystem 2) Radial VSC-HVDC Scheme Availability MT HVDC Network Availability Analysis Cost-benefit Analysis Summary Conclusion HVDC Protection Basic Circuit Breaker Theory The Electric Arc Arc Interruption HVDC Circuit Breaker Topologies Review of HVDC Circuit Breaker Topologies Hybrid Commutation HVDC Breaker (New) Latest HVDC Circuit Breaker Designs Comparison of HVDC Circuit Breakers Protection Strategies Protection System Requirements Detection and Selection Back-up Protection Seamless and Robust Protection System Conclusion MMC-HVDC MMC Structure and Operation MMC Parameters Number of MMC Levels SM Capacitance Limb Reactance Arm Resistance Onshore AC Network DC system Cable DC Braking Resistor

4 Table of Contents 4.5 Offshore AC Network Control Systems Control Systems for an MMC Connected to an Active Network dq Current Controller Outer Controllers Tap-Changer Controller Control System for MMC Connected to a Windfarm Inner MMC Controllers Windfarm Control Conclusion MMC-HVDC Link Performance Radial MMC-HVDC Link for a Round 3 Windfarm Start-up Windfarm Power Variations MMC Onshore AC Fault Ride-through DC Faults VSC-HVDC Interconnector Power Reversal AC Faults DC Faults Variable Limit DC Voltage Controller Conclusion Comparison of MMC Modelling Techniques MMC Modelling Techniques Traditional Detailed Model Detailed Equivalent Model Accelerated Model Simulation Models Results Accuracy AM Simulation Limitation Simulation Speed

5 Table of Contents Enhanced AM Model Analysis and Recommendations Conclusion HVDC Cable Modelling The Cable Multi-conductor Analysis HVDC Cable Models System Model Results Accuracy Simulation Speed Conclusion MTDC MMC Modelling MTDC Test Topology MTDC Control Methods Centralised DC Slack Bus Voltage Margin Control Droop Control Control Methods Investigated MTDC System Model Windfarm Power Variations Three-phase Line-to-Ground Fault at PCC Converter Disconnection Conclusion Conclusion and Future Work Conclusion Availability Analysis HVDC Protection VSC-HVDC System Modelling Future Work Availability Analysis HVDC Breakers

6 Table of Contents MMC Modelling References APPENDIX 1A HVDC TRANSMISSION SYSTEMS APPENDIX 2A COMPONENT RELIABILITY INDICES APPENDIX 2B RELIABILITY CONCEPTS AND DEFINITIONS APPENDIX 2C MTDC GRID ANALYSIS APPENDIX 3A HVDC CIRCUIT BREAKER REVIEW APPENDIX 4A SUB-MODULE CAPACITANCE DERIVATION APPENDIX 4B ARM INDUCTANCE DERIVATION APPENDIX 4C SHORT-CIRCUIT RATIO CALCULATION APPENDIX 4D ABC TO DQ TRANSFORMATION DERIVATION APPENDIX 4E POWER CONTROLLER TRANSFER FUNCTION DERIVATION APPENDIX 4F DC VOLTAGE CONTROLLER TRANSFER FUNCTION DERIVATION APPENDIX 4G AC VOLTAGE CONTROL APPENDIX 4H KEY PARAMETERS FOR THE MMC-HVDC LINK APPENDIX 5A DC POLE-TO-GROUND FAULT APPENDIX 6A PARAMETERS FOR MMC COMPARISON MODEL APPENDIX 7A HVDC CABLE PARAMETERS, BONDING AND SENSITIVITY ANALYSIS Word count: 53,083 (72,601 with appendix) 6

7 List of Figures List of Figures Figure 1.1: Connection diagram for the UK s windfarms Figure 1.2: Accelerated growth 2030 transmission system scenario potential connection diagram, Figure 2.1: 1GW VSC-HVDC point-to-point offshore connection overview diagram Figure 2.2: 1GW point-to-point VSC-HVDC scheme Figure 2.3: VSC-HVDC availability model for a point-to-point link Figure 2.4: Image of a MMC sub-module Figure 2.5: Image of a 245kV GIS bay Figure 2.6: Image of a 150kV, 140MVA transformer and offshore platform Figure 2.7: Offshore GIS and transformer configuration (Subsystem 4) Figure 2.8: Onshore GIS and transformer configuration (Subsystem 5) Figure 2.9: Image of a MMC VSC DC Switchyard Figure 2.10: Availability model for offshore system (Subsystem 1) Figure 2.11: Simplified availability model for offshore system (Subsystem 1) Figure 2.12: Offshore transformers and GIS configuration (Subsystem 4) Figure 2.13: Availability model of subsystem Figure 2.14: Availability model for the VSC-HVDC scheme Figure 2.15: Component importance for availability Figure 2.16: MT HVDC system Figure 2.17: Onshore and offshore nodes Figure 2.18: Block diagram of MTDC network Figure 2.19: Simplified two-state block diagram of a MTDC network Figure 3.1: Single line diagram for a four-terminal HVDC system Figure 3.2: Passive resonance circuit breaker Figure 3.3: Conventional hybrid circuit breaker Figure 3.4: Hybrid breaker with forced commutation circuit Figure 3.5: Solid-state circuit breaker Figure 3.6: Hybrid commutation HVDC circuit breaker Figure 3.7: PSCAD schematic for the hybrid commutation HVDC circuit breaker Figure 3.8: Example simulation results for the hybrid commutation HVDC circuit breaker Figure 3.9: Proactive hybrid DC breaker

8 List of Figures Figure 3.10: Hybrid circuit breaking device Figure 3.11: Single line diagram for a four-terminal HVDC system Figure 3.12: Cable directional protection Figure 3.13: STFT (left) and Wavelet (right) views of signal analysis Figure 3.14: DC current direction before (left) and after (right) cable fault Figure 3.15: Fault on cable C Figure 3.16: Back-up protection strategies Figure 4.1: MMC VSC-HVDC link for Round 3 windfarm Figure 4.2: Three-phase MMC Figure 4.3: SM conduction states Figure 4.4: Equivalent circuit for phase A Figure 4.5: Onshore AC system Figure 4.6: DC braking resistor Figure 4.7: Simplified diagram of a full scale converter wind turbine Figure 4.8: Representation of the offshore network Figure 4.9: MMC control system basic overview Figure 4.10: MMC phase A connection to AC system Figure 4.11: Equivalent dq circuit diagrams Figure 4.12: State-block diagram for system plant in dq reference frame Figure 4.13: State-block diagram with feedback nulling Figure 4.14: Decoupled d and q current control loops Figure 4.15: d-axis current loop without d-axis system voltage disturbance Figure 4.16: Simplified d-axis current control loop Figure 4.17: Current controller step response for a bandwidth of 80Hz Figure 4.18: Current controller step response for a bandwidth of 160Hz Figure 4.19: Current controller step response for a bandwidth of 320Hz Figure 4.20: Current controller step response for a bandwidth of 320Hz with tap-changer ratio increased Figure 4.21: Current controller step response for a bandwidth of 320Hz with increased SM capacitance Figure 4.22: dq current controller implementation Figure 4.23: System response for a 10% change in active power Figure 4.24: System response for a 10% change in reactive power

9 List of Figures Figure 4.25: DC side plant Figure 4.26: System response for a 1kV step change about the operating point, K v = Figure 4.27: System response for a ramped injected noise current of 1.6kA in 1 second. 115 Figure 4.28: MMC phase A connection to the AC network with the system resistances neglected Figure 4.29: System response for weak AC network with reactive power set to zero Figure 4.30: System response for weak AC network with AC voltage control Figure 4.31: MMC output voltage THD when exporting 300MVAr with no tap-changer 118 Figure 4.32: MMC output voltage THD when exporting 300MVAr with tap-changer Figure 4.33: Implementation of the AC voltage controller for the offshore network Figure 4.34: Equivalent circuit for a single phase of a MMC Figure 4.35: CCSC plant state-block diagram Figure 4.36: CCSC response to active power ramped at 1GW/s for 1s starting at 2s with a BW of 10Hz Figure 4.37: CCSC response to active power ramped at 1GW/s for 1s starting at 2s with a BW of 30Hz Figure 4.38: Block diagram of CCSC implementation Figure 4.39: Simplified diagram of the capacitor balancing controller Figure 4.40: NLC block diagram Figure 4.41: Block diagram for the windfarm power controller Figure 4.42: Implementation of the windfarm power controller Figure 5.1: MMC VSC-HVDC link for a Round 3 windfarm Figure 5.2: Start-up procedure; capacitor voltages are for the upper arm of phase A for MMC Figure 5.3: Link response to variations in windfarm power Figure 5.4: Link response at steady-state for P w =1GW Figure 5.5: THD for the line-to-line voltages at PCC1 for P w = 1GW Figure 5.6: Phase voltages, arm currents and difference currents for onshore MMC with P w =1GW Figure 5.7: Phase voltages, arm currents and difference currents for onshore MMC with P w =1GW and CCSC disabled Figure 5.8: Rms value of the upper arm current for phase A with P w =1GW and CCSC enabled

10 List of Figures Figure 5.9: Rms value of the upper arm current for phase A with P w =1GW and CCSC disabled Figure 5.10: THD for the line-to-line voltages at PCC1 for P w = 1GW and CCSC disabled Figure 5.11: SM capacitor ripple voltages for the upper arm of phase A with P w =1GW Figure 5.12: SM capacitor ripple voltages for the upper arm of phase A with P w =1GW and CCSC disabled Figure 5.13: Supergrid voltage dip to 0.3p.u. with no MMC reactive current support Figure 5.14: Supergrid voltage dip to 0.3p.u. with MMC reactive current support Figure 5.15: Phase A to ground fault at 3s and phase A to phase B fault at 4s Figure 5.16: Three-phase to ground fault at 3s Figure 5.17: DC line-to-line fault at the terminals of MMC1 at 3s Figure 5.18: Positive pole-to-ground fault at MMC Figure 5.19: Positive pole-to-ground fault at MMC1 with under voltage protection Figure 5.20: MMC VSC-HVDC interconnector Figure 5.21: System response for a wide range of active and reactive power orders Figure 5.22: Three-phase fault for 140ms at 3s Figure 5.23: DC line-to-ground fault Figure 5.24: Comparison of active power response for a 140ms three-phase AC fault using fixed and variable limits Figure 6.1: SM circuit (left) SM equivalent circuit (right) Figure 6.2: String of SM Thevenin equivalent circuits (left) Converter arm Thevenin equivalent circuit (right) Figure 6.3: PSCAD half-bridge MMC arm component Figure 6.4: Implementation steps for the accelerated model Figure 6.5: Basic simulation model structure Figure 6.6: Steady-state simulation results for the three models Figure 6.7: DC line-to-line fault applied at 4.5s Figure 6.8: Line-to-ground fault for phase A applied at 4.5s Figure 6.9: Phase A output voltage for the three models when the converter is blocked at 3s Figure 6.10: Blocked SM test circuit Figure 6.11: Implementation of blocked SM test circuit based on AM principles

11 List of Figures Figure 6.12: Simulation times of the three models for different MMC levels Figure 6.13: Line-to-ground fault for phase A applied at 4.5s for the TDM, AM and AM30 models Figure 7.1. Image of a submarine XLPE HVDC cable Figure 7.2: MTDC test model Figure 7.3: Onshore AC power response to windfarm power variations Figure 7.4: DC voltage response at MMC2 for a DC line-to-line fault at the terminals of MMC Figure 7.5: DC current response at MMC2 for a DC line-to-line fault at the terminals of MMC Figure 7.6: AC power response at PCC1 for a three-phase line-to-ground fault at PCC1.180 Figure 7.7: DC voltage response at MMC1 for a three-phase line-to-ground fault at PCC Figure 8.1: Accelerated growth 2030 transmission system scenario potential connection diagram Figure 8.2: MTDC test topology Figure 8.3: Standard V dc -I dc characteristic; DC slack bus (Left) voltage margin control (Right) Figure 8.4: Implementation of the voltage margin controller Figure 8.5: Standard V dc -I dc characteristic for voltage droop control Figure 8.6: Implementation of voltage droop controller Figure 8.7: V dc -I dc characteristic for voltage droop control with dead band Figure 8.8: MTDC test model Figure 8.9: MTDC system response to windpower variations when employing a centralised DC slack bus Figure 8.10: MTDC system response to windpower variations when employing voltage margin control bus Figure 8.11: MTDC system response to windpower variations when employing standard droop control bus Figure 8.12: MTDC system response to a three-phase to ground fault when employing a centralised DC slack bus Figure 8.13: MTDC system response to a three-phase to ground fault when employing voltage margin control

12 List of Figures Figure 8.14: MTDC system response to a three-phase to ground fault when employing standard droop control Figure 8.15: Impact of MTDC control methods on the upper arm current for phase A of MMC1 for a three-phase to ground fault Figure 8.16: MTDC response for MMC3 disconnected at approximately 2s and for MMC1 disconnected at approximately 3s when employing a centralised DC slack bus Figure 8.17: MTDC response for MMC3 disconnected at approximately 2s and for MMC1 disconnected at approximately 3s when employing voltage margin control Figure 8.18: MTDC response for MMC3 disconnected at approximately 2s and for MMC1 disconnected at approximately 3s when employing standard droop control Figure A.1: Overview of a HVDC connection and a HVAC connection Figure A.2: CSC-HVDC monopole scheme with metallic return Figure A.3: Six-pulse converter Figure A.4: PSCAD simulation of CSC converter switching waveforms for a firing angle of Figure A.5: PSCAD simulation of CSC converter switching waveforms for a firing angle of Figure A.6: PSCAD simulation of switching waveforms for CSC converter with AC side reactance and firing angle of Figure A.7: PSCAD simulation of phase current for six-pulse converter (left) and twelvepulse converter (right) Figure A.8: VSC-HVDC scheme Figure A.9: Three-phase two-level voltage source converter Figure A.10: Sinusoidal voltage synthesised from a two-level converter with PWM Figure A.11: Single phase of a diode neutral clamped voltage source converter Figure A.12: Sinusoidal voltage synthesised from a three-level converter with PWM Figure A.13: Single phase of an active neutral clamped voltage source converter Figure A.14: Three-phase MMC Figure A.15: Sinusoidal voltage synthesised from a MMC Figure A.16: Sinusoidal voltage synthesised from a 400MW MMC with 200 modules per arm

13 List of Figures Figure A.17: Single phase of a two-level cascaded converter Figure A.18: CTL Converter voltage for a fundamental frequency of 50Hz Figure A.19: Image of a MMC VSC DC switchyard Figure A.20: Relationship between MTBF, MTTF and MTTR Figure A.21: Product lifecycle Figure A.22: Mechanical breaker with turn-off snubber Figure A.23: DC/DC resonance converter Figure A.24: HVDC circuit breaker arrangement and method (ABB, Nov 2008) Figure A.25: Transformer arrangement Figure A.26: GTO thyristor circuit breaker Figure A.27: IGBT circuit breaker Figure A.28: Single-phase equivalent circuit for MMC Figure A.29: DC side plant Figure A.30: SFSB for DC voltage control loop Figure A.31: MMC phase A connection to the AC network with the system resistances neglected Figure A.32: Positive pole-to-ground fault at MMC1 with under voltage protection and a star-point reactor Figure A.33: Positive pole-to-ground fault at MMC1 with under voltage protection and DC surge arresters (no star-point reactor) Figure A.34: Cable parameter sensitivity test model Figure A.35: Effect of semi-conductor screen thickness on the receiving end voltage Figure A.36: Effect of insulation design on the receiving end voltage Figure A.37: Effect of sheath design on the receiving end voltage Figure A.38: Effect of armour design on the receiving end voltage Figure A.39: Effect of inner jacket design on the receiving end voltage Figure A.40: Effect of outer jacket design on the receiving end voltage Figure A.41: Effect of sea-return impedance on the receiving end voltage

14 List of Tables List of Tables Table 2.1: Mean time to access the offshore platform based on components/spare part size Table 2.2: Estimated reliability indices for converter reactors Table 2.3: Estimated reliability indices for MMC with ventilation system and cooling system Table 2.4: Estimated reliability indices for control system Table 2.5: Estimated reliability indices for GIS Table 2.6: Estimated reliability indices for transformers Table 2.7: Estimated reliability indices for DC switchyard Table 2.8: Estimated submarine cable reliability indices Table 2.9: Availability of offshore components Table 2.10: Example GIS failure modes and consequences Table 2.11: Available capacity table for subsystem Table 2.12: Available capacity table for the offshore subsystem (Subsystem 1) Table 2.13: Availability of onshore components Table 2.14: Available capacity table for subsystem Table 2.15: Available capacity table for the onshore system (Subsystem 3) Table 2.16: Available capacity table for the DC system (Subsystem 2) Table 2.17: Available capacity table of radial VSC-HVDC scheme Table 2.18: Cable sensitivity analysis Table 2.19: Equivalent available capacity table for subsystem Table 2.20: Two-state capacity availability tables Table 2.21: Truth table for MTDC network Table 2.22: Probability table for MTDC network Table 2.23: Capacity table for MTDC network with Sub6=Sub7=900MW Table 2.24: Capacity availability table for MTDC network with Sub6=Sub7=900MW Table 2.25: Capacity availability table for regional MTDC network with Sub6=Sub7=1200MW Table 2.26: Capacity availability table for MTDC network with Sub6=Sub7=1800MW Table 2.27: VSC converter costs Table 2.28: HVDC extruded cable costs Table 2.29: Cable installation costs

15 List of Tables Table 2.30: HVDC transmission scheme costs excluding offshore nodes Table 2.31: Economic cost-benefit analysis Table 3.1: Comparison of HVDC breaker types Table 4.1: IEC harmonic voltage limits for high voltage systems Table 4.2: IEEE519 harmonic voltage limits Table 4.3: Nominal transformer parameters Table 4.4: Calculated time constants for commercial wind turbines Table 6.1: Normalised MAE for the DEM and AM waveforms when operating in steadystate at 1GW Table 6.2: Normalised MAE for the DEM and AM waveforms when operating in steadystate at 500MW Table 6.3: Normalised MAE for the DEM and AM waveforms when operating in steadystate at 100MW Table 6.4: Normalised mean absolute error for the DEM and AM waveforms for a DC lineto-line fault Table 6.5: Normalised mean absolute error for the DEM and AM waveforms for a line-toground AC Table 6.6: Comparison of run times for the three models for a 5 second simulation Table 6.7: Comparison of run times for different AM models Table 6.8: Normalised mean absolute error for the AM and AM10 waveforms for a line-toground AC fault Table 7.1: Physical data for a 300kV 1GW submarine HVDC cable Table 8.1: Control methods investigated Table 8.2 : Maximum and rms values for Figure Table A.1: Evolution of VSC-HVDC technology Table A.2: Circuit breaker MTTF and MTTR values given in sources 1 to Table A.3: Cigre high voltage circuit breaker reliability data Table A.4: Failure statistics from the 1996 survey for GIS commissioned after Table A.5: Estimated reliability indices for GIS Table A.6: Transformer failure statistics given in sources 1 to Table A.7: Estimated reliability indices for transformer Table A.8: Converter reactor reliability values given in sources 1 to

16 List of Tables Table A.9: Murraylink energy availability Table A.10: Estimated converter reactor reliability indices Table A.11: MMC failure statistics given in sources 1 to Table A.12: Estimated MMC reliability indices Table A.13: Control and protection failure statistics given in sources 1 to Table A.14: Availability of DNV duplicated control system Table A.15: Estimated control system reliability indices Table A.16: DC equipment failure statistics given in sources 1 to Table A.17: Analysis of the DC equipment failure statistics from the World HVDC survey Table A.18: Estimated reliability indices for DC switchyard Table A.19: DC cable failure statistics given in sources 1 to Table A.20: Estimated reliability indices for submarine cable Table A.21: Truth table for the simplified MTDC system Table A.22: Capacity probability tables for MTDC with 900MW paths back to shore Table A.23: Key parameters for the MMC-HVDC link Table A.24: Parameters for MMC comparison model Table A.25: Submarine HVDC Light 320kV cable with copper conductor in a moderate climate with close laying Table A.26: XLPE land cable systems

17 Nomenclature Nomenclature List of Acronyms AC AM CBC CCSC CEPIM COPT CSC DC DCCB DC-XLPE DEM DNV EAM EMT EMTDC EMTP-RV FDMM FDPM FS GIS GTO HVAC HVDC IGBT LCC MAE MMC MOAT MRTB MT MTDC Alternating Current Accelerated Model Capacitor Balancing Controller Circulating Current Suppressing Controller Coupled Equivalent PI Model Capacity Outage Probability Table Current Source Converter Direct Current Direct Current Circuit Breaker Direct Current Cross-Linked Polyethylene Detailed Equivalent Model Det Norske Veritas Enhanced Accelerated Model Electromagnetic Transient Electromagnetic Transients Including DC Electromagnetic Transients Program Restructured Version Frequency Dependent Mode Model Frequency Dependent Phase Model Firing Signal Gas-insulated Switchgear Gate Turn-off Thyristor High Voltage Alternating Current High Voltage Direct Current Insulated Gate Bipolar Transistor Line Commutated Converter Mean Absolute Error Modular Multi-level Converter Mean Offshore Access Time Metallic Return Transfer Breaker Multi-terminal Multi-terminal Direct Current 17

18 Nomenclature MTTF Mean Time To Failure MTTR Mean Time To Repair NETS SQSS National Electricity Transmission System Security and Quality of Supply Standard NFSS Nested Fast and Simultaneous Solution NLC Nearest Level Control ODIS Offshore Development and Information Statement PCC Point of Common Coupling SCR Short-circuit Ratio SM Sub-module STFT Short-time Fourier Transform TDM Traditional Detailed Model THD Total Harmonic Distortion TRV Transient Recovery Voltage VSC Voltage Source Converter XLPE Cross-Linked Polyethylene List of Main Symbols Symbol Definition S.I. Units A Availability p.u./% B DC Breaker - BRK AC Breaker - BW ic Bandwidth of inner current controller rad/s BW p Bandwidth of power controller rad/s C Capacitance F C eq MMC equivalent capacitance F C SM Sub-module capacitance F G Conductance S I Current A I 2f Circulating current (appendix) A I (abc) Phase currents A I arm Arm current A 18

19 Nomenclature I b Current through breaker / phase b current A I c Current through commutation path / phase c current A I cap Capacitor current A I circ Circulating current A I dc DC current A I diff Difference current A I dq dq current A I g DC current per phase leg A I L Line current A I l(abc) Lower arm phase currents A I s Current through surge arrester A I sm Sub-module current A I sx(abc) Phase currents at PCC x where x = 1 to 4 A I u(abc) Upper arm phase currents A K i Integral gain - K p Proportional gain - L Inductance H L arm Arm inductance H L s System inductance H L T Transformer inductance H N Number of sub-modules - NL Number of levels - N p Number of turns on the primary winding - N s Number of turns on the secondary winding - p d/dt - P Active power W P d DC power W P drated DC rated power W P i Input power W P tf Power transfer function W P w Windfarm active power W Q Reactive power VAr Q w Windfarm reactive power VAr 19

20 Nomenclature R Resistance Ω R arm Arm resistance Ω R brak Braking resistor Ω R eq Equivalent resistance Ω R off IGBT/diode off-state resistance Ω R on IGBT/diode on-state resistance Ω R T Transformer resistance Ω S Switch / Apparent power -/VA s Laplace operator - SA Surge arrester - S dq dq apparent power VA τ time constant S T Semi-conductor switch with turn-off capability - T i Integral time constant S ν Wind speed m/s V Voltage V V c(abc) Internal converter phase voltages V V cap Capacitor voltage V V c(dq) dq converter voltage V V dc DC voltage V V dcnom DC nominal voltage V V diff Difference voltage V V dq dq voltage V V eq Equivalent voltage V V l(abc) Lower arm phase voltages V V n(abc) Network phase voltages V V s(dq) dq voltages at PCC referred to primary converter winding V V SM Sub-module voltage V V sx(abc) Phase voltages at PCC x where x = 1 to 4 V V Tp Transformer primary winding voltage V V Ts Transformer secondary winding voltage V V u(abc) Upper arm phase voltages V V w(dq) dq windfarm voltage V 20

21 Nomenclature V x(abc) Output phase voltages for converter x, where x = 1 to 4 V W Energy J * x Set-point - x Error - ˆx Peak - X Reactance Ω X T Transformer leakage reactance Ω Y Admittance S Z Impedance Ω Z n Network impedance Ω δ c Converter angle Rad ΔW SM Variation in sub-module stored energy J ζ Damping ratio - ω System frequency rad/s ω n Natural frequency rad/s ε Capacitance ripple voltage factor - θ Angle rad 21

22 Abstract Abstract Name of University: The University of Manchester Candidate s name: Antony James Beddard Degree Title: Doctor of Philosophy Thesis Title: Factors Affecting the Reliability of VSC-HVDC for the Connection of Offshore Windfarms Date: April 2014 The UK Government has identified that nearly 15% of the UK s electricity generation must come from offshore wind by The reliability of the offshore windfarms and their electrical transmission systems is critical for their feasibility. Offshore windfarms located more than km from shore, including most Round 3 offshore windfarms, are likely to employ Voltage Source Converter (VSC) High Voltage Direct Current (HVDC) transmission schemes. This thesis studies factors which affect the reliability of VSC- HVDC transmission schemes, in respect to availability, protection, and system modelling. The expected availability of VSC-HVDC systems is a key factor in determining if Round 3 offshore windfarms are technically and economically viable. Due to the lack of publications in this area, this thesis analyses the energy availability of a radial and a Multi- Terminal (MT) VSC-HVDC system, using component reliability indices derived from academic and industrial documentation, and examining the influence of each component on the system s energy availability. An economic assessment of different VSC-HVDC schemes is undertaken, highlighting the overall potential cost savings of HVDC grids. The connection of offshore windfarms to a MT HVDC system offers other potential benefits, in comparison to an equivalent radial system, including a reduction in the volume of assets and enhanced operational flexibility. However, without suitable HVDC circuit breakers, a large MT HVDC system would be unviable. In this thesis, a review of potential HVDC circuit breaker topologies and HVDC protection strategies is conducted. A HVDC circuit breaker topology, which addresses some of the limitations of the existing designs, was developed in this thesis, for which a UK patent application was filed. Accurate simulation models are required to give a high degree of confidence in the expected system behaviour. Modular Multi-level Converters (MMCs) are the preferred HVDC converter topology, however modelling MMCs in Electromagnetic Transient (EMT) simulation programs has presented a number of challenges. This has resulted in the development of new modelling techniques, for which the published validating literature is limited. In this thesis these techniques are compared in terms of accuracy and simulation speed and a set of modelling recommendations are presented. Cable models are the other main DC component which, upon analysis, is found to have a significant impact on the overall model s simulation results and simulation time. A set of modelling recommendations are also presented for the leading cable models. Using the modelling recommendations to select suitable MMC models, radial and MT EMT MMC-HVDC models for the connection of typical Round 3 windfarms are developed in this thesis. These models are used to analyse the steady-state and transient performance of the connections, including their compliance to the GB grid code for AC disturbances and reactive power requirements. Furthermore, the MT model is used to investigate the effect of MT control strategies on the internal MMC quantities. 22

23 Declaration and Copyright Statement Declaration No portion of the work referred to in the thesis has been submitted in support of an application for another degree or qualification of this or any other university or other institute of learning. Copyright Statement The author of this thesis (including any appendices and/or schedules to this thesis) owns certain copyright or related rights in it (the Copyright ) and s/he has given The University of Manchester certain rights to use such Copyright, including for administrative purposes. Copies of this thesis, either in full or in extracts and whether in hard or electronic copy, may be made only in accordance with the Copyright, Designs and Patents Act 1988 (as amended) and regulations issued under it or, where appropriate, in accordance with licensing agreements which the University has from time to time. This page must form part of any such copies made. The ownership of certain Copyright, patents, designs, trade marks and other intellectual property (the Intellectual Property ) and any reproductions of copyright works in the thesis, for example graphs and tables ( Reproductions ), which may be described in this thesis, may not be owned by the author and may be owned by third parties. Such Intellectual Property and Reproductions cannot and must not be made available for use without the prior written permission of the owner(s) of the relevant Intellectual Property and/or Reproductions. Further information on the conditions under which disclosure, publication and commercialisation of this thesis, the Copyright and any Intellectual Property and/or Reproductions described in it may take place is available in the University IP Policy (seehttp://documents.manchester.ac.uk/docuinfo.aspx?docid=487), in any relevant Thesis restriction declarations deposited in the University Library, The University Library s regulations (see and in The University s policy on Presentation of Theses. 23

24 Acknowledgements Acknowledgements First and foremost, I would like to express my gratitude to my supervisor, Professor Mike Barnes. This PhD would not have been possible without his excellent guidance and unparalleled support and it has been a privilege working with him over the past 3.5 years. It would also not have been possible for me to undertake this research without financial support and I therefore wish to acknowledge the UK Engineering Physical Sciences Research Council and National Grid plc for their assistance in this area. During this PhD I have had many fantastic opportunities to meet, work and discuss ideas with some inspiring and knowledgeable engineers and I would like to recognise the members of the Supergen Wind Energy Consortium and the Cigre B4-57 Working Group, for aiding my professional development. In terms of inspiration, a special mention must be made to my previous college tutor Mr Hubert Ward. His dedicated, enthusiastic and exhaustive approach to teaching electrical engineering principles was invaluable and I thank him for encouraging me to follow a career in this field. For their kind support and humorous discussions during my time undertaking this research, I would like to thank the members of the Power Conversion Group, Dr Robin Preece and Dr Luke Livermore. A special thank you goes to Dr Steven Jordan, for taking time out from his travels to review this thesis. Finally, to family and friends, including those already mentioned, your encouragement has made this PhD possible, and far more enjoyable than it may have otherwise been. I would especially like to thank Angela for her time, effort and support throughout this research. 24

25 Chapter 1 Introduction 1 Introduction 1.1 Background Offshore wind power generation is a critical component in the production of a clean, secure and sustainable energy supply for the future. The amount of offshore generation is increasing worldwide. In the UK alone, the Crown Estate has leased enough offshore wind development sites to provide a potential capacity of 47GW [1]. Considering that the UK s current total power station capacity is approximately 80GW [2], it is clear that offshore wind will become a major contributor to the UK s generation mix. The lease of the potential offshore wind development sites in the UK has been through a series of allocation rounds, designed to increase in scale and technical complexity as the industry has developed. Round 1 and Round 2 sites have a capacity of 8GW and are already in operation, under construction or in development [1, 3]. The Round 3 windfarms have a potential capacity of 32GW, and construction of these projects is expected to start from 2015 [1, 3]. These windfarm sites are significantly larger than the Round 1 and Round 2 sites and are located much further from the shore, as shown in Figure 1.1. The connection of Round 3 windfarms therefore creates a number of new challenges. The EPSRC Supergen Wind Project Consortium, which consists of a number of research institutions and industrial partners, are undertaking research to help assist with these challenges [4]. This PhD formed part of that research. The Consortium s principle objective is to undertake research to achieve an integrated, cost-effective, reliable and available offshore wind power station. The research documented in this thesis was carried out in alignment with the consortium s principle objective. 1.2 The Connection of Round 3 Windfarms The connection of a windfarm can be either via a High Voltage Alternating Current (HVAC) or a High Voltage Direct Current (HVDC) transmission system. The choice of transmission system is largely dependent upon how far the windfarm is located from shore. HVDC technology is typically more favourable for windfarms located more than km from shore [1, 5]. This is primarily because in a HVAC system a large proportion of a cable s current carrying capacity is required to charge and discharge the cable s capacitance every cycle. Whereas in a HVDC system, once the cable is charged almost its entire current carrying capacity is available for active power transfer. National Grid s 25

26 Chapter 1 Introduction Offshore Development Information Statement (ODIS) has identified that the vast majority of the Round 3 windfarm potential capacity is likely to employ HVDC systems due to the sites location [1]. Current Source Converters (CSC) and Voltage Source Converters (VSC) are the two main types of converter technology used in HVDC transmission systems. VSC-HVDC is more suited for offshore windfarms because it does not require a strong AC system and has a smaller footprint in comparison to CSC-HVDC [6]. Since its inception in 1997, and until 2010, all VSC-HVDC schemes employed two or three-level VSCs [7]. In 2010, the Trans Bay Cable project became the first VSC-HVDC scheme to use Modular Multi-level Converter (MMC) technology. The MMC has numerous benefits in comparison to two or three-level VSCs; chief among these is reduced converter losses [7]. Today, the three largest HVDC manufacturers offer a VSC-HVDC solution which is based on multi-level converter technology [7]. This thesis therefore focuses on MMC VSC-HVDC schemes. For further information, a comparative review of HVAC and HVDC technologies, as well as the different HVDC converter configurations, is given in Appendix 1A. Figure 1.1: Connection diagram for the UK s windfarms [8] 26

27 Chapter 1 Introduction With the exception of the recently commissioned (December 2013) Nan ao island project, all operational windfarms employing VSC-HVDC connections are radial (point-to-point). There have however been a number of proposals to interconnect offshore generation to a common VSC-HVDC Multi-Terminal (MT) system such as the European Super Grid and National Grid s Integrated Network, as shown in Figure 1.2. The connection of offshore windfarms to a common grid has the potential to reduce the volume of assets installed offshore and improve operational flexibility and network security [1]. It should be noted that the terms HVDC grid, MT HVDC system and Integrated HVDC network in this thesis are all HVDC systems which contain three or more HVDC converters and share a common HVDC connection. Figure 1.2: Accelerated growth 2030 transmission system scenario potential connection diagram, modified from [9] 1.3 Impact Factors on the Connection s Reliability This section identifies factors which require further research to reduce the negative impact they may have on the reliability of VSC-HVDC schemes and therefore the development of Round 3 windfarms. 27

28 Chapter 1 Introduction Availability Analysis Availability in this work is defined as the probability of finding the component, device or system in the operating state during its useful life. The expected availability of the VSC- HVDC systems (radial and MT), which connect the Round 3 offshore windfarms is a key factor in determining if these windfarms are technically and economically viable. Availability figures affect the profitability of the system and therefore have a major impact on potential investors as well as the operation of the onshore National Grid. Availability analysis can also enable the key components which affect the reliability of the link to be identified. Strategies can therefore be developed to improve the availability of these components if required. At the time of investigation no publications existed in the public domain which estimates the expected availability of the VSC-HVDC systems which may be employed to connect a typical Round 3 windfarm. Further work is therefore required in this area HVDC Circuit Breakers A key problem for the development of large HVDC grids (>1.8GW) is the lack of commercially available HVDC circuit breakers. In order for a large HVDC grid to be technically and commercially viable, the ability to isolate parts of the grid due to a fault, or to perform maintenance without de-energising the entire grid, must be achieved. Currently, offshore windfarms connected to radial VSC-HVDC schemes deal with DC faults by blocking the Insulated Gate Bipolar Transistor (IGBT) devices in the converter and by tripping the AC circuit breakers, so that the converter s anti-parallel diodes do not conduct. Applying this approach to a DC grid would effectively mean deenergising the entire DC grid to isolate the faulted section. This is generally considered an unacceptable solution for relatively large HVDC grids. Further work is therefore required to produce a HVDC breaker so that this stumbling block is removed from the path of developing a HVDC grid Accurate Electromagnetic Transient Models for Radial and MT VSC-HVDC Connections Simulation models are a vital tool in the research and development of VSC-HVDC systems. Highly accurate models are required in order to give a high degree of confidence in the simulation results and therefore ensure that the system operates in the expected way. 28

29 Chapter 1 Introduction The use of MMC converters in VSC-HVDC systems has presented a number of challenges. Applying traditional modelling techniques to MMC VSC-HVDC systems is computationally intensive and impractical in many cases. This has led to the development of new modelling techniques for MMC converters [10, 11]. The published literature validating these techniques are however, very limited in some areas, and non-existent in others [12]. More research is therefore required in this area to give a higher degree of confidence to these models and also to assess which models are suitable for which studies. The potential development of HVDC grids has led to the need to produce highly accurate EMT grid models which are valid for a range of studies. The issue of accuracy vs. computational efficiency is of greater concern for grids than radial systems due to the increased size of the model. In addition to the MMC models, cable models are the other main DC component which may have a significant impact on the overall model s simulation results and simulation time. The fidelity of cable models is of particular importance for HVDC grids due to the need to locate the faulty section of the grid within approximately 1-2ms, which requires accurate representation of the DC quantities. Publications regarding the impact of different cable models, in terms of their accuracy and speed, for typical VSC-HVDC studies are however very limited. The opportunity therefore exists for further research, so that recommendations can be made as to which cable models are appropriate for particular studies. 1.4 Aims and Objectives This thesis aims to address some of the issues raised in the previous section. In order to achieve these aims the following objectives have been identified: 1. Conduct an availability study for a radial VSC-HVDC system and identify the key components which affect the system s overall availability. 2. Identify the key issues in the development of a HVDC breaker and present potential solutions. 3. Develop a high fidelity EMT model of a radial VSC-HVDC system employed for the connection of a typical Round 3 windfarm and compare the leading MMC modelling techniques. 29

30 Chapter 1 Introduction 4. Develop a high fidelity EMT model of a MT VSC-HVDC system employed for the connection of a typical Round 3 windfarm and compare the leading cable modelling techniques. 1.5 Main Thesis Contributions The work contained within this thesis has made a number of contributions. References with the prefix B C, J, P and S refer to books, conference publications, journal publications, patents and Supergen reports respectively. A full list of publications is given in Section 1.6. The main contributions can be summarised as follows: An availability study of a radial VSC-HVDC scheme for the connection of a typical Round 3 windfarm was conducted. This study involved the derivation of a new set of reliability indices for MTTF and MTTR 1, for the key components in a VSC- HVDC scheme and the production of overall availability figures for the scheme. The key components which have the greatest impact on the scheme s overall availability were also identified. Furthermore, this study analysed the overall availability of a MT HVDC system which may be employed for the connection of Round 3 windfarms and assessed the effect of varying the cable s capacity on the grid s availability. In addition, an economic assessment of radial and selected grid schemes was carried out to determine the impact of the scheme s availability on the profitability of the scheme. [B1, C1, J1, S1]. A review of existing HVDC circuit breaker topologies was conducted in order to identify the limitations of each design. From this review a new type of HVDC circuit breaker topology was designed which addressed some of the key limitations of the previous designs. A UK patent application has been filed for this topology. [J1, P1, S2]. An MMC VSC-HVDC test simulation model was developed in PSCAD and the three leading detailed MMC modelling techniques were compared in terms of their accuracy and simulation speed. This work identified limitations of the models and presented an enhancement to one of the models to reduce the simulation time. The findings of this were used to propose MMC modelling recommendations [J3]. 1 MTTF Mean Time To Failure, MTTR Mean Time To Repair. 30

31 Chapter 1 Introduction The test MMC VSC-HVDC simulation model was further developed using the most suitable MMC modelling technique to produce a detailed EMT model for a radial VSC-HVDC link for the connection of a typical Round 3 windfarm. Another radial model was also developed for the interconnection of two active networks. The AC fault ride-through performance of both radial models was assessed against the UK grid code. This led to the standard DC voltage controller being modified in order to improve the system s fault recovery performance. Furthermore the radial model for the interconnection of active networks was used in a collaborative effort with another PhD student [J2] to investigate the key dynamics of active power controllers for VSC-HVDC, regarding stability, performance and robustness. [C2, J2, S3]. A four-terminal EMT VSC-HVDC model was developed based on a subsection of a potential scenario outlined in National Grid s 10 year statement. This model was used to perform converter co-ordination studies and to compare different types of cable model in terms of their accuracy and speed, for a range of typical VSC- HVDC studies which has led to a set of modelling recommendations being produced [C3, S4]. 1.6 Publications Books [B]: 1. Reliability indices for the VSC-HVDC components derived in this thesis have been published in: G. Migliavacca Advanced Technologies for Future Transmission Grids, Springer, Cigre Working Groups: 1. Contribution to Cigre WG B Guide for the Development of Models for HVDC Converters in a HVDC Grid, as an observer. 2. Supergen report [S2] was used as a reference document for Cigre WG B Designing HVDC Grids for Optimal Reliability and Availability Performance. Conference Papers [C]: 1. A. Beddard and M. Barnes, Availability analysis of VSC-HVDC schemes for offshore windfarms, IET PEMD Conference, Bristol, UK,

32 Chapter 1 Introduction 2. A. Beddard and M. Barnes, AC Fault Ride-through of MMC VSC-HVDC Systems IET PEMD Conference, Manchester, UK, A. Beddard and M. Barnes, HVDC Cable Modelling for VSC-HVDC Systems Accepted for publication in IEEE PES GM Conference, Washington DC, Journal Papers [J]: 1. M. Barnes and A. Beddard, Voltage Source Converter HVDC Links The State of the Art and Issues Going Forward Energy Procedia, W. Wang, A. Beddard, M. Barnes and O. Marjanovic, Analysis of Active Power Control for VSC-HVDC, Accepted for publication in IEEE Transactions on Power Delivery, A. Beddard, M. Barnes and R. Preece, Comparison of Detailed Modelling Techniques for MMC Employed on VSC-HVDC Schemes, Accepted for publication in IEEE Transactions on Power Delivery, Patents [P]: 1. A. Beddard and M. Barnes, Conduction path of a DC breaker Patent No. GB , Supergen Reports [S]: 1. Supergen Report 3.3.1b entitled Radial HVDC availability analysis, Supergen Report 3.3.2b entitled DC circuit breaker technology, Supergen report entitled Detailed Modelling of MMC VSC-HVDC Links for the Connection of Offshore Windfarms, Supergen report entitled Investigation of converter co-ordination, Thesis Structure Chapter 2 Availability Analysis This chapter outlines the importance of availability analysis in determining the technical and economic viability of the UK s Round 3 windfarms. An availability model of a radial VSC-HVDC system for the connection of a typical Round 3 windfarm is developed and analysed using reliability indices derived from academic papers and industrial documentation. This analysis determines the overall energy availability of the system and identifies the key components which influence its value. An availability model for a MT 32

33 Chapter 1 Introduction DC network is also developed and analysed for different levels of additional capacity in the transmission paths back to shore. A cost-benefit availability analysis is performed to show the relationship between the transmission scheme s availability and its profitability. Chapter 3 HVDC Protection In this chapter, the fundamental challenges associated with isolating faults in a HVDC grid as opposed to a HVAC grid, are highlighted. A review of potential HVDC circuit breaker topologies at the time of investigation is given and a new HVDC circuit breaker topology is presented. In addition, the key requirements of a DC cable protection system for a HVDC grid are outlined and a review of potential protection strategies is conducted. Chapter 4 MMC-HVDC This chapter describes the modelling process for a MMC-HVDC link for a typical Round 3 offshore windfarm, including the analysis to determine the value of key parameters of the MMC and associated AC and DC networks, and the tuning and implementation of the required control functions. It also describes the modelling process for a MMC-HVDC link used to interconnect two AC networks. The MMCs are modelled using the Detailed Equivalent Modelling (DEM) technique as a result of the work carried out in Chapter 6. Chapter 5 MMC-HVDC Link Performance This chapter assesses the steady-state and transient performance of the MMC-HVDC link models developed in chapter 4 for the connection of a typical Round 3 windfarm and for the interconnection of two active AC networks. The results are compared with those derived from theory. The systems ability to comply with the GB grid code for AC disturbances and reactive power requirements are investigated and a modification to the standard DC voltage controller is proposed to improve the system s active power recovery response. The models response to DC faults are also investigated and the differences between a MMC-HVDC link employed for the connection of a windfarm and a MMC- HVDC link employed for the interconnection of two active networks are examined. Chapter 6 Comparison of MMC Modelling Techniques The three leading detailed MMC modelling techniques are described and compared in terms of their accuracy and simulation speed in this chapter. The findings of this study are 33

34 Chapter 1 Introduction used to propose a set of modelling recommendations which offer technical guidance on the state-of-the-art of detailed MMC modelling. Chapter 7 HVDC Cable Modelling This chapter focuses on HVDC cable modelling for VSC-HVDC systems. The complex structure of a submarine Cross-Linked Polyethylene (XLPE) HVDC cable is detailed and parameters to represent a 1GW 300kV cable are derived from academic and commercial documentation. Types of commercially available cable models are discussed and four of these models are compared in terms of their accuracy and simulation speed for a range of studies. The chapter concludes with a set of cable modelling recommendations. Chapter 8 Multi-terminal MMC Co-ordination In this chapter a four-terminal high fidelity MTDC model for the connection of two 1GW Round 3 offshore windfarms is developed and is used to investigate the performance of selected MTDC control strategies for different scenarios. This chapter highlights the importance of high fidelity MMC models when comparing MT control methods. Chapter 9 Conclusion and Future Work The work contained in this thesis is summarised, and the main conclusions are discussed in this chapter. A number of recommendations for further work are also presented. 34

35 Chapter 2 Availability Analysis 2 Availability Analysis Availability can be defined as the probability of finding the component/device/system in the required operating state at some point in the future [13]. The availability of a VSC- HVDC system may therefore be defined as the percentage of time that the system is expected to be operational. From a commercial point of view it is the scheme s energy availability which is most important as this has the greatest impact on revenue. The scheme s energy availability is the measure of energy which could be transmitted through the VSC-HVDC scheme except for limitations in capacity due to outages. Assessing the expected energy availability of VSC-HVDC transmission systems used for the connection of Round 3 windfarms is therefore essential in determining if these windfarms are economically viable. At the time of investigation there were a small number of publications which had assessed the availability of VSC-HVDC transmission systems for different applications [2-4]. However, there were no publications which assessed the energy availability of VSC- HVDC schemes for the connection of a typical Round 3 windfarm. Furthermore, the justification for the component reliability indices, particularly the offshore components, was very limited. In this chapter, an availability model of a radial VSC-HVDC link and a MT VSC-HVDC system for the connection of a Round 3 windfarm is developed. The availability model is broken down into subsystems and then into components. Reliability data for each of these components is gathered from academic papers, commercial documentation and international surveys. Using this data, and engineering judgement, reliability indices for each of the components are derived and justification for the indices is given along with discussion of the assumptions used. Analytical availability techniques are then used to assess the availability of each component and the energy availability of the scheme. Each component s influence on the scheme s energy availability is also analysed. An economic assessment of different VSC-HVDC schemes is carried out which calculates the profitability of each of these schemes. This economic analysis demonstrates the link between a scheme s energy availability and profitability. 35

36 Chapter 2 Availability Analysis 2.1 Radial System The most important aspect of evaluating the availability of a system is to understand the way that the system operates and fails, and the consequence of a failure. Only through a good understanding of the system can an availability model, which accurately represents the system, be developed. The accuracy of the reliability data and the complexity of the availability analysis techniques are irrelevant if a poor model is used. National Grid has presented three different strategies for the connection of the UK s Round 3 windfarms in their Offshore Development Information Statement (ODIS) [1, 14]. The radial strategy requires more than twenty five 1GW VSC-HVDC point-to-point schemes. A simplified diagram for the offshore connection design of a Round 3 windfarm employing a 1GW VSC-HVDC point-to-point scheme is shown in Figure 2.1. Figure 2.2 shows the key components of the VSC-HVDC system. 33kV AC 500MW AC Substation 220kV AC 400kV AC Grid 1000MW VSC- HVDC Scheme Wind Farm 500MW AC Substation Figure 2.1: 1GW VSC-HVDC point-to-point offshore connection overview diagram Subsystem 2 DC System 165km ±300kV DC Cable 220kV AC Subsystem 1 Offshore System Subsystem 3 Onshore System Subsystem 4 Subsystem 5 MMC Idc Transformer GIS Convertor Reactor DC Switchyard DC Switchyard 400kV AC Grid Offshore Cooling System Idc 165km ±300kV DC Cable Offshore Cooling System Control System Ventilation System Ventilation System Control System Figure 2.2: 1GW point-to-point VSC-HVDC scheme According to National Grid a typical VSC-HVDC link for the connection of a Round 3 windfarm has a power rating of 1GW at ± 300kV. The VSC-HVDC link is connected to the two 500MW AC substations via a 220kV busbar. The configuration of the link is based on the use of MMCs as it is expected that any VSC-HVDC link employed for the connection of a Round 3 windfarm will be based on a form of MMC, due to their superior efficiency in comparison to other VSC topologies. MMC-HVDC schemes require 36

37 Chapter 2 Availability Analysis limb/converter/arm reactors that are connected in series to each arm of the converter but which are normally located outside the valve hall. The length of the HVDC cables are taken as 165km, as this is the average straight line connection distance to shore of the Round 3 windfarms which are likely to require HVDC transmission schemes. The onshore MMC is connected to the 400kV onshore grid via two 500MW transformers and Gasinsulated Switchgear (GIS). The VSC-HVDC transmission scheme is broken down into three subsystems as shown in Figure 2.2 and Figure 2.3. The scheme can only facilitate power transmission if all of the three subsystems are in service. The complete failure of any one of the series-connected subsystems results in an outage. This is the concept of series dependent systems. Subsystems 1 and 3 are able to operate at 50% of their capacity due to the parallel transformer configuration. The capacity of the VSC-HVDC link is therefore reduced to 50% of its rating if one or both of these subsystems are operating at 50% of their capacity. The effect that the failure of each component has on its subsystem, and hence the overall scheme, is discussed in Sections 2.2 and 2.3. Subsystem 1 Offshore System Subsystem 2 DC System Subsystem 3 - Onshore System Figure 2.3: VSC-HVDC availability model for a point-to-point link Analytical and Monte Carlo simulation are the two main categories of availability evaluation techniques [13]. Analytical techniques represent the system by a mathematical model and use mathematical solutions to evaluate the availability indices, whereas Monte Carlo simulation techniques estimate the availability indices by simulating the process and random behaviour of the system. Both analytical and Monte Carlo simulation techniques have been used to determine the availability of the VSC-HVDC systems [15-17]. There are advantages and disadvantages to each method and neither approach can be considered superior to the other [13]; however, simulation techniques are typically employed in cases where the required availability indices cannot be readily obtained using suitable analytical techniques. The energy availability of the system in this work can be evaluated in a relatively straightforward manner by employing a widely used analytical technique which is referred to as Capacity Outage Probability Tables (COPT) [15, 18]. The COPT-based technique is 37

38 Chapter 2 Availability Analysis therefore used to evaluate the energy availability of the VSC-HVDC scheme. This technique is implemented for the system in Section Component Availability A brief explanation of each component and their reliability indices is given here. A thorough explanation for the derivation of the Mean Time To Failure (MTTF) and Mean Time To Repair (MTTR) indices of each component is contained in Appendix 2A and 2B. The availability, A, of each component can be calculated directly from equation (2.1). A MTTF MTTF MTTR (2.1) The components in the offshore system are very similar to the components in the onshore system. The key difference is that the onshore transformers and GIS bays are connected to the 400kV grid whereas the offshore transformer and GIS bays are connected at 220kV, as shown in Figure 2.2. The voltage rating of equipment could affect their likelihood to fail and the time it takes to repair the component in the event of a failure. This is taken into consideration in this availability analysis. The crucial difference between a component being located offshore and a component being located onshore, is the time it takes to repair the component. This is because it takes longer to access the offshore platform. The time it takes varies significantly depending on the following factors: Method of transport (small vessel/large vessel/helicopter) Availability of transport Weather conditions Location of offshore platform Location of air field/port/offshore maintenance platform Availability of required personnel The access time could be as little as one day, based on travel via a helicopter in good weather conditions with the correct administration procedures in place to enable rapid deployment of personnel and equipment. However, it could also be as long as three months [19] or more due to very bad weather conditions and unavailability of a suitably large vessel. 38

39 Chapter 2 Availability Analysis The mean time to access the offshore platform with different sized components or spare parts has been estimated, as shown in Table 2.1. Pictures of the example components/spare parts in Table 2.1 are shown in Figure 2.4, Figure 2.5 and Figure 2.6 to give an indication of their size. Component Mean Offshore Access Transportation Example Component Size Time (hr) Method Small MMC Sub-module 48 Helicopter/Small Vessel Medium Gas-insulated Switchgear 168 Medium Vessel Large Transformer 504 Large Vessel Table 2.1: Mean time to access the offshore platform based on components/spare part size Figure 2.4: Image of a MMC sub-module from [20] The MMC Sub-module (SM), depicted in Figure 2.4, is approximately 0.6x1.5x0.3m (HxWxD) and weighs approximately 165kg [20]. 39

40 Chapter 2 Availability Analysis Figure 2.5: Image of a 245kV GIS bay from [21] The 245kV GIS bay, depicted in Figure 2.5, has a footprint of about 12m 2 and weighs approximately 5-6 tonnes [22]. Figure 2.6: Image of a 150kV, 140MVA transformer and offshore platform modified from [23] 40

41 Chapter 2 Availability Analysis A 150kV, 140MVA transformer, as shown in Figure 2.6, is a relatively small transformer in terms of its rating, but still weighs approximately 90 tonnes [22]. Larger transformers are significantly heavier. In order to accurately estimate the MTTR for an offshore component, the size of the spare part that the component would require in the event of a failure must be estimated. From this estimation, the Mean Offshore Access Time (MOAT) for the component can be calculated. Calculating the MTTR for a component located offshore is not as simple as adding the MTTR for the component located onshore to the MOAT for that component. This is because some tasks, which affect the MOAT, may be performed in parallel with tasks included in the MTTR for the onshore component. To give greater clarity to these two aspects consider the following example: In this availability analysis it is estimated that 70% of GIS failures require a small sized spare part and that 30% require a medium sized spare part. From Table 2.1 the MOAT to repair a GIS bay would be 84 hours (70% helicopter/small vessel and 30% medium vessel). The MTTR for a GIS bay located onshore is estimated to be 120 hours. It is also estimated that 20 hours of the offshore access time is spent performing administration related tasks, which could be done concurrently with the time spent obtaining spare parts (included in the onshore MTTR). Therefore the MTTR of an offshore GIS bay is the MTTR of an onshore GIS bay, plus the MOAT, minus the mean time spent performing concurrent tasks (i.e =184hrs). Further information on this topic is contained in Appendix 2A Converter Reactor The converter reactors, also known as limb reactors or arm reactors, are connected in series with each arm of the MMC. At the time of investigation, there was only one commercial MMC in operation (commissioned 2010) [24] and therefore, published reliability indices for MMC converter reactors are non-existent. Det Norske Veritas (DNV) is the only known source to have published reliability indices for a VSC-HVDC converter reactor. These reliability indices are likely to be for the converter reactors employed on a two-level VSC scheme. Nonetheless the reliability indices for these reactors are taken to be similar to the converter reactors used in MMC-HVDC schemes. The reliability indices published by 41

42 Chapter 2 Availability Analysis DNV were used to estimate the reliability indices for a converter reactor, as given in Table 2.2. Component MTTF (yr) MTTR (hr) Availability Onshore Converter Reactor Offshore Converter Reactor Table 2.2: Estimated reliability indices for converter reactors MMC with Cooling System and Ventilation System The cooling system is required to ensure that the components within the MMC, such as the IGBTs, do not exceed their rated temperature. The ventilation system is needed amongst other functions to ensure that the valve hall temperature and moisture does not exceed set limits. Failure of either the cooling system or ventilation system is likely to result in the converter being tripped. It is for these reasons that critical parts in the cooling system are duplicated [25]. As discussed in Section 2.2.1, failure statistics for MMCs are non-existent. The first twolevel VSC-HVDC scheme was commissioned in 1997 and since then many more schemes have been commissioned. That said, no VSC-HVDC schemes have been included in the Cigre World survey of HVDC schemes which is published biannually [26]. There are a small number of sources which have published reliability indices for HVDC VSCs 2. One of these sources estimated the VSC s reliability indices based on data from the Cigre survey of Line Commutated Converter (LCC)-HVDC schemes. This survey publishes reliability indices for the HVDC converter with the cooling system and the ventilation system included. It is expected, although not explicitly stated, that reliability indices for the converter from the other sources (see appendix) also include the cooling system and the ventilation system. Estimating the reliability indices for the MMC from these sources would therefore also include the cooling system and the ventilation system. The disadvantage of this would be that the individual effect of the cooling system and ventilation system on the scheme s availability would be obscured. The converter, cooling system and ventilation system were analysed as individual components in [17]. However, the components used in the offshore cooling system and onshore cooling system were inconsistent with each other. As an example, the offshore 2 Although it is not stated explicitly, it appears that the reliability indices are for two-level VSCs. 42

43 Chapter 2 Availability Analysis cooling system did not account for instrumentation, whereas the onshore cooling system did and neither accounted for the failure rates of the cooling system s control system. The same inconsistency seems to apply to the ventilation systems. There may well be very good reasons to explain these inconsistencies, however without this knowledge it would be unwise to use the data from this paper for the cooling system and ventilation system as the resultant availability could be very inaccurate. It is believed, therefore, that more accurate reliability indices would be obtained by estimating the MTTF and MTTR for the MMC from the sources which have factored in the cooling system and ventilation system 3. The reliability indices for the MMC including the cooling system and ventilation system are given in Table 2.3. Component MTTF (yr) MTTR (hr) Availability Onshore MMC Offshore MMC Table 2.3: Estimated reliability indices for MMC with ventilation system and cooling system Control System The HVDC control system is fully duplicated to ensure a high level of reliability. The reliability indices for HVDC control systems used in academic and industry publications are for two-level VSC-HVDC schemes and LCC-HVDC schemes. The control algorithms for MCC-HVDC schemes are more complex than other HVDC schemes. The hardware, with the exception of the valve based electronics, is similar. These were two of the factors which were taken into consideration when estimating the MTTF and MTTR for the control system. The reliability indices for this component are given in Table 2.4. Component MTTF (yr) MTTR (hr) Availability Onshore Control System Offshore Control System Table 2.4: Estimated reliability indices for control system GIS and Transformer The reliability indices for the GIS have been mainly estimated from the GIS failure statistics contained in the 1996 Cigre GIS survey [27]. Cigre surveys for AC circuit breakers, and reliability indices for AC circuit breakers from other sources, were also used. 3 Sources one and two (see appendix) have not explicitly stated that they have included the cooling and ventilation system, however the data suggest that this was the case. 43

44 Chapter 2 Availability Analysis GIS failure statistics are categorised based on the voltage rating of the equipment. The GIS voltage ratings are determined by the rating of the busbar to which they are connected. The offshore GIS connected to the windfarm side (Busbar 1) as shown in Figure 2.7, would need to be rated at 220kV, whereas the GIS connected to the converter side (Busbar 2) would need to be rated at about 275kV 4. This places the offshore GIS within the Cigre survey s kV voltage category. Busbar 1 500MW GIS Switchbay T1 Busbar 2 GIS 1 GIS MW 500MW GIS 3 T2 GIS 4 Figure 2.7: Offshore GIS and transformer configuration (Subsystem 4) The onshore GIS connected to the converter side (Busbar 3) as shown in Figure 2.8 would need to be rated at approximately 275kV 5, whereas the GIS connected to the AC grid (Busbar 4) would need to be rated at 400kV. Therefore, the GIS connected to Busbar 3 would be within the kV category and the GIS connected to Busbar 4 would be within the kV category. The reliability indices for the offshore and onshore GIS are given in Table 2.5 Busbar 3 GIS Switchbay T1 Busbar MW GIS 1 GIS MW GIS 3 T2 GIS 4 Figure 2.8: Onshore GIS and transformer configuration (Subsystem 5) 4 This value is based on the peak AC converter voltage being 0.75 times half of the DC voltage (0.75*300kV) which gives a converter side line-to-line voltage of kV rms. The 0.75 is based on simulation results from the Trans Bay Cable project which has a peak AC converter voltage of 150kV and a DC voltage of ±200kV [28] It should be noted, that based on information which was not known at the time of investigation, the converter side voltage may be as high as kVrms, due to the MMC utilising the full DC link voltage. The potential impact this may have on the availability results is discussed in Section Based on information which was not known at the time of investigation, the converter side GIS would most likely need to be rated for kV rms. The potential impact this may have on the availability results is discussed in Section

45 Chapter 2 Availability Analysis Component MTTF (yr) MTTR(hr) Availability Offshore switchbay kV onshore switchbay kV onshore switchbay Table 2.5: Estimated reliability indices for GIS The reliability indices for the power transformer have been estimated from a number of sources including Cigre surveys, academic papers and industry publications. The failure statistics are categorised based on the transformer s highest winding voltage. The highest winding voltage for the offshore transformers is within the kV category, irrespective of whether a delta or star connected transformer is employed. However, a delta connected onshore transformer would have a winding voltage of 400kV, whereas a star connected transformer would be approximately 230kV. This availability analysis assumes that the onshore transformer is connected to the grid via a star winding, placing the onshore transformers in the kV 6 onshore transformers are given in Table 2.6. category. The reliability indices for the offshore and Component MTTF(yr) MTTR(hr) Availability Offshore Transformer Onshore Transformer Table 2.6: Estimated reliability indices for transformers DC Switchyard The major equipment in a DC VSC switchyard consists of HV capacitor banks, line reactors, measurement transducers and switchgear [29] 7. The major equipment in a LCC DC switchyard consists of DC harmonic filters, smoothing reactors, measurement transducers and switchgear [30]. Figure 2.9 shows images of a MMC DC switchyard (left) and a LCC DC switchyard (right). 6 Based on information which was not known at the time of investigation, the onshore transformer and possibly the offshore transformer would most likely need to be rated for kV rms. The potential impact this may have on the availability results is discussed in Section HV capacitor banks are not necessarily required for MMCs. 45

46 Chapter 2 Availability Analysis Figure 2.9: Image of a MMC VSC DC Switchyard (left, modified from [29]), Image of a LCC DC Switchyard (right modified from [31]) Since there is significant similarity between the DC switchyards, the failure statistics from the World HVDC survey (LCC) is used to estimate the reliability indices for the MMC VSC-HVDC DC switchyard. The latest World HVDC survey was published in 2010, which at the time of the study contained data collected on LCC-HVDC schemes during [26]. Back-to-back HVDC schemes do not normally require smoothing reactors Line Reactor or DC filters [30], therefore only the data from transmission schemes is considered. The reliability indices for a DC switchyard are given in Table 2.7. Component MTTF(yr) MTTR(hr) Availability Onshore DC Switchyard Offshore DC Switchyard Table 2.7: Estimated reliability indices for DC switchyard DC Cable Submarine cable failure rates are very subjective. They are heavily influenced by many factors including: fishing activity, installation protection method, awareness of cable routes, water depth, and hardness of the sea-bed. Reliability indices for submarine cables should therefore be used with a high level of caution and ideally estimated on a case by case basis. The latest survey for failures of submarine cables, at the time of the study, was published in 2009 by Cigre for data collected between 1990 and 2005 [32]. Unfortunately failure rates for the most common type of submarine cable used in VSC-HVDC schemes (DC- XLPE) were not given in the report. The majority of known cable failures were due to 46

47 Chapter 2 Availability Analysis external damage, which is likely to be independent of cable type and voltage rating 8. The average failure rate of all cable types and voltages was therefore used to estimate failure for DC-XLPE submarine cable. The average failure rate of submarine cables with some form of installation protection was calculated to be approximately 0.1. Based on this figure and the value given by DNV, it was estimated that the annual failure of a submarine cable is 0.07 failures per 100km. The circuit length in this work is defined as the distance between the onshore and offshore converter (i.e. 165km not 330km). The average repair time for submarine cables in the Cigre survey was approximately 60 days, which is the same as the MTTR used by DNV in their availability analysis. Therefore a MTTR of 60 days will be assumed in this chapter. The reliability indices and calculated availability for this component are given in Table 2.8. Component Failure rate (occ/yr/100km) Circuit Length (km) MTTF (yr) MTTR (hr) Availability DC Cable Table 2.8: Estimated submarine cable reliability indices 2.3 Radial VSC-HVDC Scheme Availability Analysis The availability for the radial VSC-HVDC scheme as shown in Figure 2.3 will be calculated in this section. First, the availability of subsystems 1, 2 and 3 are calculated and then the availability of the overall system can be calculated Offshore System Availability Analysis (subsystem 1) The offshore system is broken down into subsystems and components. The offshore system has series dependency as shown in Figure The failure of any one component from subsystem 4 to the control system will result in the failure of the offshore system and therefore the failure of the transmission scheme. Subsystem 4 (transformers and GIS) can operate at 100% or 50% capacity. Due to the series dependency, if subsystem 4 is operating at 50% capacity then the offshore subsystem, and consequently the transmission scheme, can only operate at 50% capacity. 8 Only 4 of the 49 reported failures were classed as internal failures which were all for self-contained oil filled cables. 47

48 Chapter 2 Availability Analysis Simplified to a single component (MMC) Subsystem 4 (100%,50%) Converter Reactor (100%) Offshore Cooling System (100%) MMC (100%) Ventilation System (100%) Control System (100%) Figure 2.10: Availability model for offshore system (Subsystem 1) The calculated availability of all the components in the offshore subsystem is given in Table 2.9. Component MTTF(yr) MTTR(hr) Availability Offshore GIS Switchbay Offshore Transformer Offshore Converter Reactor Offshore MMC Offshore Control System Table 2.9: Availability of offshore components The simplified offshore subsystem availability diagram is shown in Figure Subsystem 4 (100%,50%) Converter Reactor (100%) MMC (100%) Control System (100%) Figure 2.11: Simplified availability model for offshore system (Subsystem 1) Subsystem 4 contains two parallel branches as shown in Figure 2.2, and repeated here in Figure If both branches are in service subsystem 4 operates at full capacity. If only one branch is in service subsystem 4 operates at 50% capacity. Busbar 1 500MW GIS Switchbay T1 Busbar 2 GIS 1 GIS MW 500MW GIS 3 T2 GIS 4 Figure 2.12: Offshore transformers and GIS configuration (Subsystem 4) The protection of the equipment before, and including, Busbar 1 is assumed to be the responsibility of the AC substation manufacturer. As a result, the failure of this equipment 48

49 Chapter 2 Availability Analysis will not be included in this availability analysis. It is also assumed that permanent faults on Busbar 2 are very rare and can therefore be neglected. There are many components which make up a GIS switchbay including circuit breakers, disconnectors and instrumentation. The component which fails and the mode in which that component has failed determines the available capacity of the system. To demonstrate this, three example GIS failure modes and consequences are shown in Table Failure Mode Disconnector opens inadvertently Circuit fails to open on command Insulation breakdown to earth Immediate Effect Isolates the connected branch Cannot clear transformer fault Short-circuit connected busbar 49 Number of Branches Affected Table 2.10: Example GIS failure modes and consequences Capacity Outage (MW) There are many different failure modes of a GIS switchbay. In order to take into account each failure mode, and its effect on the capacity of the system, complex analysis could be conducted. However, without accurate failure mode input data even the most sophisticated availability analysis method will produce inaccurate results. Data to determine the failure rate of a GIS switchbay as a single unit is limited; data to estimate with any real degree of accuracy what component within a modern GIS switchbay will fail, and how that component will fail, is near enough non-existent. It is worth noting that in [27] there is some data from the Cigre 1996 GIS survey for the symptoms of GIS failures. This includes symptoms such as loss of mechanical function and failure to operate switching device. Such symptoms however, do not indicate the failure mode of the GIS. The biggest single failure symptom (>30%) was an insulation breakdown to earth, which indicates the third failure mode in Table From the research conducted into failure mode statistics for GIS, it has been established that the biggest single failure symptom for GIS was a breakdown to earth. It is therefore assumed that the failure of any GIS bay results in full capacity outage, which is the worst case scenario. There are 64 possible combinations of component states in Figure 2.12, when considering each component as either being available or unavailable. Only the combinations that result in some available capacity are calculated, since the majority of

50 Chapter 2 Availability Analysis combinations result in no available capacity, due to assumption that any GIS failure results in full capacity outage. In order for subsystem 4 to operate at full capacity, all of the components (GIS1-4 and T1-2) must be available. The failure of any one transformer, providing that all of the GIS bays are available, would result in an available capacity of 500MW. All other component combinations result in full capacity outage. Available Capacity GIS1 GIS2 GIS3 GIS4 T1 T2 Probability Availability 100% % % 0 All other combinations 1= available, 0= unavailable Table 2.11: Available capacity table for subsystem 4 From equation (2.2) the available capacity of the offshore system (subsystem 1) can be calculated. The results are given in Table A A A A A Sub1(100%) Sub4(100%) Re actor(100%) MMC(100%) Control (100%) A A A A A Sub1(50%) Sub4(50%) Re actor (100%) MMC (100%) Control (100%) A 1 A A Sub1(0%) Sub1(100%) Sub1(50%) (2.2) Subsystem 1 Capacity Availability 100% % % Table 2.12: Available capacity table for the offshore subsystem (Subsystem 1) Table 2.12 shows that the offshore subsystem is operating at full capacity approximately 98.8%, half capacity 0.4% and is completely out of service 0.8% of the time Onshore System Availability Analysis (subsystem 3) The analysis of the onshore system, subsystem 3, is the same as for the offshore system. The availability of all of the components in the onshore system is given in Table

51 Chapter 2 Availability Analysis Component MTTF(yr) MTTR(hr) Availability 400kV Onshore GIS Switchbay kV Onshore GIS Switchbay Onshore Transformer Onshore Converter Reactor Onshore MMC Onshore Control System Table 2.13: Availability of onshore components The available capacity of subsystem 5 is given in Table Available Capacity GIS1 GIS2 GIS3 GIS4 T1 T2 Probability Availability 100% % % All other combinations 1= available, 0= unavailable Table 2.14: Available capacity table for subsystem 5 From equation (2.3) the available capacity of subsystem 3 can be calculated. The results are given in Table A A A A A Sub3(100%) Sub5(100%) Re actor(100%) MMC(100%) Control (100%) A A A A A Sub3(50%) Sub5(50%) Re actor (100%) MMC (100%) Control (100%) A 1 A A Sub3(0%) Sub3(100%) Sub3(50%) (2.3) Subsystem 3 Capacity Availability 100% % % Table 2.15: Available capacity table for the onshore system (Subsystem 3) Table 2.15 shows that the onshore system is operating at full capacity approximately 99.6%, half capacity 0.2% and is completely out of service 0.2% of the time DC System Availability Analysis (subsystem 2) The DC system is broken down into three series dependent components as shown in Figure

52 Chapter 2 Availability Analysis Offshore DC Switchyard (100%) DC Cable (100%) Onshore DC Switchyard (100%) Figure 2.13: Availability model of subsystem 2 Subsystem 2 operates at full capacity if all three series dependent components are in service. If any one component is out of service, then subsystem 2 is completely unavailable. The same approach which was used for subsystems 1 and 3 is used to analyse this subsystem. The results are given in Table Subsystem 2 Capacity Availability 100% % Table 2.16: Available capacity table for the DC system (Subsystem 2) Radial VSC-HVDC Scheme Availability The availability diagram of the VSC-HVDC scheme is shown in Figure The available capacity of the overall VSC-HVDC scheme is calculated in Table Subsystem 1 Offshore System (100%,50%) Subsystem 2 - DC System (100%) Subsystem 3 - Onshore System (100%,50%) Figure 2.14: Availability model for the VSC-HVDC scheme Capacity (%) Subsystem1 Subsystem 2 Subsystem 3 Probability Availability Any Other Combination Table 2.17: Available capacity table of radial VSC-HVDC scheme The radial VSC-HVDC scheme operates at full capacity approximately 96.2% of the time, half capacity 0.6% of the time and zero capacity 3.2% of the time. The scheme s energy availability is therefore approximately 96.5% 9. The target annual scheduled outage for 9 Energy availability (EA) is defined in this chapter as the maximum amount of energy which could have been transmitted except for forced outages. 52

53 Chapter 2 Availability Analysis maintenance is typically 0.82% (72 hours) for a VSC-HVDC scheme 10. The overall energy availability for the VSC-HVDC scheme analysed in this work would therefore be approximately 95.7% 11. The only known availability statistics for VSC-HVDC schemes are for the Murraylink and the Cross Sound Cable project. The average overall energy availability for the Murraylink and the Cross Sound Cable project are 96.5% and 96.9% respectively [33]. These figures include forced and scheduled outages. Considering that the VSC-HVDC scheme in this work is for an offshore windfarm, and therefore one converter station is based offshore, an overall energy availability of 95.7% seems to be within reasonably expected limits. A component s influence on the availability of the scheme can be assessed by setting that component s failure rate to zero and noting the change in the scheme s availability. Figure 2.15 shows that the DC cable has the greatest effect on the availability of the VSC-HVDC link. Other Offshore Equipment 9% Offshore DC Switchyard 8% DC Cable 54% Onshore Equipment 10% Offshore Reactor 9% Offshore MMC 10% Figure 2.15: Component importance for availability As mentioned previously the failure rate of submarine cables is dependent upon many factors. The annual failure rate used in this availability analysis was 0.07 failures per 100km circuit. The effect of the submarine cable failure rate on the energy availability of the VSC-HVDC scheme excluding scheduled maintenance is shown in Table The manufacturer s target scheduled outage rate for the VSC-HVDC Cross Sound Cable project was 0.82% [33] 11 Overall energy availability (OEA) is defined in this chapter as the maximum amount of energy which could have been transmitted except for forced and scheduled outages. 53

54 Chapter 2 Availability Analysis Cable Failure Rate (occ/yr/100km) Energy Availability (%) Table 2.18: Cable sensitivity analysis Table 2.18 indicates that if the true annual failure rate of submarine VSC-HVDC cables is in the vicinity of 0.7 failures per 100km of circuit then VSC-HVDC schemes for the connection of the UK s Round 3 offshore windfarms are unlikely to be commercially viable. This would in fact make the Round 3 windfarms altogether unviable as any technology which requires submarine cables would have a similar availability. The results presented in this chapter are based on the GIS and the transformer windings connected to the converter being rated for a phase-to-phase voltage of approximately 275kVrms. Based on information which was not known at the time of investigation, the converter side GIS and transformers with delta windings would most likely need to be rated for 367kVrms. A decrease in energy availability of 0.2% is calculated when adjusting the reliability data for the scheme s four transformers to the kV voltage class and the data for the converter side GIS to the kV class. Taking into account that a voltage rating of 367kV for the GIS and the transformers is at the lower end of the kV and the kV voltage classes respectively, and that the difference in the energy availability is 0.2%, the results presented in this chapter are still considered to be representative of a typical VSC-HVDC link for a Round 3 windfarm. 2.4 MT HVDC Network Availability Analysis Many potential benefits have been identified from interconnecting offshore windfarms via a MTDC network. These benefits include a reduction in the volume of assets installed offshore, improved operational flexibility and network security [1]. A simplified diagram of the MTDC network, which will be analysed in this chapter, is shown in Figure

55 Chapter 2 Availability Analysis 600MW Offshore AC Substation 600MW Offshore Node C (OFNC) 165km DC Cable Onshore Node B (ONNB) Wind Farm 3 60km DC Cable AC Grid 600MW Offshore AC Substation 600MW Offshore Node B (OFNB) Shore Wind Farm 2 60km DC Cable 165km DC Cable 600MW Offshore AC Substation 600MW Offshore Node A (OFNA) DC Onshore Node A (ONNA) Wind Farm 1 Figure 2.16: MT HVDC system The three offshore nodes are rated at 600MW each, giving a total grid capacity of 1.8GW, which is the maximum in-feed loss permitted by the National Electricity Transmission System Security and Quality of Supply Standard (NETS SQSS) [14]. A fault on the DC grid could temporarily cause the entire 1.8GW to be disconnected from the AC grid, while the faulty section of the grid is isolated. The installation of HVDC circuit breakers with a suitable protection system would enable DC faults to be cleared without de-energising the entire DC grid and therefore the grid s maximum capacity could be greater than 1.8GW. However, there are currently no HVDC circuit breakers commercially available. The MT network analysed in this chapter does not contain HVDC circuit breakers and hence its maximum capacity is limited to 1.8GW. The DC cables connected between the onshore and offshore converters have a length of 165km. This length of cable is approximately the average straight line connection distance for the radial HVDC schemes outlined in ODIS. The offshore converters are connected together via 60km of DC cable. This length of DC cable was chosen as it may be more suitable to connect the windfarms together using HVAC for connection distances less than 60km. This analysis neglects the grid s downtime due to isolating a DC side fault, as this time is insignificant for the calculation of the grid s availability. 55

56 Chapter 2 Availability Analysis Each offshore node consists of an offshore DC switchyard connected in series with subsystem 1 and each onshore node contains an onshore DC switchyard connected in series with subsystem 3, as shown in Figure Offshore Node (OFN) Subsystem 1 Offshore System (100%,50%) Offshore DC Switchyard (100%) Onshore Node (ONN) Subsystem 3 Onshore System (100%,50%) Onshore DC Switchyard (100%) Figure 2.17: Onshore and offshore nodes 600MW Offshore Node A OFNA (100%,50%) 600MW Offshore Node B - OFNB (100%,50%) 600MW Offshore Node C OFNC (100%,50%) 60km 1200MW DC Cable C1 (100%) 60km 1200MW DC Cable C2 (100%) 165km DC Cable - C3 (100%) 165km DC Cable C4 (100%) Subsystem 6 Subsystem 7 Onshore Node A- ONNA (100%,50%) Onshore Node B ONNB (100%,50%) Figure 2.18: Block diagram of MTDC network The onshore nodes and their series-connected DC cable can be combined into a single subsystem as shown in Figure 2.18 and Figure The offshore nodes, as well as subsystem 6 and subsystem 7, can be in one of three states (100%, 50% or 0%), due to the dual transformers in subsystems 1 and 3. The DC cables (C1 and C2) can be in one of two states (100% or 0%). The HVDC grid as shown in Figure 2.18 therefore has 972 ( ) possible states. Simplifying these nodes/subsystems to two states would reduce the number of possible HVDC grid states to 128 (2 7 ). The probability that subsystem 1 or subsystem 3 is operating at 50% capacity is negligible, as shown in Table 2.12 and Table In this case, the 50% state may therefore be eliminated without introducing any significant error in the overall availability analysis of the HVDC grid. The probability of the subsystem 56

57 Chapter 2 Availability Analysis operating at 100% capacity is increased accordingly to account for the exclusion of the 50% state. As an example, subsystem 1 which has three states, can be simplified to two states of equivalent available capacity as shown in Table Subsystem 1 Capacity Availability Equivalent Availability 100% % % Table 2.19: Equivalent available capacity table for subsystem 1 Subsystem 1 in the MTDC grid is rated at 600MW. The equivalent capacity of subsystem 1 can therefore be calculated as follows: Sub1 600MW MW MW Cap 3State Sub1 600MW MW Cap 2State (2.4) Equation (2.4) shows that there is no difference between the three-state model and the simplified two-state model in terms of the overall capacity of subsystem 1. The energy transmitted through subsystem 1 when considered as a standalone system is therefore the same whether it is represented by a three-state model or a two-state model. The calculated availability of a system containing several three-state models is not strictly equal to the calculated availability of a system with equivalent simplified two-state models, however since the probability of the node/subsystem operating in the eliminated state is very small, the error is insignificant for the cases analysed. 600MW Offshore Node A OFNA (100%) 600MW Offshore Node B - OFNB (100%) 600MW Offshore Node C OFNC (100%) 60km 1200MW DC Cable C1 (100%) 60km 1200MW DC Cable C2 (100%) Subsystem 6 (100%) Subsystem 7 (100%) Figure 2.19: Simplified two-state block diagram of a MTDC network The simplified two-state capacity availability tables for the onshore and offshore nodes as well as subsystem 6 and subsystem 7 are shown in Table

58 Chapter 2 Availability Analysis Offshore Node Capacity Availability 100% % Onshore Node Capacity Availability 100% % Subsystem 6 and7 Capacity Availability 100% % Table 2.20: Two-state capacity availability tables The seven components/nodes/subsystems in Figure 2.19 operate in one of two states giving a possible 128 grid states. VBA code was written in Excel to produce a 7x128 truth table. Only the first four states are shown here in Table The full table is contained in Appendix 2C. State OFNA OFNB OFNC C1 C2 Sub 6 Sub Table 2.21: Truth table for MTDC network Each 1 and 0 in the truth table is replaced with the probability of that subsystem/node being available and unavailable respectively. The probability of each state is then calculated by multiplying the seven columns together as shown in Table State OFNA OFNB OFNC C1 C2 Sub 6 Sub 7 Probability Table 2.22: Probability table for MTDC network In order to calculate the HVDC grid s overall availability, the grid s capacity associated with each of the 128 states must be deduced. VBA code was written to calculate the grid s capacity for each of the 128 states. Table 2.23 shows the available capacity for the first 4 states with subsystem 6 and subsystem 7 having a capacity rating of 900MW each. State OFNA OFNB OFNC C1 C2 Sub 6 Sub 7 Capacity (MW) Table 2.23: Capacity table for MTDC network with Sub6=Sub7=900MW Summing the probabilities of each state for each grid capacity level gives the grid s available capacity as shown in Table

59 Chapter 2 Availability Analysis Sub 6&7 =900MW Capacity (MW) Availability Energy Availability Table 2.24: Capacity availability table for MTDC network with Sub6=Sub7=900MW The MTDC network shown in Figure 2.19, with each path to shore (sub6 & sub7) rated at 900MW, has an energy availability of The energy availability was for a radial HVDC link as shown in Section 2.3. This indicates that three 600MW radial links would have a higher energy availability than an 1800MW HVDC grid with each path to shore rated at 900MW. Upgrading subsystems 6 and 7 to 1200MW increases the grid s availability as shown in Table Sub 6 & Sub 7 = 1200MW Capacity (MW) Availability Energy Availability Table 2.25: Capacity availability table for regional MTDC network with Sub6=Sub7=1200MW The grid s availability can be increased further by rating each path to shore equal to the grid s maximum capacity, as shown in Table Sub 6 & Sub 7=1800MW Capacity (MW) Availability Energy Availability Table 2.26: Capacity availability table for MTDC network with Sub6=Sub7=1800MW It should be noted that the availability figures given in Table 2.26 are calculated from component reliability indices for a DC voltage of ±300kV, however it is likely that any 1800MW VSC-HVDC scheme would be built at a voltage greater than this. Data on such systems are even sparser than for ±300kV systems, and so this study has focused on ±300kV. 59

60 Chapter 2 Availability Analysis 2.5 Cost-benefit Analysis This section compares the required capital investment against the calculated availability of each of the following schemes: MW MTDC network with each path to shore rated at 900MW 2. Three 600MW radial HVDC links MW MTDC network with each path to shore rated at 1200MW Since the schemes are being compared with one another, the components which are common to all schemes can be ignored as the cost of these components would be the same regardless. All of the schemes require three 600MW offshore nodes; hence the cost of these items has been neglected. The costs of components used in this cost-benefit analysis are from the ODIS 2011 annex and are for indicative purposes only [22]. VSC Converter Costs ( m) Rating Min Max Average 300kV 500MW kV 850MW kV 1250MW kV 2000MW Table 2.27: VSC converter costs 12 Extruded HVDC Cable ±150kV ±320kV Cross sec area Min Max Average Min Max Average mm 2 k/km k/km k/km k/km k/km k/km Table 2.28: HVDC extruded cable costs 13 Cable Installation Costs ( m/km) Cable Installation Type Min Max Average Twin Cable in Single Trench Table 2.29: Cable installation costs 12 It is assumed that the VSC converter cost is for a single converter including AC and DC switchyard. 13 It is assumed the cost is per km of cable not per km of route (i.e one radial link requires 2x165km of cable). 60

61 Chapter 2 Availability Analysis From Table 2.27, Table 2.28 and Table 2.29, the cost of the three transmission schemes (excluding the offshore nodes) can be estimated. The required cross sectional area for HVDC submarine cables of different power ratings was estimated from data given in [34]. It is estimated that the 600MW, 900MW and 1200MW cables would require cross sectional areas of approximately 630mm 2, 1400mm 2 and 2200mm 2 respectively 14. The costs of each scheme excluding the offshore nodes are given in Table Scheme Item Cost m Total Cost m 900km ±300kV 900MW Cable MW Cable Installation x 900MW Onshore Converter km ±300kV 600MW Cable Radial Cable Installation x 600MW Onshore Converter km ±300kV 1200MW Cable MW Cable Installation X1200MW Onshore Converter 240 Table 2.30: HVDC transmission scheme costs excluding offshore nodes The HVDC grid with each path back to shore rated at 900MW (scheme 1) is the least expensive scheme, but also has the lowest energy availability. The radial scheme (scheme 2) and the HVDC grid with each path back to shore rated at 1200MW (scheme 3) are more expensive than scheme 1, but their energy availability is higher. Since higher availability equates to greater revenue, it may make more economic sense to invest a greater amount of capital to obtain a scheme with a higher availability. The revenue lost each year due to a transmission scheme being unavailable can be calculated using equation (2.5). Loss U P C 8760( hrs) S (2.5) R F p U Unavailability P Rated power in MW C Capacity factor S Electricty sale pricein / MW F R p 14 Figures are based on a ±300kV submarine cable with a copper conductor in a moderate climate spaced closely together. These figures are indicative only. 61

62 Chapter 2 Availability Analysis The capacity factor for the three schemes is assumed to be This means that over the course of the year the transmission scheme is only required to operate at 40% of its rated power. The electricity sale price is assumed to be 150/MWh 16. The annual savings for scheme 2 and scheme 3 compared with scheme 1 is calculated by subtracting the annual loss of each scheme from the annual loss of scheme 1. Scheme Capital Cost m Availability Loss m/yr Saving m /yr Additional Capital Cost m Payback (yr) Table 2.31: Economic cost-benefit analysis Dividing the additional capital investment of a scheme by that scheme s additional annual revenue is one way to calculate the number of years it takes to repay the additional investment. If the number of years to repay the investment is less than the life expectancy of the scheme, then it would suggest that it is worth investing the additional capital. HVDC schemes can have a life expectancy in excess of 40 years [40]. This cost-benefit availability analysis indicates that scheme 3 offers the best potential return for the investor. Variations in capital costs, capacity factor and electricity price could significantly impact on these results. This type of economic cost-benefit analysis is simplistic and should only be used as an indication. An extensive cost-benefit analysis would need to consider the projected inflation rates, interest rates, and electricity prices over the next 40 years as well as taxation, exchange rates and commodity prices such as copper. This type of economic forecasting is outside the scope of this work. The purpose of this cost-benefit availability analysis is to clearly show the strong link between the transmission scheme s availability and its economic feasibility. Other factors, such as system losses, must be taken into consideration when evaluating which transmission scheme configuration offers the greatest financial reward. 15 Capacity factors of are typical for offshore windfarms [35]. 16 This figure is based on 1MWh of energy generated by an offshore windfarm being equal to the electricity wholesale price plus two renewable obligations certificates (ROC) plus one levy exemption certificate (LEC). The electricity wholesale price is approximately 60/MWh [36] Accredited offshore windfarms are currently awarded two ROC s per MWh [37], where each ROC is worth plus 10% for headroom [38]. One LEC has a value of 4.85 [39]. 62

63 Chapter 2 Availability Analysis 2.6 Summary The most suitable transmission technology for the connection of large offshore windfarms located more than approximately 50km from shore is VSC-HVDC. The technical and commercial viability of connecting vast amounts of the UK s generating capacity long distances from shore is dependent upon the availability of VSC-HVDC schemes. A radial VSC-HVDC scheme has been constructed for the purpose of performing availability analysis. The scheme was based on the potential radial VSC-HVDC designs outlined in National Grid s ODIS, to ensure that the scheme represents a typical VSC- HVDC link. Availability analysis, independent of methodology, can only ever be as good as the input data. Unfortunately there are no true failure statistics for VSC-HVDC components available in the public domain. The reliability indices for each component within the scheme have therefore been estimated based on the most credible information available. The availability analysis for the radial VSC-HVDC scheme has shown the energy availability due to forced outages to be approximately 96.5%. The DC submarine cable was identified to be the key component which affects the availability of the transmission scheme. Every effort must therefore be made to ensure failures of submarine cables are minimised. Availability analysis was carried out on a MTDC network with each of its two paths back to shore rated at 900MW, 1200MW and 1800MW. This analysis showed that the availability of the MTDC network is highly dependent upon the rating of the network s paths back to shore and that the grid with paths rated at 1200MW and 1800MW had a higher availability than an equivalent radial system. The strong link between a HVDC transmission scheme s availability and economic feasibility has also been established. 2.7 Conclusion Connecting large amounts of offshore wind far from the shore is a clear way to increase renewable energy generation. However, if the availability of the transmission systems which facilitate the power transfer back to shore is poor, then the cost of energy to the consumer will increase and will have a negative impact on the economy. Work to ensure a 63

64 Chapter 2 Availability Analysis high availability of these transmission schemes is therefore of paramount importance. Availability analysis is a good tool to calculate the availability of these schemes and to identify key components which have the greatest impact on this value. This would allow mitigation strategies, which would improve the scheme s availability, to be put in place before the schemes are built. With the current lack of reliability data for VSC-HVDC components, conclusive availability analysis cannot be performed, although the key importance of the cable s availability is highlighted. Furthermore, HVDC grids with additional capacity have been shown to have a higher availability than an equivalent radial HVDC scheme and consequently could provide a more cost-effective solution for the connection of offshore windfarms. 64

65 Chapter 3 HVDC Protection 3 HVDC Protection The interconnection of HVDC links has numerous potential benefits, including: a reduction in the volume of assets, enhanced operational flexibility and improved network security [1]. However, there is only one large scale (2000MW) commercial HVDC MT scheme (LCC) currently in operation (Quebec) [41]. This is primarily because there are technical difficulties with reversing power flow with LCCs, since DC current can only flow through the converter in one direction. VSCs do not have this limitation and as such are more suitable for MT systems. As the power rating of VSCs has risen, so has the interest in MT HVDC systems [42, 43]. The UK National Grid has released cost estimates that show that the connection of the UK windfarms using an integrated VSC-HVDC approach, as opposed to a radial VSC-HVDC design, could result in a saving of around 25% [44]. A key challenge for the development of HVDC grids is the protection of the grid from DC faults. At present, all commercial VSC-HVDC links are radial. In the event of a DC fault the converters at each end of the link are blocked and the AC circuit breakers are tripped so that the converter s anti-parallel diodes do not conduct. Applying this approach to a HVDC grid would require all VSCs connected to the grid to be blocked, and their respective AC circuit breakers to be tripped, for a DC fault occurring anywhere on the grid. The faulty section of the grid could then be isolated and the remaining healthy sections could be reenergised. The consequence of de-energising the entire grid due to single DC fault, however, becomes increasingly severe as the power rating of the grid increases. As discussed in section 2.4, the maximum in-feed loss permitted by NETS SQSS is 1.8GW [45]. This means that the maximum amount of power a HVDC grid could in-feed to the UK grid would be limited to 1.8GW. Therefore in order for a relatively large MT HVDC grid to be technically and commercially viable, the ability to isolate parts of the grid due to a fault, or to perform maintenance without de-energising the entire grid, must be achieved. A HVDC circuit breaker is a device which can be connected to a high potential conductor and is able to interrupt and isolate a fault on a HVDC grid. A simple single line diagram of a four-terminal HVDC system, with HVDC circuit breakers installed at both ends of each HVDC cable, is shown in 65

66 Chapter 3 HVDC Protection Figure In this scenario, a fault occurring along cable 1 will trip the HVDC circuit breakers at each end of the cable, isolating the faulty section of the grid and enabling the healthy sections of the grid to remain in service. In this case, providing that the grid is designed so that the disconnection of cable 1 does not result in a power in-feed loss to the AC grid of more than 1.8GW, then there is no limit on the grid s power capacity from a protection point of view. At the time of writing, HVDC circuit breakers are however not yet commercially available. Converter2 Cable1 Converter1 = AC circuit breaker = HVDC Breaker Windfarm1 AC Grid Cable4 Converter4 Cable2 Converter3 Cable3 Windfarm2 Figure 3.1: Single line diagram for a four-terminal HVDC system In this chapter the fundamental challenges associated with isolating faults in a HVDC grid, as opposed to a HVAC grid, are highlighted. A review of potential HVDC circuit breaker topologies at the time of investigation is given and a new HVDC circuit breaker topology is presented. The new topology referred to as the hybrid commutation circuit breaker is shown to be able to improve on some of the limitations of the existing designs and has led to a UK patent application. Furthermore, selected HVDC circuit breaker topologies, which have been published since the design of the hybrid commutation circuit breaker, are also discussed, and the current state of HVDC circuit breaker development is summarised. The production of a commercial HVDC circuit breaker will be a significant step forward for the development of HVDC grids. However without a suitable protection strategy, which is capable of tripping the correct HVDC circuit breakers within the necessary time frame, the potential of HVDC grids will not be realised. A section of this chapter is therefore dedicated to reviewing the challenges of developing a suitable protection strategy. 17 It should be noted that in practice the converters are interconnected by two cables (positive and negative) and that each cable requires a circuit breaker at each end of the cable. 66

67 Chapter 3 HVDC Protection 3.1 Basic Circuit Breaker Theory In order to appreciate the challenge of interrupting DC current, it is first necessary to understand basic circuit breaker theory. For completeness this basic theory has therefore been included and more detail can be found in [46-48]. A circuit breaker is characterised by its ability to make load currents and interrupt both load and fault currents, unlike other forms of switchgear which are not designed to interrupt fault current. In the closed position, circuit breakers provide a passage for load current, whereas in the open position they provide electrical isolation. In the event of a fault, the circuit breaker must be capable of interrupting current that is well in excess of the load current The Electric Arc The separation of the circuit breaker s contacts when current is flowing will result in the production of an electric arc. The electric arc is a self-sustained electrical discharge that is capable of sustaining large currents, behaves like a non-linear resistor, and has a voltage drop [47]. The reader should be aware that the actual behaviour of an electric arc is more complex than is discussed in this document, but for the discussion presented this simplified model is sufficient. Generally speaking, electric arcs can be categorised into high pressure and low pressure arcs. High pressure arcs occur in switchgear at or above atmospheric pressure, such as in air blast or SF 6 circuit breakers. In contrast, low pressure arcs exist in switchgear below atmospheric pressure, for example in a vacuum circuit breaker. A high pressure arc is a highly visible bright column consisting of ionised gases that permit the flow of electric current. The total arc voltage is made up of voltage drops across the anode, cathode and main body of the arc. The anode and cathode voltage drops exist in very small regions of the arc, near the electrodes, and are mainly dependent upon the electrode material. The voltage drop across the main body of the arc is dependent upon a number of factors, including: the arc length, type of gas, gas pressure and current magnitude. The electric arc s conductivity increases in a non-linear fashion with a rise in current magnitude. The arc voltage, therefore, decreases in a non-linear fashion as the current magnitude increases, all other things being equal. The conductivity for the main body of the low pressure arc is dependent upon the electrodes, since it is composed of metal vapours which have been boiled off the 67

68 Chapter 3 HVDC Protection electrodes, not ionised gases [46, 47]. The arc voltage of a low pressure arc is, therefore, significantly less than for a high pressure arc. The vacuum electric arc can exist in the form of a diffuse or a constricted arc. For current values between a few hundred and a few thousand amperes, the arc consists of a number of parallel arc channels between the two electrodes, which is known as a diffuse arc [48]. When the current value increases beyond a certain limit, which is dependent upon the electrode material and size, the arc channels come closer together to form a single tight column. This is known as a constricted arc Arc Interruption A useful way to describe the behaviour of an arc, and the requirements for arc interruption, is by the black box model [46]. If we consider an arc of conductance, G, per unit length and with a current, I, the input power per unit length, P i, and the voltage gradient, V g, can be given by the equations (3.1) and (3.2). V g I (3.1) G 2 I Pi (3.2) G The arc column has an amount of stored energy in the form of heat. The arc s conductance is a function of this energy, with conductance increasing with temperature. The amount of stored energy, W s, is therefore given by equation (3.3). t (3.3) W W W dt s i Loss 0 This equation shows that the amount of stored energy in the arc is the integral of the input energy, W i, minus the losses, W Loss, due to convection, conduction and radiation. The arc s conductance varies with time which can be described by equations (3.4) and (3.5). dg dg dw dt dw dt s. (3.4) s dg dg.( W i W Loss ) (3.5) dt dw s Equation (3.5) shows that if the input energy is greater than the losses then the arc conductance will increase. Ideally the arc s conductance would be zero and therefore the input energy needs to be less than the losses. At or near a current zero the input power to 68

69 Chapter 3 HVDC Protection the arc will be at or very close to zero. This means that the arc must be cooling, and so the conductance will decrease. This is, therefore, an appropriate point to try and regain sufficient dielectric strength between the contacts to extinguish and prevent the arc from re-igniting. If not enough energy can be removed from the arc at or near zero current then the arc will re-ignite. An arc itself may force interruption if the arc voltage is equal to or greater than the system voltage. However, this is not possible in a HVDC system as the system voltage will be significantly greater than the arc voltage. In an AC system the circuit current is forced through zero twice per cycle, presenting an opportune moment for an AC circuit breaker to interrupt the current. However, this is not the case in a DC system and therefore interrupting current in a HVDC system is more arduous. Furthermore, the fault current in an AC system is limited by the system s reactance which is not the case in a DC system. 3.2 HVDC Circuit Breaker Topologies Review of HVDC Circuit Breaker Topologies At the time of investigation a review of candidate HVDC circuit breakers from academic papers, published patents and commercially available documentation was conducted. In this section selected topologies are presented; additional topologies are presented in Appendix 3A Passive/Active Resonance DC Circuit Breaker The resonance DC circuit breaker consists of an AC breaker, BRK, in parallel with two branches; one containing a series inductor, L, and capacitor, C, the other a surge arrester, SA, as shown in Figure 3.2 [49-51]. L s I I b BRK I c L C I s SA Figure 3.2: Passive resonance circuit breaker Under normal operation the line current, I, flows through the AC breaker, BRK. The breaker will open its contacts upon receiving a trip order, which will cause a voltage arc to 69

70 Chapter 3 HVDC Protection be produced between its contacts. The line current will virtually remain the same and will continue to flow through the breaker via the arc. As the arc length increases, the arc voltage will increase and will begin to interact with the LC branch. The natural fluctuations in arc voltage produce current oscillations in the LC circuit. These oscillations grow until the current, I c, is equal to or greater than the line current, I, producing a zero crossing in the current flowing through the breaker, I b. At this point the breaker is able to extinguish the arc in the same way as it would for an AC current. The line current then commutates through the LC branch and continues to chargeup the capacitor. The capacitor voltage grows and opposes the circuit voltage, reducing the line current until it ceases. The surge arrester will begin to conduct if the capacitor voltage exceeds the surge arrester knee-point, limiting the voltage across the capacitor. In 1984, field tests were carried out on a prototype circuit breaker of this type at the Pacific HVDC Intertie. The breaker consisted of four devices, similar to the one shown in Figure 3.2, connected in series. The breaker successfully interrupted current up to 2kA at 400kV [51]. Further development and tests of this type of breaker in 1988 showed an interrupting capability of more than 4kA [52]. This topology is used in LCC HVDC schemes to interrupt and commutate current into another path. An example of this is the Metallic Return Transfer Breaker (MRTB), which is used to interrupt current flowing through the ground return path and to commutate it into the metallic return. DC switches such as the MRTBs are connected at near earth potential and as such have lower Transient Recovery Voltage (TRV) requirements than the system voltage [53]. In addition, they are only required to interrupt and commutate the line current, not to reduce the line current to zero, which reduces TRV requirements and the energy which must be absorbed by the surge arrester [54]. The passive resonance circuit breaker can be modified to an active resonance breaker by pre-charging the capacitor and connecting a mechanical switch in series with the LC branch. Under normal operation the mechanical switch is in the open position. Once the interrupter, BRK, is opened, the mechanical switch is closed at the appropriate time, allowing the capacitor to discharge creating an oscillatory current. The remaining sequence of events for current interruption is very similar to that of a passive resonance breaker. This 70

71 Chapter 3 HVDC Protection method allows higher current interruption in comparison to the passive resonance circuit breaker, with tests showing successful interruption for currents up to 5 ka [50]. The time between fault inception and interruption for a resonance circuit breaker topology is typically ms, in which time the DC current in a VSC scheme could reach in excess of 20p.u. [55]. The interruption time is too long and the fault current is too high, hence this circuit breaker topology is currently unlikely to be suitable for the protection of HVDC grids Conventional Hybrid Solution A hybrid circuit breaker is one that incorporates a minimum of two types of switching technology, such as a mechanical and a semi-conductor switch. Figure 3.3 shows the circuit diagram of a conventional hybrid circuit breaker [56]. This DC circuit breaker consists of a fast mechanical switch, S, connected in parallel with two branches. One branch contains a string of anti-parallel semi-conductor devices with turn-off capability, connected in series with an inductor, L, and the other branch consists of a surge arrester, SA. Under normal operation the line current, I, flows through the mechanical switch. The mechanical switch opens its contacts upon receiving a trip command creating an arc voltage. The semi-conductor switches are then fired, which causes the line current to commutate through the semi-conductor switches. Once enough time has lapsed for the mechanical breaker to regain its dielectric strength, the semi-conductor switches are turned-off. Due to the stored energy in the system s inductance, L s, the voltage will increase rapidly until the surge arrester begins to conduct and clamp the voltage. The surge arrester knee-point voltage must be higher than the system voltage in order to de-magnetise the system s inductance. It is common that the maximum knee-point voltage is chosen to be 50% higher than the system voltage [56]. L s I I b S I c L I s SA Figure 3.3: Conventional hybrid circuit breaker 71

72 Chapter 3 HVDC Protection The speed of fault current interruption for this device is predominantly dependent upon the speed of the fast mechanical switch. Fast mechanical switches for HVDC circuit breakers are currently under development and hence very little information with regards to their specification is available. However, based on available information it is expected that the total opening time 18 for the fast mechanical switch will be less than 2ms [57] and hence the interruption speed of the conventional hybrid circuit breaker is significantly faster than the resonance breakers. The fast mechanical switch must be rated appropriately to carry the nominal load current and to block a specific maximum voltage, which is dependent on the surge arrester s rating. The semi-conductor switches must be able to interrupt the maximum fault current and to block the specific maximum voltage. The surge arrester must have an appropriate energy dissipation rating Hybrid Circuit Breaker with Forced Commutation Circuit The plasma created by an electric arc affects the mechanical switch s voltage withstand slew rate. According to [56] the fast mechanical switch has a slew rate of 80V/μs, if there is plasma between the two contacts, and 300V/μs, if no plasma has occurred. Therefore if no electric arc occurs in the mechanical switch, it can regain its dielectric strength more than three times faster resulting in a much shorter interruption time. This enables the current to be interrupted faster, which reduces the maximum current magnitude. This can be achieved by ensuring that no current is flowing through the mechanical switch when its contacts are separated, which may be realised by using the circuit breaker topology in Figure 3.4 [56]. During normal operation, the line current flows through the inductor, L c, and the mechanical switch, S. Upon detection of a fault, the commutation thyristors are fired and the current commutates from the inductor to the pre-charged commutation capacitor, C1. The current flowing through the mechanical switch will remain unchanged until the capacitor voltage reverses polarity. This opposing voltage causes the line current to commutate into the parallel branch, which consists of series-connected semi-conductor devices with turn-off capability and an inductor, L. Once the current has transferred to path I c there is no current flowing through the mechanical switch and therefore the contacts can 18 The total opening time in this report is defined as the time it takes from the trip signal being received by the switch until its contacts are fully open. 72

73 Chapter 3 HVDC Protection be separated without arcing. The remaining sequence of events is the same as explained for a conventional hybrid circuit breaker. The forced commutation circuit breaker is able to interrupt fault current quicker than a conventional hybrid circuit breaker, resulting in a reduction in the maximum current magnitude. This leads to a reduction in the current interrupting capability requirement of the semi-conductor switches and the energy dissipation rating of the surge arrester. The fault current capability requirement of other components in the system may also be reduced. Generally speaking, lower rated components are less expensive. An additional commutation capacitor with pre-charging circuit, an inductor and a number of thyristors, are however required for this topology, in comparison to the conventional hybrid circuit breaker. The economic viability of this topology will therefore be very much dependent upon the system voltage. C1 I C1 L s I I 1 L c I b S I c L I s SA Figure 3.4: Hybrid breaker with forced commutation circuit Solid-state Circuit Breaker This DC circuit breaker consists of a string of anti-parallel semi-conductor devices which have turn-off capability connected in parallel with a surge arrester [56]. This configuration is shown in Figure 3.5. L s I b I s SA Figure 3.5: Solid-state circuit breaker 73

74 Chapter 3 HVDC Protection During normal operation the current flows through the semi-conductor devices. Upon detection of a fault the semi-conductor devices are switched-off, resulting in a rapid voltage increase until the surge arrester begins to conduct. The knee-point voltage for the surge arrester is again set above the system voltage and therefore the surge arrester demagnetises the system s inductance. This topology requires no mechanical switch, and as such it is able to interrupt fault current significantly faster than the other DC circuit breaker designs ( 0.2ms [58]). The semiconductor devices are therefore required to interrupt a much smaller fault current, and hence lower rated devices may be used, or fewer devices connected in parallel. This design may however require hundreds of series-connected semi-conductor devices to block the TRV, resulting in very high on-state losses, which are about 30% of the losses of a VSC station [57]. The breaker will also require a large cooling system. There is a pilot 10kV solid-state circuit breaker in Hällsjön, Sweden [59] Hybrid Commutation HVDC Breaker (New) To improve on the key limitations of the existing HVDC circuit breaker topologies, a new topology was developed as part of this PhD work, which has resulted in a UK patent application [60]. The hybrid commutation HVDC circuit breaker contains three branches connected in parallel and is shown in Figure 3.6. The first branch consists of a semiconductor switching device with turn-off capability, T, and a mechanical switch, S, connected in series. The semi-conductor switch, T, has a surge arrester, SD, connected across its terminals to ensure that the voltage rating of the device is not exceeded. The second branch is made up of a semi-conductor switching device, T c, connected in series with a capacitor, C, whilst the third branch contains a surge arrester, SA. 3 SD SA L s I 1 2 T T c C S Figure 3.6: Hybrid commutation HVDC circuit breaker 74

75 Chapter 3 HVDC Protection During normal operation the line current, I, flows through the semi-conductor switch and the mechanical switch. At the instance the fault current is detected, the semi-conductor switch is turned-off and the commutation thyristor is turned-on. This switching action causes the line current to rapidly commutate from branch one into branch two. The line current is no longer flowing through the mechanical switch and, therefore, its contacts can separate without creating an electric arc. The line current charges-up the capacitor until the surge arrester s knee-point voltage is reached, resulting in the line current commutating into branch three. The surge arrester de-magnetises the system s inductance and the line current ceases Advantages Vastly lower on-state losses in comparison to the solid-state circuit breaker In contrast to the solid-state circuit breaker, the hybrid commutation circuit breaker may only require one semi-conductor switch in the normal conduction path. This is because the voltage across this branch is distributed between the semi-conductor switch and the mechanical switch, where the voltage across the semi-conductor switches is limited by the parallel surge arrester. This approach allows a single semi-conductor switch connected in series with a low contact resistance mechanical switch to provide the normal conduction path, resulting in significantly lower on-state losses than the solid-state circuit breaker. Shorter initial interruption speed in comparison to other known mechanical HVDC circuit breaker topologies The initial interruption speed refers to how quickly the fault current is diverted from the primary conduction path. The majority of hybrid circuit breaker designs use the arc voltage to commutate the fault current from the primary path into the secondary path. The current commutation time is dependent upon how quickly the mechanical contacts open, and the magnitude of the arc voltage, amongst other factors. From the instance the mechanical switch receives the command to open, there will be a delay before its contacts begin to separate, and the arc voltage is not likely to reach more than 1kV. The hybrid circuit breaker with forced commutation (Section ) uses a pre-charged capacitor to perform the current commutation from the primary path. For this device, 75

76 Chapter 3 HVDC Protection the pre-charged capacitor must fully discharge and then charge in the opposite direction to provide the commutation voltage to force the fault current into the secondary path. In contrast, the commutation voltage for the hybrid commutation circuit breaker (Figure Section 3.2.2) is the voltage across the semi-conductor switch at the instance it is turned-off. The voltage across the circuit will increase rapidly and is only limited by the surge arrester, SD, which is likely to have a knee-point voltage in excess of 4kV. Therefore the commutation voltage of the hybrid commutation circuit breaker develops faster and has a greater magnitude than the other hybrid designs resulting in a shorter commutation time. Arc-less operation Using a mechanical switch to provide the commutation voltage has a negative effect on the interruption time. Since the hybrid commutation circuit breaker uses a semiconductor switch to perform the initial interruption, and to commutate the current into the parallel branch, there is no current flowing through the mechanical switch when its contacts are separated and, therefore, no electric arc. This increases the mechanical switch s blocking slew rate. Furthermore, the mechanical switch experiences no electric arc stress, which is likely to improve the reliability and reduce the maintenance requirement of this device. At the time of developing the hybrid commutation circuit breaker, the only other known hybrid HVDC circuit breaker which performed commutation without an arc voltage was the hybrid breaker with a forced commutation circuit (Section ). The hybrid commutation circuit breaker does however, have several advantages in comparison to the hybrid breaker with a forced commutation circuit: 1. Faster initial interruption speed, resulting in a lower fault current 2. Requires less components 3. The control strategy for the device is less complex 4. Successful operation is less sensitive to the circuit parameters 5. Less expensive due to lower fault current and less components Initial Simulation Initial simulations were used to demonstrate the hybrid commutation circuit breaker s principle of operation for fault current interruption, where the PSCAD schematic is shown 76

77 Chapter 3 HVDC Protection in Figure 3.7. With reference to Figure 3.8, the simulation results can be described as follows: 1. Nominal line current, I L, flows through the GTO thyristor and mechanical switch. 2. A short-circuit fault is applied at 0.1s and the line current rapidly begins to rise ms later the GTO thyristor is turned-off and the commutation thyristor is turnedon, causing the line current to commutate from the mechanical switch into the thyristor-capacitor branch, I c. The mechanical switch (BRK) contacts are separated without creating an electric arc. 4. Capacitor voltage increases until the surge arrester knee-point voltage is reached and the surge arrester begins to conduct, I surge. 5. Surge arrester de-magnetises the system inductance. 6. Line current ceases. Figure 3.7: PSCAD schematic for the hybrid commutation HVDC circuit breaker Figure 3.8: Example simulation results for the hybrid commutation HVDC circuit breaker 77

78 Chapter 3 HVDC Protection These simulation results show that the hybrid commutation HVDC circuit breaker is viable in principle Latest HVDC Circuit Breaker Designs This section presents selected breaker topologies which were published after the hybrid commutation HVDC circuit breaker was designed Proactive Hybrid Breaker The proactive hybrid DC breaker is shown in Figure 3.9 and is currently being developed by ABB [57]. The first branch comprises a disconnector (fast mechanical switch) connected in series with an auxiliary DC breaker (semi-conductor switch) which is very similar to the hybrid commutation HVDC circuit breaker shown in Figure 3.6. The second branch contains the main DC breaker which is separated into several sections. Each section contains a stack of IGBTs with anti-parallel diodes and a surge arrester connected in parallel with the stack. The main DC breaker is rated for the full voltage and current breaking capability. The auxiliary breaker contains a small number of series-connected IGBTs as it is only required to block a few kv. Hybrid DC Breaker Current Limiting Reactor Residual DC Current Breaker Disconnector Auxiliary DC Breaker Main DC Breaker Figure 3.9: Proactive hybrid DC breaker During normal operation, the fast disconnector, auxiliary DC circuit breaker and main DC breaker are closed/on. The main DC breaker has a much higher resistance than the auxiliary DC breaker, due to the vastly higher number of series-connected semi-conductor switches. The load current therefore flows through the auxiliary breaker under normal operation. The line current is commutated to the main breaker by switching-off the axillary breaker, once the overcurrent threshold is reached. The fast disconnector can then open without creating an electric arc. Once the disconnector is fully open, and therefore able to block the recovery voltage, the main DC breaker can be switched-off. The breaker is said to be able to limit the line current by operating the main breaker, so that the voltage across the DC inductance is controlled to zero [57]. This allows the protection strategy further 78

79 Chapter 3 HVDC Protection time to determine whether or not the breaker needs to be tripped. The main DC breaker is switched-off once the breaker receives a trip signal or the breaker reaches its maximum time limit for current limiting. The instance that the main DC breaker is switched-off, the voltage across the breaker rapidly increases until it is clamped by the surge arresters. In the event that the breaker is not required to interrupt the fault current (i.e. the fault is on a different cable) the line current can be transferred back to the primary path by closing the disconnector and turning-on the auxiliary switch. The current limiting mode allows the protection strategy additional time to select the faulty cable 19. Furthermore, if two such breakers are connected in series the back-up breaker could also be instructed to commutate the line current into the main DC breaker, so that the DC current can be interrupted very quickly ( 0.2ms) if the primary breaker fails [57]. ABB are currently building a prototype of this device for a 320kV system with a nominal current of 2kA. The device is expected to achieve a current breaking capability of 9kA in less than around 2ms from fault inception. Currently the main DC breaker has been shown to be capable of breaking currents above 9kA at 120kV [57]. An international patent application for this breaker has been filed [61]. ABB have subsequently filed two additional patent applications for HVDC circuit breakers which have a similar primary conduction path to the hybrid commutation HVDC circuit breaker (Section 3.2.2) [62, 63]. These patents were filed before the patent for the hybrid commutation HVDC circuit breaker [60]. The patent claims for the hybrid commutation HVDC circuit breaker, were likely to infringe on the claims made in these patents, especially [62, 63] due to the use a surge arrester in the primary condition path. It is for these reasons that an international patent for the hybrid commutation HVDC circuit breaker was not pursued Hybrid DC circuit breaking device (Siemens) The hybrid DC breaking device shown in Figure 3.10 is currently patent pending and was submitted by Siemens [64]. This topology is very similar to the hybrid commutation HVDC breaker shown in Figure 3.6. The main difference between the two topologies is that the hybrid DC circuit breaking device does not contain a thyristor valve in the secondary conduction path. 19 The protection strategy must still operate before the grid DC voltage falls below acceptable levels. 79

80 Chapter 3 HVDC Protection SA I L s S C Figure 3.10: Hybrid circuit breaking device The principle of operation for the hybrid circuit breaking device is effectively the same as the hybrid commutation HVDC breaker, which is described in Section The key difference is that the current flowing through the capacitor in this topology may oscillate, whereas the inclusion of the thyristor valve in the hybrid commutation HVDC breaker prevents the capacitor current from reversing direction. One embodiment of the hybrid circuit breaking device described in the patent prevents the current in the capacitor from oscillating by connecting a residual breaker in series with, L s. The international patent application for this device was filed after the UK patent application for the hybrid commutation HVDC circuit breaker [60, 64]. 3.3 Comparison of HVDC Circuit Breakers The HVDC circuit breaker topologies presented in this chapter have been categorised into 5 types and each type has been rated in terms of their speed, on-state losses and complexity as shown in Table 3.1. Each type of circuit breaker is rated out of 5 for each characteristic, with 1 being the best. Type of breaker Topologies Speed Losses Complexity Resonance Arc voltage hybrid Arc-less hybrid without auxiliary breaker Arc-less hybrid with auxiliary breaker 3.2.2, , Solid-state Table 3.1: Comparison of HVDC breaker types The resonance breakers are generally not considered to be technically viable for the protection of VSC-HVDC grids due to their slow interruption speed (>30ms). The solidstate circuit breaker is significantly faster than the other HVDC circuit breakers ( 0.2ms). 80

81 Chapter 3 HVDC Protection However, the very high on-state losses, which are about 30% of the losses of a VSC station [57], make this device unsuitable. The arc-less hybrid breaker without auxiliary breaker, offers improved interruption speed in comparison to the arc voltage hybrid breakers at the expense of increased complexity. The arc-less hybrid breaker with auxiliary breaker, further improves on the interruption speed of the arc-less hybrid breaker without auxiliary breaker, but at the cost of increased losses. However these losses are insignificant in comparison with a VSC station. The arcless hybrid breakers with auxiliary breakers also give greater operational flexibility with reduced cost and complexity. The interruption speed of the arc-less hybrid breakers with auxiliary breaker is expected to be about 3ms [57, 58, 65]. ABB have built a prototype of arc-less hybrid breakers with auxiliary breaker and Siemens has filed at least one patent for this type of breaker. It is for these reasons that this type of HVDC circuit breaker is likely to be the first generation of HVDC breakers to be installed in a VSC-HVDC grid. The use of a fully rated solid-state circuit breaker in the secondary path of the proactive hybrid breaker offers greater operational flexibility than the other two topologies, however it is also likely to require a larger footprint and be more expensive. It is clear from Table 3.1 that all designs to date have disadvantages and that further research is required. 3.4 Protection Strategies Protection strategies which can locate and isolate DC faults MTDC grids are discussed in several sources [66-70]. Many of these strategies require the entire grid to be de-energised in order to isolate the faulty section of cable, which is likely to be unacceptable for HVDC grids with a capacity in excess of 1.8GW. Therefore only protection strategies which are potentially capable of isolating the faulty section of grid without de-energising the entire grid are discussed Protection System Requirements Any protection system should have the following properties [58, 71]: Sensitivity detect every fault Selectivity only operate under fault conditions and only affect the faulty section Speed act before the fault could potentially cause damage to equipment or could no longer be interrupted by the circuit breakers 81

82 Chapter 3 HVDC Protection Reliability be reliable and have a back-up system in the case of primary protection system failure Robustness be able to act in a degraded mode as well as a normal mode and be able to discriminate between faults and other operations such as set-point changes Seamless after the fault clearance the healthy part of the system should continue to operate in a secure state In a HVDC grid the DC cable protection system must be able to identify line-to-ground faults and line-to-line faults. A line-to-ground fault can occur when one of the cables is damaged and a line-to-line fault can occur when both cables are damaged simultaneously. An example of this could be when both cables are buried in a single trench and are damaged by a single anchor strike. The primary protection system should be selective so that it only trips the HVDC circuit breakers necessary to isolate the faulty section of the grid. This means that the circuit breakers responsible for protecting a particular cable should not act for faults on a different cable, and that faults in other protections zones, such as the converter, should not trigger the protection relays in the DC cable protection zone. Leading HVDC circuit breakers designs are expected to be able to interrupt a fault current of approximately 10kA in around 3ms. Based on a nominal DC current of approximately 1.7kA and a fault current rate of rise of about 2kA/ms for the worst case fault condition, the breakers current breaking limit would be reached in approximately 4ms from fault inception. Limiting the fault current rate of rise to 2kA/ms would require significantly larger cable/line reactors than installed on existing VSC-HVDC schemes [57]. This leaves about 1ms for the protection system to detect and identify the faulty section of cable and to then instruct the appropriate breakers to open, unless the HVDC breaking time or the fault current rate of rise can be reduced further. The protection system must have a back-up to give a high degree of reliability. Furthermore, once the faulty section of the grid has been isolated, the control and protection systems must interact appropriately to ensure that the healthy section of the grid can operate in a secure manner. 82

83 Chapter 3 HVDC Protection Detection and Selection A simple diagram of a four-terminal HVDC grid is shown in Figure The HVDC circuit breakers at the end of each cable are responsible for clearing faults on their respective cables. If a fault occurs on cable 1 the protection system is required to identify that a fault has occurred on cable 1 and to instruct only the HVDC circuit breakers at each end of this cable to trip. All other HVDC circuit breakers should remain closed. Converter2 Cable1 Converter1 = AC circuit breaker = HVDC Breaker Windfarm1 AC Grid Cable4 Converter4 Cable2 Converter3 Cable3 Windfarm2 Figure 3.11: Single line diagram for a four-terminal HVDC system VSCs have large capacitor banks connected to the DC side of the converter, which discharge in the event of a fault. Hence, DC cable faults are typically characterised by a rapid increase in the DC fault current and a rapid decrease in the DC voltage 20. Cable faults could therefore be detected by one or more of the following protection methods: Overcurrent: trip breaker if the DC current exceeds a set threshold for a set period of time Undervoltage: trip breaker if the DC voltage drops below a set limit for a set period of time di/dt: trip breaker if the rate of increase of current exceeds a set limit dv/dt: trip breaker if the rate of decrease of DC voltage exceeds a set limit The protection strategies described above are not individually particularly selective and it is likely that employing these protection strategies would result in HVDC breakers on nearby cables tripping. Distance protection relays, which measure the distance to the fault 20 The fault current due to line-to-line faults is more severe than line-to-ground faults, as the capacitor bank connected to the positive pole, and the capacitor bank connected to the negative pole discharge. The configuration (symmetrical monopole, bipole etc.) and the type of VSC (Two-level, MMC etc.) employed can affect the fault current and voltage characteristics. 83

84 Chapter 3 HVDC Protection by dividing the voltage measurement by the current measurement, are widely used in AC grids [71]. Distance protection is however, not considered appropriate for DC grids for a number of reasons, including the cable s low resistance, which results in large distance errors due to small measurement errors. There are other protection methods, such as differential cable protection and cable directional protection, which offer cable selectivity [58]. Differential cable protection trips the HVDC circuit breakers at each end of the cable if the difference between the current at the sending and receiving ends of the cable is above a specified limit. Cable directional protection trips the breakers if the current through each breaker is flowing in opposite directions. However, these protection strategies require communication between breakers at each end of the cable. Reliance upon communication between platforms is unlikely to be acceptable, due to the inherent time delays and the possibility of the fibre optic cable becoming damaged. The following example, shown in Figure 3.12, demonstrates the effect of time delays, due to travelling waves and communication delays, for the cable directional protection scheme. Under normal operation, power flows from the sending end to the receiving end of the cable. A fault is applied to the sending end of the cable and the current through breaker B1 begins to rise rapidly. Sending B1 100km DC Cable Receiving B2 100km Fibre Optic Cable Figure 3.12: Cable directional protection The speed of an electromagnetic wave through XLPE is approximately 2x10 8 m/s, hence it takes more than 0.5ms before the current flowing through the breaker at the receiving end of the cable, B2, changes direction 21. The speed of light via a fibre optic cable is also 21 Based on an XLPE permittivity value of 2.3, the speed of an EM wave through the cable can be 8 6 approximately calculated as follows: m / s m / s. Therefore the time it takes for 6 the current wave due to the fault to arrive at breaker B2, is100km s. 84

85 Chapter 3 HVDC Protection roughly 2x10 8 m/s 22. It therefore takes a further 0.5ms for B2 to signal to B1 that the current direction has changed. Hence it takes about 1ms from the instance the fault occurs until the HVDC breaker, B1, is able to acknowledge that there is a fault. Note also that longer cables compound this problem. The time delays and the reliability concerns make a DC protection system requiring communications between offshore platforms an unlikely solution. The use of travelling wave detection or signal processing (Fourier or wavelet analysis) has been identified as a potential tool to find the faulty cable in a DC grid [71]. In [73] travelling waves were used to find a faulty line for a DC grid using overhead lines [71]. In [66] a protection methodology was developed using wavelet analysis to analyse local measurement signals to identify a faulty cable in a HVDC grid. The wavelet transform is a mathematical tool, similar to the Fourier transform for signal analysis [74]. Fourier analysis is not a particularly good technique for analysing nonperiodic signals such as transients, because when transforming the complete signal into the frequency domain the time information is lost. This problem can be overcome to some extent by using a technique called the Short-time Fourier Transform (STFT) which analyses a small section of the signal at a time. However, the major drawback is that the time window is the same for all frequencies. Wavelet analysis circumvents this problem by using variable sized windows, which enables a long time window to be used for low frequency information and a shorter time window to be used for high frequency information. Each scale in Figure 3.13 (right) represents a band of frequencies. Frequency Scale Time Time Figure 3.13: STFT (left) and Wavelet (right) views of signal analysis Each HVDC breaker could process the local voltage and current measurements, using wavelet analysis to identify fault characteristics. The protection algorithm in [66, 75] 22 An optical fibre is a very thin wire of glass. The speed of light in glass is about two thirds of its value in free space [72] 85

86 Chapter 3 HVDC Protection acknowledges that a fault has occurred if two of the following three detection modules indicate that a fault has occurred: 1. M1: fault detection by using voltage wavelet coefficients 2. M2: fault detection by using current wavelet coefficients 3. M3: fault detection by using the voltage derivative and magnitude The two out of three selection system is employed to improve the reliability of the signal processing, by helping to prevent the protection system from tripping the HVDC breaker when no fault has occurred. The thresholds used to determine if a fault has occurred or not were set using simulations, with a particular focus on the worst case scenarios (fault at sending end and fault at receiving end of cable). Faults on cables near to the DC bus where other cables are connected, caused the thresholds in the non-faulty cable to be reached. This selectivity problem was overcome by comparing the wavelet voltage coefficients of all the breakers connected to the same DC bus and by tripping the breaker with the highest coefficient. The protection methodology was shown to be able to determine which cable was faulty within 1ms, without the use of communications. The lack of experience using wavelet analysis in the protection of power systems may make its use as the main protection method, a cause for concern. If this is the case then it is more likely that a protection strategy based on a combination of more traditional protection methods will be sought. The preferred choice could be a protection strategy which uses voltage, current, dv/dt and di/dt measurements with wavelet analysis for optimum detection and selection, but which is not solely reliant upon wavelet analysis. In one of the worst scenarios for selecting the faulty cable was when a fault was applied on a cable near to the DC bus. This issue was avoided by comparing wavelet voltage coefficients. This selectivity problem could also be overcome without the use of wavelet analysis by checking the magnitude and direction of the current flowing through each cable connected to the DC bus. Only the current in the faulty cable will increase in the direction from the DC bus towards the fault, as shown in Figure

87 Chapter 3 HVDC Protection VSC DC Bus VSC DC Bus Figure 3.14: DC current direction before (left) and after (right) cable fault 6 The current direction selectivity could solve the issue of breakers connected to the same DC bus (same platform) incorrectly tripping. This technique cannot however be used to prevent breakers on nearby platforms from tripping. For example, in Figure 3.15 a fault is applied to cable 2 very near to the VSC1 DC bus. If the protection thresholds are exceeded in breakers B1 and B2, the DC cable protection system for VSC1 can identify that B3 needs to be tripped by checking the current magnitude and direction. However, if the protection thresholds in breaker B5 are exceeded, the DC cable protection system for VSC2 would check the current direction and as a result, would trip B5, incorrectly assuming that there is a fault on cable C1. Hence, the thresholds in B5 must not be exceeded for a fault on cable C2. VSC 1 DC Bus B1 B2 C1 B5 B4 DC Bus VSC 2 B3 B6 C2 Figure 3.15: Fault on cable C Back-up Protection The protection system must have a high degree of reliability. This means that if any component in the protection system fails, the system must still operate. The failure of a HVDC breaker is a key concern for the protection of a HVDC grid. This is a valid concern, considering the fact that there are no HVDC breakers commercially available and therefore there is no operational experience. At present, the best method is to ensure that the HVDC circuit breakers are highly reliable in theory and that a back-up protection system is in place in the event that a HVDC breaker fails. The reliability of HVDC breakers could be improved by duplicating all critical components within technical and economic boundaries. 87

88 Chapter 3 HVDC Protection The back-up protection system must not interfere with the primary protection system and it must ensure that, based on present procedure, no more than 1.8GW is disconnected from the UK AC grid. This section of the document outlines three possible back-up protection strategies. In Figure 3.16 (left) each DC cable is protected by two HVDC circuit breakers. In the event that one breaker cannot clear the fault on its cable the other breakers connected to the same DC bus could be tripped, isolating the DC bus from the rest of the HVDC grid. The AC circuit breakers for the VSC connected to the corresponding DC bus would also need to be tripped. The isolation switches installed at each end of the faulty cable (not shown in Figure 3.16) could then be opened, allowing the VSC s AC circuit breaker to be closed energising the DC bus. The HVDC circuit breakers connected to the non-faulty cable could then be closed. This method requires the DC bus to be completely isolated from the rest of the DC grid for several hundred milliseconds [76]. This means that the loss of the DC bus must not reduce the power injected into the AC grid by more than 1.8GW. Installing a HVDC circuit breaker between the VSC and DC bus could reduce the amount of time that the DC bus is disconnected to less than 100ms 23. Upgrading the standard half-bridge converter to a full-bridge converter, capable of blocking fault current, could replace the need to install a HVDC breaker between the VSC and the DC bus. The above strategy requires that every HVDC breaker is capable of breaking fault current in both directions. If each breaker is however, only required to break current in one direction, the size and cost of the breaker could be reduced. Instead of operating the breakers connected to the same DC bus as the faulty breaker, the breakers at the opposite end of the cable could break the fault current as shown in Figure 3.16 (centre). The use of uni-directional breakers could also lead to a more simplistic protection strategy. 23 The breaking time of a HVDC breaker is expected to be about 3ms and the opening time of a fast mechanical isolator is likely to be less than 40ms. 88

89 Chapter 3 HVDC Protection VSC 1 VSC 1 AC breaker closed HVDC breaker closed AC breaker open HVDC breaker open VSC 1 VSC 2 VSC 2 VSC 2 C3 VSC 3 VSC 3 VSC 3 C4 Figure 3.16: Back-up protection strategies : Cable bi-directional breakers (left) Cable uni-directional breakers (centre) Ring bus (right) In both of the aforementioned protection strategies, the failure of any HVDC breaker leads to the entire DC bus being temporarily disconnected from the rest of the HVDC grid. A fault on the DC bus, or the connection between the VSC and the DC bus, also requires the entire DC bus to be permanently disconnected until the fault is removed, or until the faulty section can be isolated and bypassed using disconnectors. If this bus is used as a transit bus (transfer energy from VSC1 to VSC3) problems may ensue. These issues can be solved to an extent by using a ring bus as shown in Figure 3.16 (right). The failure of any HVDC breaker in the ring bus leads to two connections (C3 and C4), as opposed to four connections, being disconnected from the HVDC grid. Hence, disconnecting any two adjacent connections must not exceed the maximum in-feed loss of 1.8GW to the AC grid. The ring bus, however, requires four bi-directional HVDC breakers, and the primary protection strategy must select and trip four breakers for a single cable fault. This indicates that the ring bus would be more expensive than the other two strategies and that the primary protection system would be less reliable. There are other DC substation configurations that would be possible; each with advantages and disadvantages. It may be the case that installing uni-directional breakers is the best solution for a terminal with two DC cables and that the ring bus is better suited for three cables. It is therefore important that different configurations can be used within the same HVDC grid and that the different protection strategies are compatible Seamless and Robust Protection System Upon fault clearance, current flowing through the healthy converters and cables must be redistributed carefully to ensure that components are not overstressed and to prevent other breakers from needlessly tripping. This requires control and protection interaction studies 89

90 Chapter 3 HVDC Protection to be carried out for the worst case scenarios. The protection system must be able to protect the grid for all foreseeable grid configurations, not just the nominal configuration. For example, if a VSC is disconnected from the grid, due to a fault or for maintenance purposes, the breaker protection settings must still be valid to provide adequate protection for the grid. It is unlikely that it would be permissible to update breaker protection settings for different grid configurations, as this would require communications. 3.5 Conclusion In this chapter, the requirement for a HVDC circuit breaker has been identified and selected breaker topologies have been described and compared. The comparative analysis concludes that arc-less hybrid circuit breakers with an auxiliary circuit breaker are the most suitable type of HVDC circuit breaker for the protection of a HVDC grid. This is predominantly due to their ability to achieve the best balance between operation speed and on-state losses. The chapter also outlined the key requirements of a DC cable protection system for a HVDC grid and reviewed potential protection strategies to identify and locate a faulty cable. It is likely that a protection strategy will be developed based on a combination of traditional techniques (dv/dt, overcurrent etc.) used in conjunction with modern techniques (wavelet analysis) for optimum detection and selection. 90

91 Chapter 4 MMC-HVDC 4 MMC-HVDC A simplified diagram for the offshore connection design of a Round 3 windfarm employing a 1GW VSC-HVDC point-to-point scheme is shown in Figure 2.1. In order to assess the steady-state and transient performance of the VSC-HVDC links, high fidelity EMT models are required. The aim of this chapter is to describe the development of a high fidelity EMT model of a MMC-HVDC link employed for the connection of a typical Round 3 windfarm. At the time this modelling work was undertaken, VSC-HVDC transmission system models were mainly based on two-level VSCs with PWM control [77-79]. There were a small number of publications which had modelled VSC-HVDC transmission systems with MMCs [10, 80, 81], however these publications were limited in scope and lacked key information required to produce a detailed MMC-HVDC transmission system model. The work in this thesis provides a more detailed and complete description of EMT modelling for MMC-HVDC systems. Figure 4.1 shows a diagram of the MMC VSC-HVDC link for a Round 3 windfarm. In this chapter the structure, operation, controllers and parameters for each component are discussed in detail. The control functions that are required for a MMC-HVDC interconnector are also described. 1000MW Windfarm X PCC2 T=15% 220kV 370kV I s2(abc) V s2(abc) Y g/d MMC2-Offshore I dc2 I dc1 165km DC cable V dc2=600kv R brak MMC1-Onshore X T=15% 370kV 410kV D/Y g PCC1 I s1(abc) V s1(abc) SCR=3.5 V n Z n 400kV Active and reactive power control AC voltage magnitude and frequency control L arm=45mh C SM=1150μF DC link voltage control and AC voltage magnitude control Figure 4.1: MMC VSC-HVDC link for Round 3 windfarm 4.1 MMC Structure and Operation The basic structure of a three-phase MMC is shown in Figure 4.2. Each leg of the converter consists of two converter arms which contain a number of Sub-modules (SMs), and a reactor, L arm, connected in series. Each SM contains a two-level half-bridge converter with two IGBTs and a parallel capacitor. The module is also equipped with a bypass switch to remove the module from the circuit in the event that an IGBT fails, and a 91

92 Chapter 4 MMC-HVDC thyristor, to protect the lower diode from overcurrent in the case of a DC side fault. The conduction states of a SM are displayed in Figure V dc /2 I dc I ua SM1 SM1 SM1 SMn SMn I la I dc SMn -V dc /2 V ua Arm SM2 SM2 SM2 SM2 SM2 SM2 V la SMn SMn SMn SM1 SM1 SM1 L arm R arm Single IGBT I arm V cap V c V b V a V SM Sub-module Figure 4.2: Three-phase MMC The converter is placed into energisation mode when it is first powered-up. In order to energise the SM capacitor the upper and lower IGBTs are switched-off. If the arm current is positive then the capacitor charges and if the arm current is negative then the capacitor is bypassed. This energisation state does not occur under normal operation. Energisation mode - Upper IGBT off and Lower IGBT off SM on - Upper IGBT on and Lower IGBT off SM off - Upper IGBT off and Lower IGBT on I arm >0 I arm V Cap I arm V Cap I arm V Cap V SM V SM V SM I arm <0 I arm V Cap I arm V Cap I arm V Cap V SM V SM V SM Figure 4.3: SM conduction states The SM terminal voltage, V SM, is effectively equal to the SM capacitor voltage, V cap, when the upper IGBT is switched-on and the lower IGBT is switched-off. The capacitor will charge or discharge depending upon the arm current direction. With the upper IGBT switched-off and the lower IGBT switched-on, the SM capacitor is bypassed and hence 92

93 Chapter 4 MMC-HVDC V SM is effectively at zero volts. Each arm in the converter therefore acts like a controllable voltage source, with the smallest voltage change being equal to the SM capacitor voltage. With reference to the equivalent circuit for phase A, as shown in Figure 4.4, the following equation for the phase A converter voltage can be derived: Vdc diua Va Vua Larm Rarm Iua (4.1) 2 dt Vdc dila Va Vla Larm Rarm Ila (4.2) 2 dt The upper and lower converter arm currents, I ua and I la, consist of three main components as given by equations (4.3) and (4.4) [82]. The current component which is common to Idc both arms ( I ) is commonly referred to as the difference current, I diff. 3 circ I I ua la Idc Ia Icirc (4.3) 3 2 Idc Ia Icirc (4.4) 3 2 I ua L arm R arm L arm R arm I la I a V ua V a Z L V la V dc/2 V dc/2 0V Figure 4.4: Equivalent circuit for phase A The circulating current, I circ, is due to the unequal DC voltages generated by the three converter legs. Substituting equations (4.3) and (4.4) into equations (4.1) and (4.2), and then summing the resultant equations, gives equation (4.5). Vla Vua Larm dia Rarm Va Ia (4.5) 2 2 dt 2 Equation (4.5) shows that the converter phase voltages are effectively controlled by varying the upper and lower arm voltages, V ua and V la. Equation (4.5) may be re-written as 93

94 Chapter 4 MMC-HVDC equation (4.6), where V ca is the internal converter voltage for phase A given by equation (4.7) and p d dt [83]. Larm Rarm Va Vca pia Ia (4.6) 2 2 V ca Vla Vua (4.7) 2 Each converter arm contains a number of SMs, n. The SM capacitor voltage, V cap, can be described by equation (4.8), assuming that the SM capacitance is sufficiently large enough to neglect ripple voltage and that the capacitor voltages are well balanced. V V n dc cap (4.8) The voltage produced by a converter arm is equal to the number of SMs in the arm which are turned-on, n onua and n onla, multiplied by the SM capacitor voltage as given by equation (4.9) and equation (4.10). Vua nonua Vcap (4.9) Vla nonla Vcap (4.10) Through appropriate control of the SMs the output voltage magnitude and phase can be controlled independently. The number of voltage levels that a MMC can produce at its output is equal to the number of SMs in a single arm plus one. 4.2 MMC Parameters This section determines the value of the key parameters for the MMC through detailed analysis. A typical radial link for the connection of a Round 3 offshore windfarm has a power rating of 1GW at ± 300kV according to National Grid s Offshore Development Information Statement (ODIS) [1, 14]. Therefore the modelled MMC is rated for 1GW at ± 300kV Number of MMC Levels A suitable starting point for designing/modelling an MMC is to determine the appropriate number of converter levels required. The MMC used on the Trans Bay Cable project is a 201 level converter, and therefore each converter arm contains approximately 200 SMs. 94

95 Chapter 4 MMC-HVDC This large number of SMs ensures that the synthesised output voltage is very close to an ideal sinusoid and therefore removes the need for filters. The primary reason that such a large number of SMs per converter arm is required is to reduce the voltage stress across each SM to around 2kV 24, it is entirely possible to use significantly less than 200 SMs per converter arm and still not require AC filters. Each SM contains two IGBTs with anti-parallel diodes and a capacitor. In order to model a single MMC from the Trans Bay Cable project, it would require more than 2400 IGBTs with anti-parallel diodes to be modelled, which would be extremely computationally intensive. Therefore it would be advantageous to be able to represent the MMC with the fewest number of SMs possible. The purpose of this section of the document is to assess the minimum number of voltage levels that a MMC is likely to require to ensure that the AC harmonic content is within acceptable limits so that no AC filters are required. There are several harmonic limit standards in existence. These standards are defined by national and international bodies, as well as transmission and distribution network operators. There is no set of common standards. The standards tend to be specific to a particular network and for a particular system voltage level. Harmonic limits may be defined for voltage waveform distortion, injected current, telephone-weighted voltage distortion and telephone-weighted current. Voltage waveform distortion limits are defined for the very high majority of networks, whereas the injected current limits are less widely used. Telephone-weighted limits are normally only considered when there is long exposure of telephone circuits to power circuits. The IEC and the IEEE 519 harmonic voltage limits are given in Table 4.1 and Table 4.2, respectively, from [30]. The IEC standard does not provide limitations for current injection or telephone-weighted values whereas the IEEE standard does. A custom built voltage step generator was used to produce a very similar waveform to that of an MMC for a given number of voltage levels. This allowed the harmonic content of the waveform to be analysed without modelling the actual converter. The output waveform from the voltage output generator can be analysed, by the fast Fourier transform block in 24 The DC voltage for the Trans Bay Cable project is ±200kV; hence the voltage across each SM is roughly 2kV. 95

96 Chapter 4 MMC-HVDC PSCAD, to determine the magnitude of the individual voltage harmonics as well as the Total Harmonic Distortion (THD) value. Odd harmonics non-multiple of 3 Harmonic order Harmonic voltage (%) Odd harmonics multiple of 3 Harmonic order Harmonic voltage (%) Even harmonics Harmonic order Harmonic voltage (%) Table 4.1: IEC harmonic voltage limits for high voltage systems Bus voltage Individual voltage distortion Total voltage distortion (THD) (%) 161kV Table 4.2: IEEE519 harmonic voltage limits For a 31-level MMC, the THD and the maximum individual harmonic distortion were found to be 1.42% and 0.49% respectively. The simulated waveform complies with the IEEE519 voltage limits; however it does not comply with the IEC standards for individual harmonic distortion. For example, the harmonic distortion for the 33 rd harmonic is 0.43% which exceeds the 0.2% limit. The harmonic content at the Point of Common Coupling (PCC) in a real system is dependent upon many factors which are not taken into consideration in this analysis. Satisfying the IEEE519 harmonic voltage limits is considered sufficient for estimating the number of levels that the converter is likely to require SM Capacitance The choice of the SM capacitance value is the next important parameter, and it is a tradeoff between the SM capacitor ripple voltage and the size of the capacitor. A capacitance value which gives a SM voltage ripple in the range of ±5% is considered to be a good compromise [84]. An analytical approach proposed by Marquardt et al. in [85] can be used to calculate the approximate SM capacitance required to give an acceptable ripple voltage for a given converter rating. This method effectively calculates the value of SM capacitance required for a given ripple voltage by determining the variation in the converter arm energy. This approach assumes that the output voltage and current is sinusoidal, that the DC voltage is 96

97 Chapter 4 MMC-HVDC smooth and split equally between the SMs, and that the converter is symmetrical. Circulating currents, which will be explained in Section 4.2.3, are also assumed to be zero. Only the resultant formula is presented here (4.11). The full derivation is given in Appendix 4A. C SM W (4.11) 2V SM 2 cap where: W SM is the variation of stored energy per SM is the SM capacitance ripple voltage factor 0 1 The SM capacitance value for a ripple voltage of 10% (±5%) was calculated to be 1150µF. The working for this calculation is given in Appendix 4A. This approach, which was proposed by Marquardt et al., is widely used [86, 87], it should however only be used as an approximation, as it is based on the assumptions noted in the introduction of this section. According to [84] 30-40kJ of stored energy per MVA of converter rating is sufficient to give a ripple voltage of 10% (±5%). Using this approximation, the value of SM capacitance was calculated and compared with the value given by equation (4.11). It was found that a value of 40kJ of stored energy per MVA of converter rating gives a similar value of capacitance (1110µF) to the method proposed by Marquardt et al. A SM capacitance value of 1150µF is employed for the MMC Limb Reactance The limb reactors, also known as converter reactors and arm reactors, which are labelled L arm in Figure 4.2, have two functions. The first function is to suppress the circulating currents between the legs of the converter, which exist because the DC voltages generated by each converter leg are not exactly equal. The second function is to reduce the effects of faults both internal and external to the converter. By appropriately dimensioning the limb reactors, the circulating currents can be reduced to low levels and the fault current rate of rise through the converter can be limited to an acceptable value. The circulating current is a negative sequence (a-c-b) current at double the fundamental frequency, which distorts the arm currents and increases converter losses [88]. The value 97

98 Chapter 4 MMC-HVDC of arm reactance required to limit the peak circulating current, I ˆcirc, can be calculated using equation (4.12) [89]. The analysis of circulating currents and the derivation of equation (4.12) is given in Appendix 4B. L arm 1 S 2 8 CSMVcap 3ˆ Icirc V dc (4.12) The second function of the arm reactor is to limit the fault current rate of rise to within acceptable levels. According to [90], the Siemens HVDC Plus MMC convertor reactors limit the fault current to tens of amps per microsecond even for the most critical fault conditions, such as a short-circuit between the DC terminals of the converter. This allows the IGBTs in the MMC to be turned-off at non critical current levels. Assuming that the DC voltage remains relatively constant from fault inception until the IGBTs in the converter are switched-off, the value of arm reactance required to limit the initial fault current rate of rise ( di f dt ) can be described by equation (4.13) L arm Vdc (4.13) 2( di dt) The minimum value of limb reactance permissible is calculated assuming the worst case scenario of 20A/µs for a line-to-line fault. According to equation (4.13), the arm reactor should be no smaller than 15mH. A 15mH limb reactor results in very large circulating currents, which increase converter losses and distort the arm currents. Ideally the circulating current should be zero, however, according to equation (4.12), very large limb reactors, and/or SM capacitors, would be required for this to be achieved. The size of the limb reactor is therefore selected as a compromise between voltage drop across the limb reactor and the cost of the limb reactor, against the magnitude of circulating current. The circulating current can also be suppressed by converter control action or through filter circuits. The model developed in this work includes a Circulating Current Suppressing Controller (CCSC). A 45mH (0.1p.u.) limb reactor used in conjunction with the CCSC was found to offer a good level of performance. f Arm Resistance The SM IGBT s and diode s on-state resistances, R on, are set to the default PSCAD value of 0.01Ω. Only one IGBT or diode in each SM is conducting at any one time, therefore the resistance in each arm due to the SMs is 0.3Ω. A 0.6Ω resistor is further connected in 98

99 Chapter 4 MMC-HVDC series with the SMs in each arm, hence, the converter arm resistance, R arm, is 0.9Ω. This model does not attempt to include converter losses, however, an arm resistance of 0.9Ω represents approximately 0.5% conduction losses for a MMC rated at 1GW 25. The losses of an MMC converter is approximately 1% [28], which takes into account a number of factors including conduction losses, switching losses and off-state losses. 4.3 Onshore AC Network The strength of an AC system is often characterised by its Short-circuit Ratio (SCR), which is defined by equation (4.14), where V n is the network voltage, Z n is the network impedance and P drated is the power rating of the HVDC system. SCR V P Z 2 n n (4.14) drated An AC system with a SCR greater than three is defined as strong [30]. The SCR of the AC system in this model is selected to be relatively strong with an SCR of 3.5. The AC network impedance is highly inductive and consequently the AC system impedance is modelled using an X/R value of 20. The SCR is implemented in PSCAD using an ideal voltage source connected in series with a resistor and an inductor. The values of resistance and inductance are 2.28Ω and 0.145H (0.34p.u.) respectively. The calculation of these values is given in Appendix 4C. The winding configuration of the converter transformer in the model is delta/star, with the delta winding on the converter side of the transformer as is the case for the Trans Bay Cable project [91]. A tap-changer is employed on the star winding of the transformer to assist with voltage regulation. The transformer leakage reactance is set to 0.15p.u. with copper losses of 0.005p.u., which are typical values for a power transformer [92]. The nominal transformer parameters are given in Table 4.3, and a simplified diagram of the onshore system is shown in Figure 4.5. Transformer parameters S (MVA) V Tp (kv) V Ts (kv) L T (H) R T (Ω) Table 4.3: Nominal transformer parameters 25 The arm current is approximately 1kArms when operating at 1GW. 99

100 Chapter 4 MMC-HVDC MMC I abc X T =15% 370kV 410kV PCC Z n SCR=3.5 V n D/Y g V s Figure 4.5: Onshore AC system 4.4 DC system Cable The MMCs are connected by two 165km HVDC cables with a nominal voltage and current rating of 300kV and 1.7kA respectively, as per ODIS [1, 14]. Accurate models of the cables are required in order for the DC link dynamics of the scheme to be represented. The cables are modelled using the Frequency Dependent Phase Model (FDPM) in PSCAD. Chapter 7 of this thesis is dedicated to HVDC cable modelling. The reader is therefore referred to this chapter for further information DC Braking Resistor DC braking resistors are normally required on VSC-HVDC schemes used for the connection of windfarms [93]. There are situations, such as an onshore AC grid fault, which diminish the onshore converter s ability to export the energy from the windfarm. The bulk of this excess energy is stored in the scheme s SM capacitors leading to a rise in the DC link voltage. The DC braking resistor s function is to dissipate this excessive energy and to therefore prevent unacceptable DC link voltages. I dc MMC PCC V dc C I abc eq V n Z n R brak D/Y g Figure 4.6: DC braking resistor The worst case scenario is where the onshore MMC is unable to effectively export any active power. This can occur for severe AC faults such as a solid three-phase to ground fault at the PCC as shown in Figure 4.6. The braking resistor should therefore be rated to dissipate power equal to the windfarm power rating, P wrated. The braking resistor, R brak, is 100

101 Chapter 4 MMC-HVDC turned-on once the DC voltage exceeds a set limit (1.1p.u.) and is then turned-off once the DC voltage has returned to its nominal value (1.0p.u.), V dcnom [93]. These voltage thresholds prevent the braking resistor from interfering under normal operating conditions. In this work, the DC braking resistor is designed to prevent the DC link voltage from exceeding 1.2p.u. and is calculated using equation (4.15). R brak V dcnom 720kV 500 (4.15) P wrated 1000MW The IGBT braking valve would therefore be required to conduct up to 1500A. 4.5 Offshore AC Network A 1GW offshore windfarm would typically contain 200 wind turbines based on a 5MW turbine design. A simplified diagram of a full scale converter wind turbine is shown in Figure 4.7. The DC link voltage varies due to the generated power. The function of the grid side converter is to maintain the DC link voltage and to supply/absorb reactive power if required. The power generated by the wind turbines is transmitted at 33kV to two 500MW AC substations which step-up the voltage to 220kV for transmission to the HVDC link. G 33kV Figure 4.7: Simplified diagram of a full scale converter wind turbine The focus of this work is the HVDC scheme, and therefore a simplified representation of the offshore AC system is employed as shown in Figure 4.8. The voltage sources, V w, which represent the windfarm generators, are controlled using a dq controller to inject active power into the offshore HVDC converter. Further information on this control system is contained in Section

102 Chapter 4 MMC-HVDC MMC X T =15% 33kV 220kV PCC X T =15% 220kV 370kV V w Y g /Y V so Y g /D Figure 4.8: Representation of the offshore network 4.6 Control Systems This section describes the numerous control functions which are required for a MMC- HVDC point-to-point link. The required control system functions are dependent upon whether the MMC is connected to an active AC network or a passive/weak AC network. The internal MMC control system functions are, however, independent of the connected AC network Control Systems for an MMC Connected to an Active Network For a VSC-HVDC scheme which connects two active networks, one converter controls active power or frequency and the other converter controls the DC link voltage. The converters at each end of the link are capable of controlling reactive power or the AC voltage at the PCC. For VSC-HVDC links which are employed for the connection of offshore windfarms, the converter connected to the onshore AC grid controls the DC link voltage and the reactive power or AC voltage. This section describes the control structure, tuning process and implementation of the aforementioned control functions. Active power, frequency and DC link voltage are effectively controlled by varying the angle of the MMC output voltage with respect to the voltage angle of the connected AC network. The reactive power and AC voltage are effectively controlled by varying the magnitude of the MMC output voltage with respect to that of the AC network. The MMC output voltage magnitude and angle can be controlled either directly using direct control, or indirectly using dq current control. Dq control is employed for the MMC in this work because it can limit the valve currents under balanced operating conditions and provide a faster response than direct control. Figure 4.9 shows the basic control structure for an MMC connected to an active network. 102

103 Chapter 4 MMC-HVDC P*/V* dc /freq* Q*/V* ac Outer controller I* dq dq current V* dq controller Inner MMC control FS MMC V Figure 4.9: MMC control system basic overview The current controller is a fast feedback controller, which produces a voltage reference for the MMC based upon the current set-point from the outer feedback controller. The inner MMC control system, amongst other functions, translates the voltage set-points using a Nearest Level Controller (NLC) into Firing Signals (FS) to the MMC to obtain the desired output voltage magnitude and phase dq Current Controller The impedance between the internal converter voltage, V ca, and the AC system voltage, V sa, for phase A is shown in Figure The phase shift and change in voltage magnitude introduced by the converter transformer, is accounted for in the implementation of the controller as shown in Figure 4.22, and it is therefore not discussed in this analysis. I a L arm /2 R arm /2 L T R T Z n V n V ca V a V sa Figure 4.10: MMC phase A connection to AC system Equation (4.16) describes the relationship between the internal converter voltage and the AC system voltage for phase A. Larm dia Rarm V V L R I 2 dt 2 ca sa T T a (4.16) Equation (4.16) can be reduced to (4.17). where: di (4.17) dt a Vcsa L RIa Larm Rarm Vcsa Vca Vsa L LT R RT (4.18) 2 2 For the three-phases: 103

104 Chapter 4 MMC-HVDC Vcsa Ia V R pl I csb b V csc I c (4.19) In the dq synchronous reference frame equation (4.19) becomes equation (4.20). The derivation from equation (4.19) to equation (4.20) is given in Appendix 4D. Vd Id Id 0 1 Id R Lp L V q I q I q 1 0 I q (4.20) Where is the matrix representation of the imaginary unit j. Expanding equation (4.20) and noting that Vd Vcd Vsd and Vq Vcq Vsq, equations (4.21) and (4.22) are produced. V V RI LpI LI (4.21) cd sd d d q V V RI LpI LI (4.22) cq sq q q d The equivalent circuit diagrams for the plant in the dq reference frame are given in Figure I d L R ωli q I q L R ω LI d V cd V sd V cq V sq Figure 4.11: Equivalent dq circuit diagrams Applying the Laplace transform with zero initial conditions to equations (4.21) and (4.22) gives equations (4.23) and (4.24). V ( s) V ( s) RI ( s) LsI ( s) LI ( s) (4.23) cd sd d d q V ( s) V ( s) RI ( s) LsI ( s) LI ( s) (4.24) cq sq q q d The plant equations in the Laplace domain can be represented by state-block diagrams, with the (s) notation neglected, as shown in Figure

105 Chapter 4 MMC-HVDC V sd V cd I d V cq I q L s - - L s R ωl ωl V sq R Figure 4.12: State-block diagram for system plant in dq reference frame The state-block diagram in Figure 4.12 clearly shows that there is cross-coupling between the d and q components. The effect of the cross-coupling can be reduced by introducing feedback nulling, which effectively decouples the d and q components as shown in Figure V sd V cd I d V cq I q L s - - L s R ωl ωl V sq R ωl ωl Figure 4.13: State-block diagram with feedback nulling The d and q currents are controlled using a feedback PI controller as shown in Figure The d and q components of the system voltage (V sd and V sq ) act as a disturbance to the controller. The effect of this disturbance is mitigated through the use of feed-forward nulling, highlighted in Figure The MMC is represented as a unity gain block (i.e. V cd *=V cd ), which is representative of its operation providing that the converter has a high level of accuracy with a significantly higher bandwidth than the current controller. The d- axis current control loop in Figure 4.14 can be simplified to Figure 4.15, due to the cancellation of the disturbance term. This is equally applicable to the q-axis. Id * V sd Id + V cd* + PI + - MMC =1 V sd V cd L 1 s I d R Iq * V sq Iq + V cq* + PI + - MMC =1 V sq V cq L 1 s I q R Figure 4.14: Decoupled d and q current control loops 105

106 Chapter 4 MMC-HVDC Id * + - Id PI V cd* MMC =1 V cd L 1 s I d R Figure 4.15: d-axis current loop without d-axis system voltage disturbance Using Mason s rule the plant representation is simplified to a single block as shown in Figure Id * + - Id K p K s i V cd* MMC =1 V cd 1 Ls R I d Figure 4.16: Simplified d-axis current control loop The transfer function for the control loop can be calculated as follows [94]: 1 1 Ki K ps I d s Ls R I * 1 1 d 1 Ki K ps 1 s Ls R K I s Ls R d Id * Ki K ps 1 s Ls R i K s p (4.25) (4.26) Id Id * s 2 K i K s L R K L p p Ki s L (4.27) Approximating the current loop transfer function to a classic 2 nd order transfer function allows the PI controller to be tuned to give an approximate damping ratio,, and natural frequency, n.the current loop transfer function, equation (4.27), can be reduced to a classic 2 nd order transfer function, equation (4.28), by neglecting the fast transient information, as given in equation (4.29). s 2 n 2 2 2n sn (4.28) 106

107 Chapter 4 MMC-HVDC Id Id * s 2 Ki L R K L p Ki s L (4.29) The natural frequency and damping ratio of the 2 nd calculated using equation (4.30) and equation (4.31) respectively. order system can therefore be K L i n (4.30) R KP (4.31) 2 L n The natural frequency of the system is approximate to its bandwidth for a damping ratio of 0.7. Alternatively, the closed loop transfer function can be reduced to a first order transfer function which allows the PI controller to be tuned for a specific bandwidth, BW, with a critically damped response [94, 95]. Equation (4.25) can be reduced to a first order transfer function as follows: K p K i 1 s s K R p L s I d L Id * K p K i 1 1 s s K R p L s L (4.32) By selecting K K i p R L equation (4.32) is reduced to equation (4.33) K p I K d p 1 sl Id * Kp sl K L p 1 s 1 sl K p (4.33) The full closed loop transfer function is therefore reduced to a first order transfer function with a time constant ic LKp. The bandwidth in radians for a first order system is equal to 1 ic. Hence equation (4.33) can be re-written as equation (4.34), where BW ic is the inner controller bandwidth. G CL 1 s 1 BW ic (4.34) 107

108 Chapter 4 MMC-HVDC The proportional gain, K, and integral gain, K i, can be calculated for given values of L, R p and BW from equations (4.35) and (4.36) respectively. K BW L (4.35) p ic R Ki K p BWic R (4.36) L The advantage of this method is that the exact bandwidth for the control loop can be selected through a very simple tuning process. Also a phase margin of 90 with an infinite gain margin is assured. The disadvantage is that since only the bandwidth can be selected, there is less flexibility when optimising the controller to meet set performance criteria. The performance criteria for the inner current loop are that it is fast, stable and has no overshoot. Tuning the PI controller to provide sufficient bandwidth using the first order transfer function is therefore a suitable approach. A bandwidth of 320Hz is employed for the inner current loop. This bandwidth provides a very fast response with zero overshoot as shown in Figure 4.19-Figure To verify the first order transfer function, a three-phase 31-level MMC with dq current controller has been implemented in PSCAD. The expected d-axis current response for a step input using the first order transfer function, I dtf, with the response from the PSCAD model, I d, for different bandwidths are shown in Figure 4.17-Figure The step change in d-axis current, I dset (I * d ), is equivalent to a change in active power of 100MW. Figure 4.17: Current controller step response for a bandwidth of 80Hz ; x axis time(s), y axis-current (ka) 108

109 Chapter 4 MMC-HVDC Figure 4.18: Current controller step response for a bandwidth of 160Hz ; x axis time(s), y axiscurrent (ka) Figure 4.19: Current controller step response for a bandwidth of 320Hz ; x axis time(s), y axiscurrent (ka) The plots show that the simulated response is similar to the expected response for the three different bandwidths. These results demonstrate that the first order transfer function can adequately describe the system behaviour. The small differences in the results are due to assumptions and simplifications in the derivation of the transfer function. The results show in general that the simulated current response is slower than expected, particularly for higher bandwidths. This is because significant step changes in power can easily force the MMC to enter the non-linear over-modulated region, which is not accounted for by the transfer function. Increasing the converter transformer tap-changer ratio so that the converter does not become over-modulated improves the simulated response as shown Figure

110 Chapter 4 MMC-HVDC Figure 4.20: Current controller step response for a bandwidth of 320Hz with tap-changer ratio increased ; x axis time(s), y axis-current (ka) The simulation results also show that the decoupling between the d and q-axis currents improves as the bandwidth increases. This is likely to be because the control loop s disturbance rejection improves as the bandwidth increases. Mathematically the d and q-axis should be completely decoupled due to the feedback nulling terms ( Id and Iq ). The derivation of the transfer function assumes that the converter and associated components such as the abc/dq transform components are perfect and can therefore be represented as unity gain blocks. The MMC implemented in PSCAD, however, is not capable of perfectly reproducing the set-point d and q-axis voltages with zero time delay. The q-axis current peaks approximately 20ms (one fundamental cycle) after the step input is applied, irrespective of controller bandwidth. The NLC employed by the MMC assumes that the SM capacitor voltages are constant and equal, which is only true when there is no current flowing through the converter arm or when the SM capacitance is infinite. During normal operation, for finite capacitance, the SM capacitors exhibit a fundamental ripple voltage. Employing very large SM capacitors ensures that the all SM capacitors are virtually constant and equal which improves the accuracy of the NLC method. Figure 4.21 shows the converter response when the value of the SM capacitors is increased from 1150µF to µF. 110

111 Chapter 4 MMC-HVDC Figure 4.21: Current controller step response for a bandwidth of 320Hz with increased SM capacitance ; x axis time(s), y axis-current (ka) Figure 4.21 shows that the decoupling has greatly improved, however, employing such large capacitors is impractical and was only implemented to show that the transfer function is able to describe the system behaviour very accurately when all assumptions are considered. That said, the transfer function describes the system behaviour with sufficient accuracy even when ideal converter behaviour is assumed. The block diagram for the implementation of the current controller is shown in Figure The phase voltages and currents, measured at the PCC are scaled, and the output converter voltage set-points are advanced 30 to compensate for the transformer. The d- axis and q-axis current orders from the outer controller have limits to prevent valve overcurrents under balanced conditions. V c(abc) I (abc) L R Transformer winding ratio V s(abc) N p /N s I d * PCC abc dq t V sq PLL V sd I d + V cd * + PI Transformer phase shift I s ( abc ) t I d ωl N abc s /N p dq +30 I q ωl * I q - Iq + + PI + + V cq * dq abc t V * c ( abc ) V sq Figure 4.22: dq current controller implementation 111

112 Chapter 4 MMC-HVDC Outer Controllers Active and Reactive Power Controllers In the magnitude invariant dq synchronous reference frame, the power flow at the PCC can be described by equations (4.37) to (4.39). 3 3 Sdq Vdq Idq* ( Vsd jvsq )( Id jiq ) (4.37) P Vsd Id VsqI q (4.38) 2 3 Q Vsq Id Vsd Iq (4.39) 2 The q-axis is aligned with V a such that Vsq 0. Equations (4.38) and (4.39) are therefore reduced to equations (4.40) and (4.41). 3 P V I (4.40) 2 sd d 3 Q V I (4.41) 2 sd q Equations (4.40) and (4.41) show that the active power is controlled by I d and the reactive power is controlled by I q. The I d and I q references to the current controller are set using feedback PI controllers. The K p and K i values for the controllers can be calculated according to equations (4.42) and (4.43), where BW p is the bandwidth of the power controller. The derivation of the reduced first order transfer function and the resultant equations for K p and K i is given in Appendix 4E. K p BWp (4.42) 1.5V BW sd ic K BW K (4.43) i ic p V sd is the value of d-axis voltage at the PCC, which has a nominal value in this model of 300kV. Providing that the AC system is relatively strong this value is effectively fixed, and therefore the PI controller parameters can be calculated based on the nominal value for V sd. In any case, a variation in V sd produces a proportional change in the power controller bandwidth; hence a relatively large variation in V sd of 10% produces only a 10% change in BW p. Note that the relationship Ki K p 1 ic is ensured irrespective of V sd. Feedback PI 112

113 Chapter 4 MMC-HVDC controllers are employed to give the I d and I q set-points to the inner current controllers based on the active and reactive power orders respectively. The active and reactive power demands for a VSC-HVDC converter are typically ramped at 1GW/min under normal operating conditions and at 1GW/s for emergency power control 26. The outer power loop does not therefore require a large bandwidth and hence a bandwidth of 30Hz is more than sufficient. The transfer function response and the simulated response for a 100MW (10%) and -30MVAr ( 10%) step change are very similar as shown in Figure 4.23 and Figure 4.24 respectively. Figure 4.23: System response for a 10% change in active power ; x axis time(s), y axis-active power (MW) Figure 4.24: System response for a 10% change in reactive power ; x axis time(s), y axis-reactive power (MVAr) DC Link Voltage Controller MMCs, unlike two-level VSCs, do not normally employ DC side capacitor banks and therefore the MMC s equivalent capacitance, C eq, as calculated by equation (4.44), is used 26 Based on discussions with an HVDC controls expert from Alstom Grid. 113

114 Chapter 4 MMC-HVDC in the DC side plant model shown in Figure The plant equations and the derivation of the 2 nd order transfer function are given in Appendix 4F. V dc MMC I n I dc I PCC c L R C eq V s(abc) V n Figure 4.25: DC side plant The K i and K p values for a particular natural frequency and damping ratio can be calculated using equation (4.45) and equation (4.46). C eq 3C SM (4.44) n 2 n Ceq Ki (4.45) 1.5K V K p 2nCeq (4.46) 1.5K The primary function of the DC link voltage controller is to keep the DC link voltage constant. The DC link voltage set-point is normally fixed at 1.0p.u. and therefore unlike power controllers, following set-point variations is not a priority. Hence, the key performance criteria for the DC voltage outer controller are that it is stable, with excellent steady-state tracking and good disturbance rejection for a range of operating points (K v =0.5±10%). The outer DC link voltage loop is tuned assuming that the inner current loop is a unity gain block. This is a valid assumption providing that the outer loop is significantly slower than the inner current loop. The maximum available bandwidth for the outer controller is therefore limited to one order of magnitude smaller ( 30Hz) than the inner current loop bandwidth (=320Hz). The controller s ability to reject disturbances, particularly low frequency disturbances, improves with bandwidth due to the increase in integral gain. Tuning the outer loop controller for a bandwidth of 20Hz and a damping ratio of 0.7, using equations (4.45) and (4.46) was found to offer a good level of performance. Figure 4.26 shows the systems response, V dc, the full transfer function response, V dctf, and the 114 V

115 Chapter 4 MMC-HVDC approximate transfer function response, V dctf2nd, for a 1kV step change about the nominal operating point. This figure shows that the system response is similar to the expected response, particularly the full transfer function. Figure 4.27 shows the system response for an injected noise current ramped from 0 to 1.66kA in one second, which is equivalent to 0 to 1GW under emergency power conditions. Figure 4.26: System response for a 1kV step change about the operating point, K v =0.5 ; x axis time(s), y axis-voltage(kv) Figure 4.27: System response for a ramped injected noise current of 1.6kA in 1 second ; x axis time(s), y axis-voltage (kv) AC Voltage Control With reference to Figure 4.28, the magnitude of the voltage at the PCC is given by equation (4.47). The derivation of this equation is provided in Appendix 4G. X 1 PCC X 2 I a V na V ca V sa Figure 4.28: MMC phase A connection to the AC network with the system resistances neglected 115

116 Chapter 4 MMC-HVDC (1 ) cos( ) sin( ) 2 2 V V k V k V k (4.47) sa na ca c ca c where: The network voltage, V na X 2 k (4.48) X, and the system reactance values, X 1 and X 2, are fixed and therefore the voltage at the PCC, V sa, can be controlled by varying the internal converter voltage magnitude, V ca, and angle, c. Variations in the converter angle have very little influence on the voltage at the PCC and therefore the dominant variable in equation (4.47) is the converter voltage magnitude. In the magnitude invariant dq reference frame the magnitude of the converter voltage can be described by equation (4.49). The voltage at the PCC is controlled using the q-axis converter voltage, V cq. 2 2 c( abc) cd cq V V V (4.49) For HVDC systems connected to weak AC grids, the AC voltage controller is required to ensure that the AC system voltage does not fall outside permissible limits for the full operating range of active power. Figure 4.29 shows the AC system voltage for the MMC connected to a weak AC network (SCR=1.5) for an active power order of 1GW and a reactive power order of 0MVAr. The AC system voltage, Vsa, falls to approximately 70% of its nominal value and the MMC is only able to export 800MW due to the valve current limit. With the AC voltage controller engaged, the AC voltage remains with ±2% of the nominal value and the converter is able to export the maximum active power order, as shown in Figure

117 Chapter 4 MMC-HVDC Figure 4.29: System response for weak AC network with reactive power set to zero ; x axis time(s) Figure 4.30: System response for weak AC network with AC voltage control ; x axis time(s) Tap-Changer Controller The onshore converter transformer typically includes an on-load tap-changer to assist with voltage regulation at the PCC. For a MMC operating in reactive power control, the transformer tap ratio can be manipulated to help prevent the converter from becoming over or under-modulated. Operating the converter in the over or under-modulated region could have a negative impact in a number of areas such as harmonic performance. In this model a slow PI controller is employed to set the tap ratio of the transformer to reduce the magnitude of over and under-modulation. Figure 4.31 and Figure 4.32 show that the tapchanger reduces the THD of the MMC output voltage. 117

118 Chapter 4 MMC-HVDC Figure 4.31: MMC output voltage THD when exporting 300MVAr with no tap-changer ; x axis time(s), y axis THD (%) Figure 4.32: MMC output voltage THD when exporting 300MVAr with tap-changer ; x axis time(s), y axis THD (%) Control System for MMC Connected to a Windfarm In situations where the MMC is connected to an islanded or very weak network the MMC s function is to regulate the AC network s voltage and frequency [80]. In this mode of operation, the MMC absorbs all of the power generated by the offshore windfarm. The voltage magnitude at the PCC to the offshore network is equal to the d-axis voltage, V sod, providing that the q-axis voltage, V soq, is equal to 0. The voltage magnitude is therefore regulated using PI controllers for the d and q-axis voltages. The voltage controlled oscillator provides the reference angle from the ordered frequency. The implementation of the controller is shown in Figure

119 Chapter 4 MMC-HVDC PCC MMC V so(abc) f R L VCO Θ V c(abc) I abc V dc N p /N s V sod * + - PI V c(abc) * abc dq 0 V sod V soq + - PI +30 dq abc Figure 4.33: Implementation of the AC voltage controller for the offshore network Inner MMC Controllers Circulating Current Suppressing Control (CCSC) The circulating currents distort the arm currents, which can increase converter losses and may result in the requirement for higher rated components. The CCSC suppresses the circulating current by controlling the voltage across the limb reactors. The development of this controller is based on work carried out in [82, 88]. With reference to Figure 4.34, the plant equations for the CCSC can be derived as follows. I dc V ua (t) I ua (t)=i g +I a (t)/2 V dc /2 V u-g (t) L arm R arm L a R a R arm V a (t) I a (t) V sa (t) V dc /2 V la (t) L arm V l-g (t) I la (t)=i g -I a (t)/2 Figure 4.34: Equivalent circuit for a single phase of a MMC V V I ( R Lp) I ( R Lp) V (4.50) dc ua ua la la The voltage drop across the upper and lower arm impedances, due to the I a /2 current components in the upper and lower arm cancel each other out according to equation (4.50). 119

120 Chapter 4 MMC-HVDC Iua and I la can be replaced with Idiff I g I where circ I I 3. Equation (4.50) can, therefore, be reduced to equation (4.51). V V V 2 I ( R L p) (4.51) dc ua la diff arm arm Vdc Vua Vla Idiff ( Rarm Larm p) (4.52) 2 2 The right hand side of equation (4.52) is known as the difference voltage, V diff g dc, which is the voltage drop across one converter arm due to the difference current. If the circulating current is zero then the difference voltage is essentially very small as it is the voltage drop across the arm resistance due to the arm DC current, I g. The presence of circulating current increases the difference voltage, hence by reducing the difference voltage, the circulating current can be suppressed. The difference voltage can be controlled by varying the upper and lower arm voltages equally. This does not affect the AC output voltage as described by equation (4.5) which is repeated here in equation (4.53). Vla Vua Larm dia Rarm Va Ia (4.53) 2 2 dt 2 The circulating current is a negative sequence (a-c-b) current at double the fundamental frequency. The plant equation in matrix form is given in equation (4.54). Vdiff a Idiff a Idiff a Vdiff c R Idiff c Lp Idiff c V I I diff b diff b diff b (4.54) Applying the acb to dq transform to equation (4.54) gives equation (4.55). The procedure for going from equation (4.54) to equation (4.55) is very similar to that of the current controller outlined in Section V I I 0 1 I diff d R circd circ d 2 circ d arm Larm p Larm V diff q I circq I circq 1 0 I circq (4.55) The Idiff component in equation (4.54) has changed to I circ in equation (4.55), because the DC component of Idiff is a zero sequence component which has no effect on the dq values. The dq components are therefore only affected by the circulating current. The state-block diagram with feedback decoupling is given in Figure

121 Chapter 4 MMC-HVDC 2ωL arm V diff-d 1 1 I circ-d V diff-q s - - L arm 1 L arm 1 s I circ-q R arm 2ωL arm R arm 2ωL arm 2ωL arm Figure 4.35: CCSC plant state-block diagram The CCSC can be represented by a first order transfer function in the same manner as the current controller in Section Equations (4.56) and (4.57) can therefore be used to calculate the PI controller parameters: K BW L (4.56) p arm R K K BW R (4.57) arm i p arm Larm The set-point for the CCSC is always zero in order to reduce the circulating current to the smallest possible value. The circulating current increases as a function of power, which as discussed in Section is controlled using a ramped set-point. The circulating current therefore also changes in a ramped manner. If however, the CCSC is enabled at a particular power order then the input to the PI controller, I circ, is a step input. The performance of the CCSC is mainly assessed by its ability to suppress the circulating current under steadystate and transient conditions. The bandwidth of the controller has little effect on the circulating current under steadystate conditions. A small controller bandwidth such as 10Hz is therefore suitable, Figure However, higher bandwidths provide better performance during transient conditions. A bandwidth of approximately 30Hz was found to give a good level of performance as shown in Figure The implementation of the controller is shown in Figure

122 Chapter 4 MMC-HVDC Figure 4.36: CCSC response to active power ramped at 1GW/s for 1s starting at 2s with a BW of 10Hz ; x axis time(s) Figure 4.37: CCSC response to active power ramped at 1GW/s for 1s starting at 2s with a BW of 30Hz ; x axis time(s) I diff ( abc ) acb dq I * 0 circd Icircd + PI Icircd Icircq 2Larm 2Larm I * 0 circq - + 2t + PI + Icircq dq acb 2t V * diff ( abc ) Figure 4.38: Block diagram of CCSC implementation MMC Driver The MMC driver is a single component, built for this research in PSCAD, which determines the correct number of SMs to fire to produce the voltage reference for each arm, and which SMs to fire to ensure that the capacitor voltages are balanced. This has been implemented in FORTRAN. To aid understanding, each function is represented by a 122

123 Chapter 4 MMC-HVDC separate component, although in reality both functions are performed by a single component. The Capacitor Balancing Controller (CBC) ensures that the energy variation in each converter arm is shared equally between the SMs within that arm. Without such a control system the SM capacitors would exceed their tolerable voltage limits, which amongst other things, would damage the SM IGBTs. The CBC is based on the method outlined by Marquardt et al. in [85]. The CBC samples the SM capacitor voltages and then sorts them into ascending or descending order based on the direction of the arm current. If the arm current is positive then the SMs with the lowest capacitor voltages are placed first. Conversely, if the arm current is negative then the CBC orders the SMs with the highest capacitor voltage first. This ensures that for positive arm current the capacitors with the lowest voltages are charged first and for negative arm current the capacitors with the highest voltages are discharged first. The CBC used here employs the bubble sort algorithm to order the capacitor voltages [96, 97]. The bubble sort algorithm is simple to implement, but is relatively inefficient for sorting large lists in comparison to other sorting algorithms. However, the algorithm is sufficient for this application because the list is relatively small. The custom built CBC component is coded so that the user can select the number of times the SM capacitor voltages are sorted per cycle. The sorting frequency is a trade-off between how well the SM capacitor voltages are balanced, against the effective switching frequency of the SMs, and the additional effort of sampling and sorting the SMs. A common method is to sort the capacitor voltages each time the converter output voltage transitions from one level to another. Employing this method for a 31-level MMC would result in an approximate sorting frequency of 3kHz. A sorting frequency of 3kHz provides excellent capacitor voltage balancing but at the expense of a high SM switching frequency. A default sorting frequency of 1.5kHz was therefore chosen as it was found to offer good performance without excessive switching. A simplified diagram of the CBC is shown in Figure 4.39, where V capua and V uao, are the SM capacitor voltages and their order in terms of voltage, for the upper arm of phase A, respectively. 123

124 Chapter 4 MMC-HVDC I ua Vcapua(1-30) V capla(1-30) I la If (Trig=1) then If (I ua >0) then Order V capua(1-30) lowest first Else order V capua(1-30) highest first End If If (I la >0) then Order V capla(1-30) lowest first Else order V capla(1-30) highest first End If End if V uao(1-30) V lao(1-30) Trig Figure 4.39: Simplified diagram of the capacitor balancing controller A number of modulation methods have been proposed for MMCs. These include, but are not limited to, space vector modulation [98], phase-disposition modulation [99], selective harmonic elimination [100] and Nearest Level Control (NLC) [101]. The NLC method produces waveforms with an acceptable harmonic content with a suitable number of levels, and it is the least computationally complex method of the aforementioned techniques. The controller block diagram for the NLC is shown in Figure The NLC reads in the reference voltage for the upper and lower arm of each phase (phase A is shown as an example). Using the DC voltage measurement, it calculates the average SM capacitor voltage and then calculates the Exact Number of SM Levels (ENL) required in the circuit to obtain the reference voltage. Due to the finite number of SMs (30 in this case) the ENL is however rounded to the Nearest Level (NL). The NLC then issues Firing Signals (FS) to the correct SMs using the ordering information from the CBC. The NLC is coded so that the SM FS can only update when a new NL is required. A simplified block diagram of the NLC is shown in Figure V dc /2 + V V ca - ua * - V ca V diffa - V la * + + NLC V cap =V dc /n ENLU=V ua /V c NLU=round(ENLU) ENLL=V la /V c NLL=round(ENLL) FSU=NLU FSL=NLL FSU (1-30) FSL (1-30) V dc /2 V uoa(1-30) V lao(1-30) Figure 4.40: NLC block diagram 124

125 Chapter 4 MMC-HVDC 4.7 Windfarm Control A simplified diagram for the offshore windfarm control system is shown in Figure 4.41 and Figure P w * Q w * 1 1 s w d/dt Power controller I dq * dq current V w(dq) * controller Figure 4.41: Block diagram for the windfarm power controller PCC V w L t V so(abc) P,Q abc dq V w(dq) * Θ PLL Figure 4.42: Implementation of the windfarm power controller The wind turbine, generator and back-to-back converter are represented as a first order transfer function with a time constant, w. The natural time constants, o, for three commercial wind turbines have been calculated in [102] and are presented in Table 4.4. P rated (MW) rated (m/s) τ o (s) Table 4.4: Calculated time constants for commercial wind turbines modified from [102] Extrapolating the data given in Table 4.4 for a 5MW wind turbine gives a natural time constant of approximately 30s. Small signal analysis carried out in [102] has shown that the actual wind turbine time constant,, varies with wind speed, v, and can be described by equation (4.58). v v rated o (4.58) The maximum cut out speed for a large commercial wind turbine is typical 25 m/s with a rated wind speed of m/s [103, 104]; hence the smallest time constant for a typical 5MW wind turbine is approximately 15s. Setting the windfarm first order transfer function 125

126 Chapter 4 MMC-HVDC time constant, w, to 15s would require very lengthy simulation times and therefore it is reduced to 0.15s which is suitable for this model. The windfarm reactive power order to the power controller is limited to a rate of change of 1MVAr/ms. The structure of the power controller and the current controller employed for the windfarm are effectively the same as for the MMC and are therefore not repeated here. The power controller and current controller are tuned using the first order transfer function to give a bandwidth of 10Hz and 100Hz receptively. The power controller time constant is therefore approximately one order of magnitude smaller than the reduced windfarm time constant. The parameters for the controller are given in Appendix 4H. 4.8 Conclusion This chapter has described the modelling process for a MMC-HVDC link for a typical Round 3 offshore windfarm, including the analysis to determine the value of key parameters of the MMC and associated AC and DC networks, as well as the tuning and implementation of the numerous required control functions. Its key contribution is that the main aspects of MMC-HVDC modelling have been brought together and described in a comprehensive and integrated manner. 126

127 Chapter 5 MMC-HVDC Link Performance 5 MMC-HVDC Link Performance This chapter assesses the steady-state and transient performance of the MMC-HVDC link models developed in Chapter 4 for the connection of a typical Round 3 windfarm, and for the interconnection of two active AC networks. The theory given in Chapter 4 is used to verify the simulation results. Considering that MMC VSC-HVDC systems are set to become a key component of the UK s power system, their ability to ride-through AC system faults is of great importance. Publications in this area are however very sparse [105]. This chapter investigates the systems ability to comply with the GB grid code for AC disturbances and reactive power requirements. A modification to the standard DC voltage controller, to improve the systems AC fault recovery response for different power operating points, is also proposed in this work. The models response to DC faults is investigated and the differences between a MMC- HVDC link employed for the connection of a windfarm and a MMC-HVDC link employed for the interconnection of two active networks are investigated. 5.1 Radial MMC-HVDC Link for a Round 3 Windfarm The simplified system diagram for a MMC VSC-HVDC link for a typical Round 3 offshore windfarm is shown in Figure MW Windfarm X PCC2 T=15% 220kV 370kV I s2(abc) V s2(abc) Y g/d MMC2-Offshore I dc2 I dc1 165km DC cable V dc2=600kv R brak MMC1-Onshore X T=15% 370kV 410kV D/Y g PCC1 I s1(abc) V s1(abc) SCR=3.5 V n Z n 400kV Active and reactive power control AC voltage magnitude and frequency control L arm=45mh C SM=1150μF DC link voltage control and AC voltage magnitude control Figure 5.1: MMC VSC-HVDC link for a Round 3 windfarm Start-up The onshore converter s SM capacitors are energised from the onshore AC system as shown in Figure 5.2. The converter is initially in the blocked state, which effectively forms a six-pulse bridge enabling each arm of the converter to charge-up to a value equal to the rectified DC voltage. During this initial charging phase, resistors are inserted between the AC system and the converter to prevent excessive in-rush current [6]. In this model, the 127

128 Chapter 5 MMC-HVDC Link Performance rectified DC voltage is not equal to the nominal DC voltage (600kV), and therefore at 0.3s, the converter is operated in DC voltage control to obtain the nominal DC voltage. During the entire charging process the offshore converter s circuit breakers are open and the SM capacitors are charged from the DC voltage created by the onshore converter. Once the charging process is complete the offshore AC circuit breakers are closed. Vd*=600kV Figure 5.2: Start-up procedure; capacitor voltages are for the upper arm of phase A for MMC1 ; x axis time(s) Windfarm Power Variations To assess the link s ability to respond to power demands, the windfarm is ordered to inject 1GW of active power at 1s; the order is then reduced to 500MW at approximately 3.1s and again increased to 750MW at approximately 4s. The onshore converter is initially set to supply 330MVAr to the onshore grid and then set to absorb 330MVAr at approximately 2.1s while operating at maximum active power. Figure 5.3 shows that the VSC-HVDC link is capable of responding to the power demands of the windfarm and that the converter is able to meet the required reactive power demands set out in the GB grid code (leading and lagging power factor of 0.95) [106, 107]. The link s steady-state response for the windfarm operating at maximum power is shown in Figure 5.4. The phase voltages and phase currents at the PCC for the onshore network (V s1(abc), I s1(abc) ) and the offshore network (V s2(abc), I s2(abc) ) are shown to be almost sinusoidal and as such have a small harmonic content. The DC voltages are smooth and 128

129 Chapter 5 MMC-HVDC Link Performance virtually ripple free, while the DC current exhibits a small ripple of approximately ±1.5% of the nominal value. The DC current ripple can be reduced further by disabling the CCSC, however, this would increase converter losses. The THD of the line-to-line voltages at the onshore PCC is shown in Figure 5.5. This analysis confirms that the harmonic content is very small and is within the 1.5% limit set out in the IEEE519 standards. P*=500MW P*=750MW Q*=-330MVAr Figure 5.3: Link response to variations in windfarm power ; x axis time(s) 129

130 Chapter 5 MMC-HVDC Link Performance Figure 5.4: Link response at steady-state for P w =1GW ; x axis time(s) Figure 5.5: THD for the line-to-line voltages at PCC1 for P w = 1GW ; x axis time(s) MMC The output phase voltages (V 1(abc) ), arm currents (I u(abc), I l(abc) ) and difference currents (I diff(abc) ) for the onshore converter operating at 1GW are shown in Figure 5.6. The staircase voltage waveform produced by the MMC is more evident than the voltages measured at the PCC. The CCSC is able to suppress the circulating current to very small values as is evident in the bottom graph of Figure 5.6 since there is virtually no AC component. The absence of the circulating current component in the arm current ensures that there is little 130

131 Chapter 5 MMC-HVDC Link Performance distortion and that losses are minimised. The effect of the CCSC on the waveforms can be seen by comparing Figure 5.6 with Figure 5.7. Figure 5.6: Phase voltages, arm currents and difference currents for onshore MMC with P w =1GW ; x axis time(s) Figure 5.7: Phase voltages, arm currents and difference currents for onshore MMC with P w =1GW and CCSC disabled ; x axis time(s) The effect of the CCSC on the converter losses can be assessed by measuring the rms value of the arm current. Comparing Figure 5.8 with Figure 5.9 shows that disabling the CCSC 131

132 Chapter 5 MMC-HVDC Link Performance increases the arm current by approximately 25%, indicating a significant increase in the converter losses [108]. This increase in arm current may also require the valve components to be designed for a higher current rating. Figure 5.8: Rms value of the upper arm current for phase A with P w =1GW and CCSC enabled ; x axis time(s) Figure 5.9: Rms value of the upper arm current for phase A with P w =1GW and CCSC disabled ; x axis time(s) If the phase voltages in Figure 5.6 and Figure 5.7 are compared closely, particularly at the peak of the waveform, it is noticeable that they are slightly different. This is because circulating current increases the SM capacitor ripple voltage which increases the distortion of the phase voltages. This can be shown by comparing Figure 5.5 and Figure Figure 5.10: THD for the line-to-line voltages at PCC1 for P w = 1GW and CCSC disabled ; x axis time(s) In Section 4.2.2, the SM capacitance was calculated to give a ±5% ripple voltage. Figure 5.11 shows that this calculation is accurate. Disabling the CCSC increases the ripple 132

133 Chapter 5 MMC-HVDC Link Performance voltage to approximately ±10% as shown in Figure 5.12, which again indicates the benefit of the CCSC. Figure 5.11: SM capacitor ripple voltages for the upper arm of phase A with P w =1GW ; x axis time(s) Figure 5.12: SM capacitor ripple voltages for the upper arm of phase A with P w =1GW and CCSC disabled ; x axis time(s) Onshore AC Fault Ride-through VSC-HVDC links must be able to ride-through faults and disturbances on the AC network. The exact requirements for the link will be dependent upon the grid code. The fault ridethrough criteria to meet the GB grid code is given in Section CC of [106]. The general criterion for HVDC systems is broadly the same as a power park module, however there are some difference for faults in excess of 140ms. The active power recovery response of the HVDC system for faults in excess of 140ms but less than 800ms is determined through study work by the developer and the results are submitted to National Grid. The key criteria for a power park module, for onshore AC short-circuit faults lasting up to 140ms and Supergrid voltage dips greater than 140ms is summarised below: 1. The system must not be tripped for a close-up solid three-phase short-circuit fault or any unbalanced short-circuit fault on the onshore transmission system for a total fault clearance time of 140ms. It should be noted that the Supergrid voltage may take longer than the 140ms clearance time to recover to 90% of its nominal value. 133

134 Chapter 5 MMC-HVDC Link Performance 2. It must deliver 90% of the pre-fault active power within 0.5s of the Supergrid voltage returning to 90% of its nominal value. Oscillations in active power are acceptable providing that the oscillations are adequately damped and that the active energy is at least that which would have been delivered if the active power was constant. 3. During the fault, for which the voltage at the interface point is outside the limits specified in Section CC.6.1.4, the generating unit must supply maximum reactive current without exceeding its thermal rating. 4. The system must remain transiently stable and connected to the system for balanced Supergrid voltage dips and associated durations on the onshore transmission system. The active power level during the dip should be retained at least in proportion to the retained balanced voltage, and supply maximum reactive current when the voltage is outside the limits specified by CC.6.1.4, without exceeding the transient ratings. 5. The active power transfer capability following Supergrid voltages dips on the onshore network should be restored to at least 90% of the level available before the dip within 1 second. The oscillations criteria are the same as criterion two. It is expected that the maximum instantaneous arm current for an MMC is approximately 1.5p.u. ( 3kA) and that the maximum instantaneous SM overvoltage is 1.3p.u.( 27kV) 27. Hence for each of the test cases simulated, the MMC arm current and SM capacitor voltages must be within these limits in order to safely ride-through the disturbance. During onshore AC disturbances, the onshore converter s ability to export active power is diminished. If the power generated by the windfarm is not curtailed to meet the demands of the onshore converter, the DC link voltage will rise. Several methods have been proposed for the curtailment of wind power during onshore AC faults. However, many of these methods require telecommunications, are not applicable for all wind turbine topologies, or require modifications to the offshore MMC and wind turbine controls. The use of a DC braking resistor in the HVDC link enables the DC link voltage to be controlled very effectively and does not impact on the windfarm. It is for these reasons that the use of a DC braking resistor is employed for these studies. 27 Under normal operating conditions, the maximum instantaneous arm current and the maximum instantaneous SM capacitor voltage is approximately 2kA and 21kV respectively. 134

135 Chapter 5 MMC-HVDC Link Performance Supergrid Voltage Dips According to the GB grid code, for a Supergrid voltage dip to 30% the DC converter must remain connected to the grid for at least 384ms. To test the link s ability to ride-through this disturbance the following simulation is conducted; the windfarm is set to operate at maximum power, at approximately 2s the voltage at PCC1 is reduced to 0.3p.u. for 0.5s, and is then increased to 90% of the nominal value. The simulation results are presented in Figure At fault inception, the active power exported by the inverter, P1, decays in proportion to the voltage dip, while the active power imported from the windfarm, P2, remains unchanged. This leads to a rise in the DC link voltage. The DC braking resistor is switched-on the moment that the DC link voltage exceeds the 1.1p.u. threshold and is turned-off once the DC link voltage returns to 1.0.p.u. When the Supergrid voltage is restored to 90% of the nominal value, the active power level recovers to its pre-disturbance level with little oscillation and well within the allowable time. The converter s SM capacitor voltages and arm current values do not exceed tolerable values during this simulation case. The simulation results therefore show that the system is capable of riding through the disturbance for the required 384ms. The MMC in the previous simulation case was set to inject no reactive power at the PCC1 and therefore criterion 4 would have not been fully met in this case. In the following case the MMC operates in AC voltage control and the simulation results are shown in Figure During the voltage dip the MMC injects maximum q-axis current. The reactive power support increases the voltage at the PCC and subsequently enables the converter to supply approximately 50% more active power than without the reactive power support. The active power response upon fault clearance is more oscillatory when the AC voltage magnitude control is employed. This is primarily because the AC voltage magnitude control is slower than the reactive power controller, due to the rms measurements Unbalanced Short-circuit Faults In order to meet criterion 1, the DC converter must remain connected to the onshore grid for an unbalanced close-up short-circuit fault with a fault clearance time of 140ms. Figure 5.15 shows the converter s performance for a 140ms line-to-ground fault occurring at 3s on phase A, and for a 140ms line-to-line fault between phases A and B occurring at 4s. The 135

136 Chapter 5 MMC-HVDC Link Performance simulation results show that the link is able to ride-through the two unbalanced AC network faults and meet the necessary criterion Three-phase Line-to-Ground Fault at PCC1 A three-phase symmetrical fault is applied at PCC1 for 140ms starting at 3s. During such a severe fault, the inverter is unable to export any significant quantity of active power, leading to a rapid rise in the DC link voltage. In this scenario, the MMC converters are effectively paralysed and the regulation of the DC link voltage is performed by the DC braking resistor, which is designed to dissipate the maximum windfarm power at a DC link voltage of 720kV (1.2p.u.). Figure 5.16 shows that the DC link voltage does exceed 1.2p.u. This is due to power from the onshore AC system being injected into the link when the fault is cleared. Upon fault clearance, the converter is unable to effectively control the d-axis current for a short period of time, which leads to power from the onshore AC system being injected into the link. Increasing the bandwidth of the current controller and the Phase Locked Loop (PLL) can improve the system s response to this type of fault; however increasing controller bandwidth may degrade system performance under different operating conditions. After the fault is cleared, the active power level recovers to its pre-disturbance level well within the allowable time and with acceptable oscillations. The simulation results show that the peak voltage for the SM capacitor voltages for the upper arm of phase A is approximately 26kV (<1.3p.u.), which is the worst of the cases simulated. The maximum DC link voltage, the maximum arm current and the performance of the CBC are the three main factors which determine the peak value of the capacitor voltage. However, varying one of these three factors can limit the link s performance in other areas. For example, increasing the sorting frequency of the CBC can reduce the peak capacitor voltage, but at the expense of increased switching losses. It is expected that the SMs in a commercial MMC are rated to withstand 1.3p.u., a peak voltage of 26kV is therefore considered to be acceptable. The peak arm current value does not exceed the 3kA overcurrent protection limit. The link s ability to safely ride-through AC system faults is affected by a number of factors which include, but are not limited to, AC system strength, fault impedance, control system design, protection strategy and DC braking resistor design. 136

137 Chapter 5 MMC-HVDC Link Performance Figure 5.13: Supergrid voltage dip to 0.3p.u. with no MMC reactive current support ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 137

138 Chapter 5 MMC-HVDC Link Performance Figure 5.14: Supergrid voltage dip to 0.3p.u. with MMC reactive current support ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 138

139 Chapter 5 MMC-HVDC Link Performance Figure 5.15: Phase A to ground fault at 3s and phase A to phase B fault at 4s ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 139

140 Chapter 5 MMC-HVDC Link Performance Figure 5.16: Three-phase to ground fault at 3s ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 140

141 Chapter 5 MMC-HVDC Link Performance DC Faults The simulation results for a DC line-to-line fault applied to the terminals of MMC1 at 3s are shown in Figure The converters have an instantaneous overcurrent threshold of 3kA. Once the current magnitude in any arm of the converter reaches this threshold the converter is blocked. It takes approximately 400µs from fault inception for MMC1 to reach this limit. If the assumed maximum arm current rating of 3kA is impractical, then either more inductance must be added to the fault current path, the converter must be capable of blocking quicker, or a combination of the two must be employed. Upon blocking the converter, the fault current flows from the AC system through the converter s anti-parallel diodes. In practice, protection thyristors are employed to conduct the DC fault current and to therefore prevent the SM diodes from reaching their current rating. However, this does not affect the overall simulation results. The results show that it takes approximately three cycles for the AC breakers to open, after which the arm currents decay as the arm reactors de-magnetise. The fast blocking action ensures that the converter is able to survive a severe DC line-to-line fault. A DC positive line-to-ground fault is applied to the terminals of MMC1 at 3s. As shown in Figure 5.18 the faulted pole voltage collapses to zero whilst the healthy pole experiences a voltage of 2p.u. (600kV). This causes the converter to synthesise voltages (V a1,v b1,v c1 ) with a DC offset of 300kV. In a symmetrical monopole for a MMC-HVDC scheme, the DC side is not normally earthed and therefore there is no low impedance path for the fault current. The scheme can then theoretically continue to operate as stated in [109], however this is unlikely to be possible in a commercial HVDC system due to the additional voltage stress to the cable and transformer. The scheme is therefore tripped and the DC link voltage is reduced as quickly as possible to protect the DC cables and transformer. In Figure 5.19, the DC braking resistor is turned-on and the MMCs are blocked once the local negative line-to-ground voltage magnitude exceeds 1.1p.u. (330kV) and 1.3p.u. respectively. Once the offshore converter is blocked, active power is still injected into the link from the windfarm through the MMC s diodes, which is dissipated in the DC braking resistor. Approximately three cycles after fault inception, the AC side breakers for both converters are tripped and then the DC braking resistor rapidly discharges the DC cable. The healthy DC cable voltage is reduced to less than 1p.u. within 80ms of fault inception using this protection strategy. 141

142 Chapter 5 MMC-HVDC Link Performance It should be noted that in commercial HVDC schemes a star-point reactor between the transformer and the converter at one converter station is installed to provide DC voltage grading [91] and that surge arresters are typically installed between the DC poles and ground to limit overvoltages. These components were not modelled in the previous simulation cases. In the event of a DC line-to-ground fault, the star-point reactor provides a low impedance path for DC current to flow and the surge arresters assist in limiting the magnitude and duration of the DC voltage experienced by the healthy cable. Simulation results are included in Appendix 5A to show the effects of the star-point reactor and surge arresters. 142

143 Chapter 5 MMC-HVDC Link Performance Figure 5.17: DC line-to-line fault at the terminals of MMC1 at 3s ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 143

144 Chapter 5 MMC-HVDC Link Performance Figure 5.18: Positive pole-to-ground fault at MMC1 ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 144

145 Chapter 5 MMC-HVDC Link Performance Figure 5.19: Positive pole-to-ground fault at MMC1 with under voltage protection ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 145

146 Chapter 5 MMC-HVDC Link Performance 5.2 VSC-HVDC Interconnector The purpose of this section is to highlight the differences between a VSC-HVDC link employed for the connection of a windfarm and a VSC-HVDC link employed for the interconnection of two active networks. The structure of the model for the interconnector, as shown in Figure 5.20, is similar to link for the offshore windfarm, shown in Figure 5.1, except for the following distinctive differences: The windfarm network is replaced with a relatively strong AC network Each MMC must be able to operate as a rectifier and as an inverter MMC2 is set to control active and reactive power, as opposed to AC voltage magnitude and frequency The interconnector has no DC braking resistor SCR=3.5 PCC2 X T=15% 410kV 370kV MMC2 I dc2 165km DC cable I dc1 MMC1 X T=15% 370kV 410kV PCC1 SCR=3.5 V n 400kV Z n I s2(abc) V s2(abc) Y g/d V dc2=600kv D/Y g I s1(abc) V s1(abc) Z n V n 400kV Real and reactive power control L arm=45mh C SM=1150μF DC link voltage control and AC voltage magnitude control Figure 5.20: MMC VSC-HVDC interconnector Power Reversal Figure 5.21 shows the link s ability to operate under emergency power control for a range of power orders including power reversal. The steady-state waveforms for a point-to-point link are similar to a link employed for a windfarm (Section 5.1.3) and hence they are not repeated here AC Faults In terms of a link s ability to ride-through AC faults, the key difference between an interconnector and a link employed for the connection of a windfarm is that the interconnector controls active power flow. Hence, if a fault occurs in the AC grid connected to MMC 1, MMC 2 is able to control the power flow to regulate the DC link voltage. A method proposed in [77], varies the link s power order in accordance with the AC system voltage magnitude measured at each end of the link. This method is shown to work 146

147 Chapter 5 MMC-HVDC Link Performance effectively in [77], however the reliance upon a telecommunications link between the two converters is a drawback due to reliability concerns. An alternative method is to use voltage margin control, which is discussed in detail in Section The converter effectively operates in constant power control, providing that its local DC link voltage is within pre-set limits (V dc-low <V dc <V dc-high ), when employing this control method. If the DC link voltage exceeds these limits then the converter operates in DC link voltage control mode. Hence, applying voltage margin control to MMC 2 enables the DC link voltage to be regulated for disturbances in AC grid 1 without a telecommunications link. A three-phase symmetrical fault is applied at PCC1 for 140ms starting at 3s and the simulation results are shown in Figure The simulation results show that the link is able to ride-through the three-phase AC network fault and meet the necessary criteria DC Faults The link s response to a DC line-to-line fault is similar to that of a link for a windfarm and therefore will not be repeated. In the event of a DC line-to-ground fault for a HVDC link interconnecting two active networks, the converters are blocked on line-to-ground overvoltage protection, the AC circuit breakers are tripped after three cycles and the cable then discharges without the aid of a DC braking resistor as shown in Figure The healthy DC cable voltage is reduced to less than 1p.u. within 200ms of fault inception using this protection strategy. As mentioned in Section 5.1.5, surge arresters can be used to limit the voltage on the healthy cable. 147

148 Chapter 5 MMC-HVDC Link Performance Figure 5.21: System response for a wide range of active and reactive power orders ; x axis time(s) 148

149 Chapter 5 MMC-HVDC Link Performance Figure 5.22: Three-phase fault for 140ms at 3s ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 149

150 Chapter 5 MMC-HVDC Link Performance Figure 5.23: DC line-to-ground fault ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 150

151 Chapter 5 MMC-HVDC Link Performance 5.3 Variable Limit DC Voltage Controller During AC system disturbances, the DC link voltage controller increases the d-axis current set-point. This is to compensate for the decrease in the AC system voltage in an attempt to regulate the DC link voltage and hence maintain the pre-fault active power flow. Once the fault is cleared, the AC system voltage recovers faster than the DC link voltage controller is able to reduce the d-axis current set-point to achieve the desired active power, which results in an overshoot. The d-axis current set-point has a fixed limit which is used to prevent the converter from exceeding its current rating. In the event of a severe AC system disturbance, such as an AC close-up three-phase fault, the DC voltage controller will reach the d-axis current limit. This results in a large overshoot when the desired active power flow is relatively low, as shown in Figure 5.24 (left) for the windfarm link model. The system s response can be improved by increasing the bandwidth of the DC link voltage controller; however, this can degrade system performance under different operating conditions. An alternative method is proposed here which varies the d-axis current limits for the DC link voltage controller depending upon the pre-fault active power flow. The controller continuously measures the active power, and calculates the required d- axis current based on the AC system voltage to achieve the required active power. The calculated d-axis current value is then increased by a safety margin (20%) and is used to set the d-axis current limit. Once the measured AC system voltage decreases below a preset level (0.85p.u.) the d-axis current value switches to variable limits until 100ms after the AC system voltage increases above 0.85p.u. The threshold of 0.85p.u. is the minimum AC system voltage value at which the system can supply maximum active power. This method ensures that the d-axis current limit is set to a level appropriate for the pre-fault active power flow and hence reduces the power overshoot as shown in Figure 5.24 (right). The variable limits are only activated once the AC system voltage decreases below 0.85p.u. and hence fixed limits are employed during normal operation. Figure 5.24: Comparison of active power response for a 140ms three-phase AC fault using fixed and variable limits Left) fixed limits, Right) variable limits 151

152 Chapter 5 MMC-HVDC Link Performance 5.4 Conclusion This chapter has assessed the steady-state and transient performance of the MMC-HVDC link models developed in Chapter 4 through conducting a range of typical studies. The simulation results are shown to be in agreement with the theory outlined in Chapter 4. These models thus provide a high fidelity version of a component level MMC model with detailed parameters and control and can therefore act as a benchmark for lower fidelity models. An example of this use was in the verification of an averaged value VSC-HVDC model which enabled this lower fidelity model to be used for a comprehensive investigation into the limitations imposed on active power controllers. The models developed in this thesis were used to investigate the links ability to respond to reactive power demands and to ride-through disturbances in the AC grid. The results show that the models were able to meet the reactive power requirements and the AC fault ridethrough requirements set out in the GB grid code for the tests conducted, as well as complying with the IEEE 519 THD voltage harmonic limits at the PCC. Furthermore, the results show that the use of the proposed variable limit DC voltage controller, a modification to the standard DC voltage controller, can improve the system s fault recovery response. The differences between the control and protection of the interconnector, in comparison to the link employed for the connection of a windfarm, were also highlighted. The key difference is that the interconnector is able to maintain control of the DC link voltage in the event of a severe AC fault, without a DC braking resistor, by controlling the active power at the rectifier. 152

153 Chapter 6 MMC Modelling Techniques 6 Comparison of MMC Modelling Techniques The 31-level MMC converters described in Chapter 4, and used for the MMC-HVDC link models in Chapter 5, were represented using the PSCAD Detailed Equivalent Model (DEM) which is based on the principles outlined in [10]. The DEM technique was employed as a direct consequence of the comparative analysis of detailed MMC modelling techniques described in this chapter. Modelling MMCs in Electromagnetic Transient (EMT) simulation programs presents a significant challenge in comparison to modelling a two or three-level VSC. The stack of series-connected IGBTs in each arm of a two or three-level VSC are switched at the same time. This simultaneous switching action enables the stack of IGBTs to be modelled as a single IGBT for many studies. The MMC topology, however, does not contain stacks of series-connected IGBTs which have identical firing signals and therefore a comparable simplification in the model cannot be made. The converter employed on the Trans Bay Cable project is an MMC with approximately 201 levels. A Traditional Detailed Model (TDM) of this converter would require more than 2400 IGBTs with anti-parallel diodes and more than 1200 capacitors, to be built and electrically connected in the simulation package s graphical user interface, resulting in a large admittance matrix. The admittance matrix must be inverted each switching cycle, which for MMCs can be hundreds of times per fundamental cycle and is therefore extremely computationally intensive. This makes modelling MMCs for HVDC schemes using traditional modelling techniques impracticable. To address this problem an efficient model was proposed by Udana and Gole in [10], which is referred to as the DEM in this work. In [10] the DEM was shown to significantly reduce the simulation time in comparison with a TDM without compromising on accuracy. A drawback of the DEM is that the individual converter components are invisible to the user. This makes the model unsuitable for studies which require access to the individual converter components and it makes it difficult to re-configure the converter SM for different topologies. Only one publication has compared the DEM with the TDM, which was performed in EMTP-RV [12]. A new model, referred to as the Accelerated Model (AM), was proposed by Xu et al. in [11]. This model was found to offer greater computational efficiency than for a TDM 153

154 Chapter 6 MMC Modelling Techniques without compromising on accuracy and it gives the user access to the individual converter components. In [11], an attempt was made to compare the AM simulation time with the DEM simulation time data from [10], however, a full and objective comparison could not be completed because the models were built by different researchers on different computers. The objective of this chapter is to perform a much needed independent comparison of the TDM, DEM and AM models, which will enable the reader to make a more informed decision when selecting which type of detailed MMC model to use, and to have a greater degree of confidence in the MMC model s performance. In this work the TDM, DEM and AM models are built in the same software environment and are simulated on the same computer to evaluate their accuracy and simulation speed. This enables a fair comparison between the DEM and the AM and it provides the first independent verification for the AM against the TDM, and the first independent verification for the DEM against the TDM in PSCAD. Having completed this verification, this work also highlights potential limitations of the AM and proposes an enhanced accelerated model (EAM) with an improved simulation speed. 6.1 MMC Modelling Techniques This section describes the three leading detailed modelling techniques, TDM, DEM and AM which represent the converter s IGBTs and diodes using a simple two-state resistance Traditional Detailed Model In a traditional detailed MMC model, each SM s IGBTs, diodes and capacitors are built in the simulation package s graphical user interface and electrical connections are made between the SMs in each arm, as shown in Figure 4.2. This is the standard way of building a detailed MMC model and hence is why this type of model is referred to as the TDM. This method of modelling is intuitive and gives the user access to the individual components in each SM, however, for MMCs with a large number of SMs this method is very computationally inefficient Detailed Equivalent Model The DEM uses the method of Nested Fast and Simultaneous Solution (NFSS) [110]. The NFSS approach partitions the network into small sub-networks, and solves the admittance 154

155 Chapter 6 MMC Modelling Techniques matrix for each sub-network separately [10]. Although this increases the number of steps to the solution, the size of admittance matrices are smaller, which can lead to a reduced simulation time. A summary of the DEM is presented here, however, further information can be found in [10] Nested Fast and Simultaneous Solution The NFSS approach is best explained with the aid of an example [10]. The equivalent admittance matrix for a network, which is split into two subsystems is given by (6.1). Y11 Y12 V1 J1 Y Y V J (6.1) where: Y11, Y 22 admittance matrices for subsystem 1 and subsystem 2 respectively. Y, Y admittance matrices for the interconnections V1, V 2 unknown node voltage vectors J, J source current vectors 1 2 The number of nodes in subsystem 1 and subsystem 2 are N 1 and N 2 respectively. The direct solution of (6.1) for the unknown vector voltages requires an admittance matrix of size (N 1 +N 2 ) (N 1 +N 2 ) to be inverted. Rearranging the 2 nd row of equation (6.1) for V 2 gives (6.2). Substituting (6.2) into the first row of (6.1) produces (6.3) which can be rearranged for V 1, as given by (6.4). V Y Y V Y J (6.2) J Y V Y ( Y J Y Y V ) (6.3) V ( Y Y Y Y ) ( J Y Y J ) (6.4) V 1, calculated from (6.4), is then substituted into (6.2) to calculate V 2. Once all unknown voltages are calculated, all currents can then be calculated. This approach requires the 1 1 inversion of two matrices, Y 22, of size (N 2 N 2 ) and ( Y Y Y Y ) of size (N 1 N 1 ), instead of a single matrix of size (N 1 +N 2 )(N 1 +N 2 ). This example partitioned the original network 155

156 Chapter 6 MMC Modelling Techniques into two subsystems, however the network can be split into many subsystems. In the DEM, each converter arm is modelled as its own subsystem. The size of the admittance matrices for each converter arm is related to the number of SMs, hence, for MMCs with a high number of levels, the size of the admittance matrices to be inverted are still relatively large. To further improve the simulation speed, the DEM reduces each converter arm to a Norton equivalent circuit Norton Equivalent Circuit for the Converter Arm This modelling method is based on converting a multi-node network into an exact, but computationally simpler, equivalent electrical network using Thevenin s theorem. The IGBTs and antiparallel diodes employed in each SM form a bi-directional switch and can therefore be represented as a resistor, with two values, R on and R off. The resistor value is dependent upon the firing signal to the IGBT and the arm current direction, I arm. The converter is considered to be blocked when both IGBTs are switched-off and hence the values of R1 and R2 are determined by the arm current direction. The SM capacitor can be represented as an equivalent voltage source, V capeq, connected in series with a resistor, R cap, as shown in Figure 6.1. I cap I cap R 1 I arm V cap I arm V cap R cap V SM V SM R 2 V capeq Figure 6.1: SM circuit (left) SM equivalent circuit (right) The V capeq and R cap values are determined from the following analysis. dvcap () t Icap () t CSM (6.5) dt Solving equation (6.5) for Vcap () t using the trapezoidal integration method gives (6.6). V ( t) R I ( t) V ( t t) (6.6) cap cap cap capeq 156

157 Chapter 6 MMC Modelling Techniques where: R cap t (6.7) 2C SM t Vcapeq ( t T ) Icap ( t t) Vcap ( t t) (6.8) 2C SM The voltage at the terminals of the SM is given by (6.9): V ( t) I ( t) R V ( t t) (6.9) SM arm SMeq SMeq where: R SMeq R2 R2 1 R1R 2 R cap (6.10) R V t t V t t 2 ( ) SMeq capeq ( ) R1R 2 R cap (6.11) The SMs in each converter arm are connected in series. The Thevenin equivalent circuits for each SM can therefore be combined to a single Thevenin equivalent circuit for each converter arm, as shown in Figure 6.2, where: R eq n R (6.12) i1 SMeqi V eq n V (6.13) i1 SMeqi The Thevenin equivalent circuit for the converter arm is converted to a Norton equivalent circuit for use by the main EMT solver. 157

158 Chapter 6 MMC Modelling Techniques I arm R SMeq1 V SM1 V SMeq1 I arm R eq V arm I arm R SMeqn V eq V SMn V SMeqn Figure 6.2: String of SM Thevenin equivalent circuits (left) Converter arm Thevenin equivalent circuit (right) The process outlined in this section has reduced a multi-node network for each converter arm and converted it into a two node Norton equivalent circuit in the main EMT solver. This significantly reduces the size of the admittance matrix for the EMT solver which improves the simulation speed. Since the main EMT solver only considers a two node network for each converter arm, the individual identities of each SM are lost, however, the Thevenin equivalent solver considers each SM separately and therefore the SM capacitor voltages and currents are recorded. PSCAD have developed a DEM model based on the work by Udana and Gole. The component mask is shown in Figure 6.3. The development of the DEM has a clear advantage over the TDM in terms of simulation speed, however there are some limitations. The user it not able to access the SM components, which means that the model is not suitable for studies which require internal converter access. Also re-configuring the component for other SM topologies is not straightforward as it needs to be re-coded for the specific topology, which can be complex and time consuming. Half-bridge and full-bridge MMC equivalent arm components are currently available to PSCAD users. x10 Vc Ic Figure 6.3: PSCAD half-bridge MMC arm component 158

159 Chapter 6 MMC Modelling Techniques Accelerated Model The Accelerated Model (AM) was proposed by Xu et al. in [11]. In many respects the AM is a hybrid between the TDM and the DEM. The user is able to access the SM components, as they can with the TDM, but the converter arm is modelled as a controllable voltage source, which is similar to the DEM. An overview of the AM is presented here; the reader is referred to [11] for further information. In the AM, the series-connected SMs are removed from each converter arm, separated and driven by a current source with a value equal to the arm current, I arm. A controllable voltage source is installed in place of the SMs as shown in Figure 6.4, where the value of the controllable voltage source is given by (6.14). V arm n V (6.14) i1 The AM reduces the size of the main network admittance matrix by solving the admittance matrix for each SM separately. The AM has two key advantages in comparison to the DEM. The first is that the AM allows the user access to the SM components. The second is that because the AM is implemented using standard PSCAD components, the internal structure of the SM can be easily modified; for example changing from a half-bridge SM to a full-bridge SM. SMi Converter arm I cap1 I cap1 I arm I arm V cap1 V cap1 V SM1 V SM1 I cap2 I cap2 I arm I arm V cap2 I arm V cap2 V arm V SM2 V SM2 L arm I capn I capn I arm I arm V capn V capn V SMn V SMn L arm Figure 6.4: Implementation steps for the accelerated model 159

160 Chapter 6 MMC Modelling Techniques 6.2 Simulation Models A detailed MMC model for a typical VSC-HVDC scheme, employing the TDM converter arm representation, has been developed. This model is used as the TDM simulation model base case. The simulation models for the DEM and for the AM are identical to the TDM, except that the TDM converter arms are replaced with the converter arms required for the DEM and AM respectively. This approach ensures that fair comparisons between the different modelling techniques can be made. The basic structure of the simulation model and the key parameters are shown in Figure 6.5. This simulation model was built before the MMC-HVDC radial link models described in Chapters 4 and 5 and is effectively one end of a MMC link with the other MMC represented by a DC voltage source. The structure, controls and parameters for this model are very similar to that of the model described in Chapter 4. The key differences are that feed-forward active and reactive power controllers were used for this model and that this model uses a larger value of arm reactance. The parameters for the model are given in Appendix 6A. V dc 2 V dc 2 100km FDPCM DCCB L-L Fault I dc 31-Level MMC P=1GW V dc =600k C sm =1150µF L arm =85mH I abc X T =15% 370kV 410kV I s(abc) D/Y g PCC V s(abc) L-G Fault SCR=3.5 V n 400kV Figure 6.5: Basic simulation model structure 6.3 Results In this section the three models are compared in terms of their accuracy and simulation speed Accuracy The accuracy of each model is assessed for steady-state and transient events through conducting a range of typical studies, and is evaluated graphically and numerically by calculating the Mean Absolute Error (MAE) of the waveforms produced by the DEM and AM with respect to the TDM. The MAE is normalised to the mean value of the TDM waveform. 160

161 Iuc (ka) Ia (ka) Va (kv) Chapter 6 MMC Modelling Techniques Steady-state The steady-state waveforms produced by the models for the converter operating as an inverter at 1GW are shown in Figure 6.6. The waveforms are virtually identical and this is confirmed by the very small (<1%) normalised MAE values given in Table 6.1. The models were re-simulated for the converter operating as an inverter at 500MW and 100MW, and their normalised MAE values are given in Table 6.2 and Table 6.3 respectively. The results generally show that the accuracy of the models decreases as the operating point decreases. This is especially the case for the phase current and arm current. At lower operating points, the magnitude of the arm and phase currents are smaller and the switching noise is more noticeable. It appears to be the case that the effect of this switching noise on the dominant signal and the models inability to replicate it, is impacting on the normalised MAE values. 300 TDM DEM AM Vcap (kv) Time (s) Time (s) Time (s) TDM DEM AM Time (s) Time (s) Time (s) Figure 6.6: Steady-state simulation results for the three models. From top to bottom: (a) Phase A output voltage, (b) Phase A output current, (c) Phase C upper arm current. (d) Phase A upper arm mean capacitor voltage 161

162 Chapter 6 MMC Modelling Techniques 1GW Steady-state Signal DEM error (%) AM error (%) V a I a I ua V cap Table 6.1: Normalised MAE for the DEM and AM waveforms when operating in steady-state at 1GW 500MW Steady-state Signal DEM error (%) AM error (%) V a I a I ua V cap Table 6.2: Normalised MAE for the DEM and AM waveforms when operating in steady-state at 500MW 100MW Steady-state Signal DEM error (%) AM error (%) V a I a I ua V cap Table 6.3: Normalised MAE for the DEM and AM waveforms when operating in steady-state at 100MW DC Side Line-to-Line Fault A DC line-to-line fault is applied at 4.5s to the MMC terminals as shown in Figure 6.5. The DC circuit breakers (DCCBs) are opened 2ms after the fault is applied so that the DC voltage sources do not continue to contribute to the fault current. The MMC converter is blocked at 4.502s, and the AC side circuit breakers are opened at 4.56s. The waveforms produced by the models are shown in Figure 6.7 and their normalised MAE values are given in Table 6.4. The waveforms produced by the DEM and the AM are virtually identical (<1%) and are very similar (<2.5%) to the TDM respectively. An error in the AM model s phase voltage is shown in Figure 6.7 at the instance the arm current goes through zero. This issue occurs because the AM is not able to correctly determine the on/off status of the SM diodes in a single time-step when the converter is blocked. This issue is discussed further in Section

163 4Iua (ka) Va (kv) Idc (ka) Chapter 6 MMC Modelling Techniques 2 TDM DEM AM Vcap (kv) Time (s) Time (s) Time (s) Figure 6.7: DC line-to-line fault applied at 4.5s. From top to bottom: (a) DC current (b) Phase A output voltage, (c) Phase A upper arm current. (d) Phase A upper arm mean capacitor voltage. DC Line-to-Line Fault Signal DEM error (%) AM error (%) I dc V a I ua V cap Table 6.4: Normalised mean absolute error for the DEM and AM waveforms for a DC line-to-line fault AC Line-to-Ground Fault A line-to-ground fault is applied to phase A at the PCC for 60ms at 4.5s as shown in Figure 6.5. The waveforms produced by the models are shown in Figure 6.8 and their normalised MAE values are given in Table

164 2Iua (ka) 4Iua (ka) Ia (ka) Va (kv) Chapter 6 MMC Modelling Techniques TDM DEM AM Time (s) Time (s) Time (s) TDM DEM AM Time (s) Time (s) Time (s) Figure 6.8: Line-to-ground fault for phase A applied at 4.5s. (a) Phase A output voltage, (b) Phase A output current, (c) Phase A upper arm current. (d) Phase A arm current, zoomed. AC Line-to-Ground Fault Signal DEM error (%) AM error (%) V a I a I ua I ua zoom Table 6.5: Normalised mean absolute error for the DEM and AM waveforms for a line-to-ground AC With the exception of the phase A upper arm current, the waveforms produced by the DEM and the AM are virtually identical (<1%) and very similar (<2.5%) to the TDM respectively. From all of the simulations conducted, the greatest difference between the three models was found to be in the phase A upper arm current a few cycles after the fault is cleared when the MMC becomes over-modulated, as highlighted in Figure 6.8d. This difference lasts for a few cycles and there is no significant difference in the peak current values for the three models. 164

165 Va (kv) Chapter 6 MMC Modelling Techniques AM Simulation Limitation The AM implemented in this work was found to be unable to fully manage the simulation case when the converter is blocked, as shown in Figure 6.7. To further demonstrate this issue, the converter is blocked at 3s when operating as an inverter at 1GW and the Phase A output voltage for the three models are shown in Figure 6.9. Clearly the converter voltage for phase A for the AM is different. 400 TDM DEM AM Time (s) Time (s) Time (s) Figure 6.9: Phase A output voltage for the three models when the converter is blocked at 3s. This is an inherent issue with the implementation of the AM and can be illustrated further at the SM level. A circuit diagram for a blocked SM connected to a voltage through a resistor is shown in Figure A model of this circuit based on the principles of the AM is shown in Figure The SM current, I SM, is measured in the primary circuit and is used as the current source reference in the secondary circuit. The SM voltage, V SM, is measured in the secondary circuit and is used as the voltage source reference in the primary circuit. Each network is therefore solved at the present time-step based on information from the other network at the previous time-step. I cap R I SM D 1 V cap V S V SM D 2 Figure 6.10: Blocked SM test circuit 165

166 Chapter 6 MMC Modelling Techniques I cap D 1 I SM R I SM V cap V S V SM V SM D 2 Primary Secondary Figure 6.11: Implementation of blocked SM test circuit based on AM principles Upon model initialisation, V SM =0V, and therefore the SM current flows in the positive direction causing the upper diode, D1, to conduct and the SM capacitor to charge. Once the SM capacitor is fully charged, if the voltage source value is reduced, the upper SM diode, D 1, should become reverse biased. Assuming that the SM diodes are ideal, the SM capacitor voltage should remain constant, V s =V sm and I sm =0. However, this is not the case with the model implemented based on the AM principles. The arm current in the primary circuit becomes negative because the value of V SM is equal to V cap which is higher than V s. At the next time-step the negative arm current value causes the lower diode in the secondary circuit to conduct and hence V SM =0. At the next time-step the arm current becomes equal to Vs / R causing the SM capacitor to charge. This behaviour continues for the remaining simulation time. This limitation is understood to be have now been addressed by Xu et al., but no details have yet been published Simulation Speed A 5 second simulation was performed for a 16, 31 and 61 level MMC using the three modelling techniques with a 20µs time-step. The simulations were conducted on a Microsoft Windows 7 operating system with a 2.5GHz Intel core iq processor and 8GB of RAM, running on PSCAD X4. The simulation times are compared in Table 6.6 and in Figure MMC Indices TDM DEM AM 16 Time (s) Ratio Time (s) Ratio Time (s) Ratio Table 6.6: Comparison of run times for the three models for a 5 second simulation 166

167 Simulation duration (s) Chapter 6 MMC Modelling Techniques The data shows that the DEM is the fastest and that the TDM is the slowest. It also shows that as the number of converter levels increases the simulation time for the TDM increases at a much faster rate than for the DEM and AM models. It is worth noting that the results in [10] and [11] do appear, in general, to show that their respective models simulate faster in comparison to the TDM than the results presented in Table 6.6. The models simulated in this work are, however, more complex than the models employed in [10] and [11] which may explain the difference TDM DEM AM Number of MMC levels Figure 6.12: Simulation times of the three models for different MMC levels Enhanced AM Model The AM has the advantage that it is much faster than the TDM without noticeably sacrificing accuracy for the majority of case studies. It does, however, need to be used with care when the converter is blocked. In comparison with the DEM, the AM has the advantage of allowing access to the SM components, but it is slower. This thesis proposes an enhancement to the AM to improve its speed. The procedure outlined in [11] to produce the AM, divides the series-connected SMs in each arm into individual circuits, driven by a current source whose value is equal to the arm current, as explained in Section This approach effectively creates a subsystem for each SM and solves the admittance matrix for each SM separately. Although this increases the number of steps to the solution, the size of admittance matrices are smaller, which can lead to a reduced simulation time [10, 11, 110] as shown in Table 6.6. The simulation speed is affected by the number of steps to the solution and the size of the admittance matrices. Hence it can be more efficient to group a number of SMs together in 167

168 4Iua (ka) Chapter 6 MMC Modelling Techniques order to reduce the number of steps to the solution, at the expense of larger admittance matrices. A 5 second simulation was performed for a 31-level MMC with groups of 1 (AM), 5 (AM5), 10 (AM10) and 30 (AM30) SMs. The results given in Table 6.7 show that it is more efficient to create a sub-network for 5, 10 or 30 SMs rather than to produce a sub-network for each SM. This is an important result since splitting a simulation model into a smaller number of sub-networks tends to be less time consuming for the user. It can also improve the simulation speed and reduce the risk of application instability. Model Time Ratio AM AM AM AM Table 6.7: Comparison of run times for different AM models The AC fault test scenario (Section ) was performed using an AM30 model to assess any change in the models accuracy. The arm current waveforms for the TDM, AM and AM30 are compared in Figure 6.13 and the normalised MAE values for the AM and AM30 model with respect to the TDM are given in Table 6.8. The results show that there is very little change. -10 TDM AM AM Time (s) Time (s) Time (s) Figure 6.13: Line-to-ground fault for phase A applied at 4.5s for the TDM, AM and AM30 models. Signal AM error (%) AM 30 error (%) V a I ua Table 6.8: Normalised mean absolute error for the AM and AM30 waveforms for a line-to-ground AC fault. 6.4 Analysis and Recommendations The three detailed EMT models compared represent the converter s IGBTs and diodes using a simple two-state resistance and are therefore not suitable for studies which require a detailed representation of the power electronic devices, such as the assessment of 168

169 Chapter 6 MMC Modelling Techniques switching losses. The type of model compared is typically employed for control and protection studies where the converter dynamics are important. Although the three models compared in this work represent the power electronic devices in the same way their implementation is different and this has an effect on the accuracy of their results. A key difference between the TDM and DEM used in this chapter is that the DEM does not use interpolation, and the key difference between the TDM and AM is that the solution of the AM is dependent upon information from different sub-networks at the previous time-step. These are the two most significant reasons why there is a small difference between the results produced by each model, particularly under transient conditions. The results in Table 6.8 have shown that even when two models are based on the same modelling technique, but implemented slightly differently, the simulation results are not identical. Using the TDM as the benchmark, the DEM was generally found to be more accurate than the AM, and the AM was also found to produce numerical errors when the converter is blocked and the arm current changes direction. The different implementation methods for the three models have a significant impact on their simulation speed. The results have shown that the DEM is the fastest and that the TDM is the slowest. The simulation times for the TDM increases significantly more than for the DEM and the AM as the number of converter levels increase and hence the DEM and AM modelling techniques have great value when modelling MMCs with a relatively large number of levels. The results have shown that a model of a 61-level MMC based on DEM and AM techniques is 43 and 14 times faster than the TDM respectively. In the DEM, the SM components are not visible to the user and therefore this model is not suitable for studies which require direct access to the SM components. The TDM and AM do allow the user access to the SM components and can therefore be easily modified for the required study. It is for these reasons that the DEM is considered to be the most suitable model for all studies which do not require access to the SM components. The AM should be considered for studies which require access to the SM components and where simulation speed is an important factor, however great care should be taken if the study requires the converter to be blocked. The user is also advised to create a sub-network for a number of SMs, rather than for each SM, as this may reduce implementation time, simulation time and the 169

170 Chapter 6 MMC Modelling Techniques possibility of application instability without decreasing accuracy. The TDM is recommended for studies which require access to the SM components and for the converter to be blocked. The TDM is also recommended when simulation speed is not an important factor. 6.5 Conclusion This chapter has presented the first independent comparison of two previously developed MMC modelling techniques (AM and DEM). It is has also presented the first independent verification of the AM, and the first independent verification of the DEM in PSCAD. An improvement to the AM technique is also described. An MMC-HVDC test system was developed and the AM and DEM modelling techniques were compared against the TDM modelling technique in terms of accuracy and simulation speed. The accuracy of the AM and DEM models was evaluated graphically and numerically for steady-state and transient studies. These findings have shown that both the AM and DEM modelling techniques offer a good level of accuracy but that the DEM is generally more accurate than the AM. The AM and DEM models have been shown to simulate significantly faster than the TDM, and the DEM is more computationally efficient than the AM. The AM model does however provide access to SM components (which is not possible with the DEM) and so may be considered when this is an important factor. The AM model was found to have limited performance for certain conditions when the converter is blocked. This finding highlights the importance of this comparative study as it has highlighted previously unreported shortcomings of discussed modelling techniques. It was also shown that by modifying the original AM by producing a sub-network for a number of SMs rather than for a single SM, the simulation run time could be improved. These results have been used to propose a set of modelling recommendations (Section 6.4) which summarise the findings of this study and offer technical guidance on state-of-the-art of detailed MMC modelling. 170

171 Chapter 7 HVDC Cable Modelling 7 HVDC Cable Modelling The required fidelity of a VSC-HVDC transmission scheme model is dependent upon the type of study being performed. Publications have a tendency to discuss the VSC converter model in-depth whilst often overlooking the cable model. There are publications which compare VSC models in terms of their accuracy and simulation speed [11, 12], however there are no such publications for HVDC cable models employed on typical VSC-HVDC transmission schemes. Furthermore, there is currently a lack of publically available HVDC cable data which is required to represent the cable. This chapter aims to address the aforementioned gaps in literature by focusing on the modelling of HVDC cables for VSC-HVDC transmission schemes. The complex structure of a submarine XLPE HVDC cable is detailed and parameters to represent a 1GW 300kV cable are derived from academic and commercial documentation. Types of commercially available cable models are discussed and four of these models are compared in terms of their accuracy and simulation speed for a range of studies when employed to represent the cables in a high fidelity MTDC model. The chapter concludes with a set of cable modelling recommendations. 7.1 The Cable A submarine HVDC cable is complex and consists of many concentric layers as shown in Figure 7.1. Figure 7.1. Image of a submarine XLPE HVDC cable, modified from [34]. The current carrying conductor may be made of copper or aluminium and the choice is normally project specific. The insulation layer provides an effective potential barrier between the conductor and the metallic screen/sheath. In VSC-HVDC schemes the 171

172 Chapter 7 HVDC Cable Modelling insulation is typically XLPE because it is less expensive and more robust in comparison to mass-impregnated cables [111]. The conductor screen and insulation screen are required to protect the insulation from ridges/grooves which could be caused by extruding the insulation directly onto the conductor [112]. Any ridges/grooves in the insulation could result in an enhanced localised electric field stress which would reduce the dielectric strength of the insulation. The metallic screen/sheath contains the electric field within the cable as well as carrying fault current to earth [113]. Longitudinal water sealing is achieved by applying swelling tape, which also absorbs humidity diffusing into the cable [112, 114]. The inner jacket provides mechanical and corrosion protection and the armour provides mechanical protection against impacts and abrasions [34]. The armour usually has a zinc and bitumen coating to protect against corrosion. The outer cover is the final layer of the cable and prevents the zinc and bitumen coating from scratches which damage their anti-corrosion protection. It is worth noting that there is no commercially available cable model which can represent every individual layer of the cable and account for the stranded nature of the conductors. In the absence of publically available data for a commercial HVDC cable model, the geometric and material properties for the layers of the cable, which can be represented in the cable model, have been estimated and are given in Table 7.1. Only a brief description of the cable parameters is given here, the reader is referred to Appendix 7A for the full derivation. Layer Material Radial Resistivity Relative Relative Thickness (mm) (Ω/m) Permittivity Permeability Conductor Stranded Copper x10-8* 1 1 Conductor Semi-conductive Insulation XLPE [114] 1 Insulator screen Semi-conductive Sheath Lead 3 [115] 2.2x Inner Jacket Polyethylene 5 [117] [118] 1 Armour Steel 5 [117] 1.8x [117] Outer cover Polypropylene 4 [117] [118] 1 Sea-return Sea water/air *Copper resistivity is typically given as 1.68*10-8 Ω/m. It has been increased for the cable model in PSCAD due to the stranded nature of the cable which cannot be taken into account directly in PSCAD. Table 7.1: Physical data for a 300kV 1GW submarine HVDC cable 172

173 Chapter 7 HVDC Cable Modelling The conductor parameters are based on a stranded copper conductor installed in a moderate climate with close spaced laying [34]. The PSCAD default value for the semi-conducting screen s thickness is employed in this work, which is 1mm. There is no official documentation regarding the insulation thickness of HVDC cables, however a representative from a leading cable manufacture has stated that a 320kV HVDC cable has an insulation thickness of about 18mm. The representative also stated that using the electrical parameters from an AC cable of similar thickness would yield similar results. This indicates that the relative permittivity of XLPE and DC-XLPE is similar. The relative permittivity of XLPE is given as 2.5 [114]. The relative permittivity of polypropylene yarn, which is used for the outer cover, is assumed to be very similar to that of polypropylene, which is 1.5 [118]. The calculation of the sea-return impedance is complex. In order to calculate the sea-return impedance accurately, accurate values of sea resistivity, sea-bed resistivity, sea depth, cable burial depth and frequency are required. A number of these parameters also vary with the tide and the cable route. PSCAD can only consider the air/sea interface for a submarine cable and therefore only the sea resistivity and cable depth below the sea surface are required. The resistivity of sea water varies in the range of Ω/m due to the temperature and the salinity of the water [119], which makes it difficult to obtain an accurate value. The sea resistivity and cable depth are assumed to be 1Ω/m and 50m respectively. Further information on the calculation of the sea-return impedance is given in Appendix 7A. The positive and negative cables may be installed in separate trenches, tens of meters apart, to prevent a ship s anchor from damaging both cables [111, 120]. This is however approximately 40% more expensive than installing both cables in a single trench, [111] and laying both cables close together means that their magnetic fields effectively cancel out. Unless the cable route has a lot of fishing activity it is therefore more likely that the cables will be buried in a common trench. It has been assumed that the horizontal distance between the two cables would therefore be approximately two cable diameters (0.25m). Sensitivity analysis to assess the impact of each of the cable s parameters on its electromagnetic characteristics was conducted, and the results are shown in Appendix 7A. This sensitivity analysis has shown that small variations in the cable s parameters do not have a significant effect on the cable s transient voltage response. 173

174 Chapter 7 HVDC Cable Modelling 7.2 Multi-conductor Analysis The wave equation describes how the voltage and current vary along a transmission line with time [121]. A submarine cable can be described as a multiphase system consisting of three-phases (conductor, metallic sheath and armour), hence there are 6 conductors for two submarine cables. The wave equations in the frequency domain for a transmission line are given by equations(7.1) and (7.2) [117, 122]: 2 dv phase Z ' ' 2 phase Y phase V phase dx (7.1) 2 d I phase Y ' ' 2 phase Z phase I phase dx (7.2) V phase and I phase are n x 1 matrices for the voltage and current along the conductors within the cable respectively, where n is equal to the number of conductors. Z ' phase and Y ' phase are n x n matrices for the series impedance per unit length and shunt admittance per unit length respectively. These are calculated by the method of coaxial loops [ ]. Equations (7.1) and (7.2) therefore each contain n coupled equations. These coupled equations in the phase domain can be transformed to decoupled equations in the modal domain. This allows each equation in the modal domain to be solved as a single-phase line. The relationship between the phase domain and the modal domain for the voltages and currents can be described by equations (7.3) and (7.4). T and T V i V phase Tv Vmod e (7.3) I phase Ti Imod e (7.4) are the voltage and current transformation matrices respectively. Inserting equation (7.3) into equation (7.1) gives equation (7.5). 2 dvmode 2 dx V mod e (7.5) where: 1 T Z ' Y ' T (7.6) v phase phase v 174

175 Chapter 7 HVDC Cable Modelling In order to obtain the diagonal matrix,, the values of the voltage transformation matrix, v T, which diagonalises the Z' phase Y' phase product, must be found. The voltage transformation matrix is obtained by finding the eigenvectors of Z' phase Y' phase. The current transformation matrix is obtained by finding the eigenvectors of the product Y' phase Z' phase. The decoupled current wave equation in the modal domain is shown by equation (7.7). 2 d Imod e 2 dx I mod e (7.7) The wave equation for a single mode can be analysed in a similar manner to the wave equation for a single-phase line as shown by equation (7.8), where m, is the eigenvalue for mode m. 2 dvmod em, 2 2 mvmod e, m mod e, mvmod e, m dx (7.8) j (7.9) mod e, m m m m The propagation constant,, given by equation (7.9), is a complex quantity; the real part is called the attenuation constant,, measured in nepers per unit length, and the imaginary part is called the phase constant,, measured in radians per unit length of line. The propagation constant describes how the voltage or current waveform is attenuated and delayed travelling from one end to the other end of the line. The modal series impedance matrix and modal shunt admittance matrix are diagonal matrices and can be obtained from equations (7.10) and (7.11). T Z ' T Z ' T (7.10) mod e i phase i T Y ' T Y ' T (7.11) mod e v phase v The characteristic impedance, Zc, of a single mode can be obtained by equation (7.12). Zc Z ' mod em, mod em, (7.12) Y ' mod em, 175

176 Chapter 7 HVDC Cable Modelling Once the characteristic impedance and propagation constant for each mode have been calculated, PSCAD can determine how the voltage and current waves will propagate through the cable. 7.3 HVDC Cable Models This section gives an overview of the most common types of HVDC cable models commercially available. Lumped parameter model - This model lumps the cable s resistance, R, capacitance, C, and inductance, L, together to typically form one or more PI-sections. In general lumped parameter models are only considered appropriate when the wave propagation travel time is smaller than the time-step. Based on a time-step of 50μs and the maximum velocity of propagation in a typical XLPE cable, the travel time will only be less than the time-step if the cable is shorter than about 10km. HVDC cables are normally greater than 50km in length. However, for completeness a Coupled Equivalent PI-section Model (CEPIM) is compared in this work. Bergeron model - The Bergeron model is based on travelling wave theory and represents the distributed nature of the cable s LC parameters. The cable s resistance is lumped together and divided into three parts, 50% in the middle of the cable and 25% at each end. This model is similar to the PI-section as it does not account for the frequency dependence of the cable s parameters and is therefore essentially a single frequency model. Frequency-dependent models - Frequency dependent models represent the cable as a distributed RLC model, which includes the frequency dependency of all parameters. This type of model requires the cable s geometry and material properties to be known. There are two frequency dependent models available in PSCAD; the Frequency Dependent Mode Model (FDMM) and the Frequency Dependent Phase Model (FDPM). The key difference between the two models is that the mode model does not represent the frequency dependent nature of the internal transformation matrix, T through direct formulation in the phase domain. v, whereas the phase model does Furthermore, the phase model has an additional feature which is referred to as DC correction. This enables the model to produce the exact DC response rather than a best 176

177 Chapter 7 HVDC Cable Modelling approximation, which is used by the mode model. The FDPM is the most advanced and accurate time domain line model available [126]. 7.4 System Model To assess the impact of the cable model on typical studies a high fidelity model of a MT VSC-HVDC system has been developed. A MT HVDC model is used for this study rather than a radial model because it allows a wider range of cases to be conducted and it is more appropriate for DC protection studies, which require very accurate representation of the DC voltage and current. The test model which is shown in Figure 7.2 is described in Sections 8.1 and 8.3. Based on the work carried out in Chapter 8, the onshore MMCs employ standard droop control. 1000MW Windfarm1 X PCC2 T=15% 220kV 370kV I s2(abc) V s2(abc) Y g/d MMC2 I dc2 200km DC cable V dc2 R brak I dc1 MMC1 X T=15% 370kV 410kV D/Y g PCC1 I s1(abc) V s1(abc) Z n SCR=3.5 V n Active and reactive power control AC voltage magnitude and frequency control Standard droop control 130km DC cable 1000MW Windfarm2 X PCC3 T=15% 220kV 370kV I s3(abc) V s3(abc) Y g/d MMC3 I dc3 V dc3 R brak I dc4 MMC4 X T=15% 370kV 410kV D/Y g PCC4 I s4(abc) V s4(abc) Z n SCR=3.5 V n Active and reactive power control AC voltage magnitude and frequency control 125km DC cable Standard droop control Figure 7.2: MTDC test model The four cable models to be compared are the CEPIM, Bergeron model, FDMM and the FDPM. The physical properties of the cable, cable positions and sea-return resistivity are given in Table 7.1. The sheath and armour in the submarine cable are bonded to ground at both ends of the cable [120] through a small resistor; further information on cable bonding is given in Appendix 7A. The last metallic layer (armour in a submarine cable), is eliminated from the impedance matrix. This is often a valid assumption for a submarine cable, where the armour is a semi-wet construction which allows water to penetrate [117]. The steady-state frequency for the Bergeron model is set to 5 Hz as recommend for DC studies for this type of model [126] and the CEPIM is created using PSCAD s in-built function. The starting frequency for the frequency dependent models is set to 0.1Hz and 177

178 Chapter 7 HVDC Cable Modelling equal weighting is given to the entire frequency range. The DC correction function, which is only available for the FDPM is enabled. All other settings are left at their default value. 7.5 Results Accuracy A series of tests were performed to assess the impact of the cable model on the simulation results for common types of study ranging across a wide frequency range; the results of which are presented in this section. The active power generated by windfarm 1 increases from 500MW to 1GW at approximately 2s and the windfarm power generated by windfarm 2 increases from 500MW to 1GW at 2.25s. At approximately 3s, the circuit breakers for windfarm 1 are tripped. Figure 7.3 shows that the active power injected into the onshore AC network at PCC1 is very similar for all the cable models. This plot also shows that greater accuracy can be obtained for the FDMM by reducing the constant transformation matrix frequency to 5Hz, as opposed to the default value of 2kHz. A DC line-to-line fault is applied to the DC terminals of MMC1 at 2.5s. The DC voltage and current response for the three cable models are shown in Figure 7.4 and Figure 7.5 respectively. The CEPIM shows virtually no propagation delay as expected, whilst the propagation delay for the Bergeron model is approximately twice that of the frequency dependent cable models due to the modal velocities for the cable being calculated at the steady-state frequency. The attenuation for the two frequency domain models is different due to the frequency dependent nature of the transformation matrix. MT protection schemes are required to detect a DC fault, identify the faulty cable and issue the trip command to the appropriate HVDC breakers within approximately 1-2ms, as described in Chapter 3. MT protection strategies are therefore highly sensitive to the local DC voltage and current measurements and hence very accurate cable models are required. A three-phase line-to-ground fault is applied to PCC1 at 2s for 140ms. The active power injected to the onshore network from MMC1 is shown in Figure 7.6. The responses produced by the CEPIM, FDMM and the FDPM are very similar, whilst the Bergeron model s response is very different. This is because the Bergeron model is unable to 178

179 Current (ka) Voltage (kv) Power (MW) Chapter 7 HVDC Cable Modelling accurately reproduce the DC voltage response and is adversely interacting with the DC braking resistors as shown in Figure P* 900 WF2 =1GW P* WF1 =1GW Time (s) P1-CEPIM P1-Bergeron P1-FDMM P1-FDPM P1-FDMM T=5Hz Figure 7.3: Onshore AC power response to windfarm power variations Vdc2-CEPIM Vdc2-Bergeron Vdc2-FDMM Vdc2-FDPM Time (s) Figure 7.4: DC voltage response at MMC2 for a DC line-to-line fault at the terminals of MMC Idc2-CEPIM Idc2-Bergeron Idc2-FDMM Idc2-FDPM Time (s) Figure 7.5: DC current response at MMC2 for a DC line-to-line fault at the terminals of MMC1 179

180 Voltage (kv) Power (MW) Chapter 7 HVDC Cable Modelling Time (s) P1-CEPIM P1-Bergeron P1-FDMM P1-FDPM Figure 7.6: AC power response at PCC1 for a three-phase line-to-ground fault at PCC Time (s) Vdc2-CEPIM Vdc2-Bergeron Vdc2-FDMM Vdc2-FDPM Figure 7.7: DC voltage response at MMC1 for a three-phase line-to-ground fault at PCC1 (CEPIM trace is behind FDMM and FDPM traces) Simulation Speed A three second simulation was performed for the four models using a 20µs time-step. The simulations were conducted on a Microsoft Windows 7 operating system with a 2.5GHz Intel core iq processor and 8GB of RAM, running on PSCAD X4. The simulation times for all three of the travelling wave models were approximately 260s, whilst the simulation time for the CEPIM was approximately 375s. This is predominately because the travelling wave models decouple the electric networks, which can result in reduced simulation times. 7.6 Conclusion The results presented in this chapter have shown that the choice of cable model can have a significant impact on the overall model s response for typical VSC-HVDC studies. The results have also shown that the travelling wave cable model s impact on the computational simulation time is insignificant, particularly when the overall model is 180

181 Chapter 7 HVDC Cable Modelling relatively complex. It is therefore recommended that the FDPM should be the default model of choice for typical VSC-HVDC studies. In the case of simple VSC-HVDC models, the choice of cable model may have a more significant impact on the computational simulation time. The FDMM may therefore be more suitable in this instance, providing that a very accurate representation of the DC cable dynamics is not required. The Bergeron model or the CEPIM can also be employed when computational simulation time is an issue and where accurate representation of the DC cable outside of the steady-state frequency of the cable, is not required. 181

182 Chapter 8 MTDC MMC Modelling 8 MTDC MMC Modelling At the time of writing almost all operational windfarms employing VSC-HVDC connections are point-to-point (radial). Numerous potential benefits have however been identified for interconnecting multiple offshore windfarms using HVDC cables (coordinated design). These benefits include a reduction in the volume of assets installed offshore and improved operational flexibility and network security [1]. The control of a MT DC system does however require additional levels of complexity in comparison to the control of a radial system. Numerous studies have been carried out to assess the performance of MTDC control strategies [ ]. These studies have however employed simplified MTDC system models, which cannot accurately represent the MMC dynamics and that may have an impact on the MTDC system s response to transient events, such as the loss of a converter. The simple models are also unable to simulate the MMC arm currents and SM capacitor voltages which are critical to ensuring that the converter is operating within safe limits during transient events. In this chapter a four-terminal high fidelity MTDC model for the connection of two 1GW Round 3 offshore windfarms is developed. This model is based on a potential scenario outlined in ODIS and it is used to investigate the performance of selected MTDC control strategies for different scenarios. 8.1 MTDC Test Topology National Grid has developed co-ordinated designs for large offshore windfarms, where a benefit can be identified. The primary areas of where the co-ordinated approach has been proposed are the Crown Estate Round 3 zones of the Firth of Forth, Dogger Bank, Hornsea, East Anglia and the Irish Sea. Figure 8.1 shows the offshore HVDC cable connections for Dogger Bank and Hornsea for one of the potential scenarios outlined by National Grid [130]. 182

183 Chapter 8 MTDC MMC Modelling Figure 8.1: Accelerated growth 2030 transmission system scenario potential connection diagram, modified from [9] The MTDC system topology used in this work for the investigation of MTDC control strategies is based upon a sub-section of this scenario. This topology represents a 1GW radial VSC-HVDC link between Dogger Bank and the north east of England, and a 1GW radial VSC-HVDC link between Hornsea and the east midlands, with a 1GW HVDC cable connecting the two offshore converters as shown in Figure 8.2. The HVDC cable lengths have been estimated from the information given in ODIS. VSC2 VSC1 200km N o rth E a s t E n g la n d 1 G W W in d fa rm - D o g g e r B a n k 130km S h o re A C G rid VSC3 VSC4 E a s t M id la n d s 125km 1 G W W in d fa rm - H o rn s e a Figure 8.2: MTDC test topology 183

184 Chapter 8 MTDC MMC Modelling 8.2 MTDC Control Methods In a point-to-point VSC-HVDC link employed for the connection of an offshore windfarm, the offshore converter controls the connected windfarm s AC voltage magnitude and frequency, and the onshore converter controls the DC link voltage, as discussed in Chapter 5. The converter controlling the DC link voltage is often referred to as the DC slack bus. In a MTDC network, such as the one shown in Figure 8.2, the offshore converters can be controlled in the same way as they are in a point-to-point link. The regulation of the DC link voltage for a MTDC system is however more complex than in a radial system. A review of MTDC control methods is given in [131, 132]. Generally speaking these methods can be categorised as centralised DC slack bus, voltage margin control, droop control or a combination of the aforementioned control methods. In this chapter these control methods are discussed with reference to the MTDC topology shown in Figure Centralised DC Slack Bus Employing a centralised DC slack bus, one of the onshore converters operates in DC voltage control (DC slack bus) whilst the other onshore converter operates in constant power control. The DC slack bus converter must therefore supply/absorb the deficit/surplus of active power to ensure that the DC voltage is regulated. If however, the required active power is outside of the DC slack bus converter s capability then it will no longer be able to control the DC voltage. The converter and its connected AC network must therefore be sufficiently rated to compensate for the total power variations of the other converters [127, 132]. Furthermore, in the event of a fault which diminishes the converter s power capability, the system may become unstable. It is for these reasons that a centralised DC slack bus is generally not considered suitable, especially for large MTDC systems Voltage Margin Control Applying the method of voltage margin control to the MTDC topology, one of the onshore converters operates as a DC slack bus whilst the other operates in what is referred to as voltage margin control. The voltage-current characteristics for the two converters are shown in Figure 8.3 and the implementation of the voltage margin controller used in this work is shown in Figure 8.4. The converter operating in voltage margin control effectively operates in constant power control providing that its local DC link voltage is within pre-set limits (V dc-low <V dc <V dc-high ). If the DC link voltage exceeds the pre-set limits then the 184

185 Chapter 8 MTDC MMC Modelling converter operates in DC link voltage control mode. This means that if the converter operating as the DC slack bus is unable to control the DC link voltage, the other onshore converter will take control. Voltage margin control therefore improves the reliability of the system in comparison to a centralised DC slack bus. There are however the following limitations of employing voltage margin control [131, 132]: Only one converter is responsible for regulating the DC voltage at a time. The voltage margin must be carefully selected to avoid undesirable interaction between the converters whilst minimising losses and maximising the systems VA rating. Transitions from one voltage level to another may occur abruptly leading to additional system stress. V dc V dc V dc * V dc-high V dc-low V I dc-min Rec 0 Inv Rec I dc * 0 I dc-max I dc-min Inv I dc-max Figure 8.3: Standard V dc -I dc characteristic; DC slack bus (Left) voltage margin control (Right) P* + - PI x(-1) V dc-low * + - PI I dmax x(-1) I d * d-axis current controller P V dc-high * + - PI V dc I dmin V dc Figure 8.4: Implementation of the voltage margin controller Droop Control Droop control can be employed to minimise some of the aforementioned limitations of voltage margin control. In droop control more than one converter is able to participate in regulating the DC voltage and therefore the burden of continuously balancing the system s power flow is not placed upon a single converter. A standard voltage-current droop 185

186 Chapter 8 MTDC MMC Modelling characteristic is shown in Figure 8.5. The gradient of the droop slope determines the converter s current response to a change in the DC voltage; the steeper the gradient the smaller the response. The converter operates in current limit mode when the DC voltage thresholds are reached. V dc V dc-high V dc-nl V dc-low I dc-min Rec 0 Inv I dc-max Figure 8.5: Standard V dc -I dc characteristic for voltage droop control The implementation of the droop controller used in this work is shown in Figure 8.6. Ideally the upper and lower voltage limits (V dc-high and V dc-low ) are very similar to the noload voltage, V dc-nl, however this requires large variations in the current controller s setpoint, I * d, for relatively small deviations in the DC link voltage. This is an issue because the high bandwidth current controller will respond abruptly to the switching noise in the DC voltage measurement. The droop gain therefore needs to be selected with care. I dmax V dc-nl + - K droop I d * d-axis current controller V dc I dmin Figure 8.6: Implementation of voltage droop controller The standard droop characteristic can be modified, so that the converter acts as a DC slack bus within pre-set voltage limits and then as a droop controller outside those voltage limits as shown in Figure 8.7. This type of droop controller is effectively a hybrid between a voltage margin controller and a standard droop controller. This type of characteristic is sometimes referred to as a voltage droop with dead band [131]. 186

187 Chapter 8 MTDC MMC Modelling V dc V dc-high V dc-low I dc-min Rec 0 Inv I dc-max Figure 8.7: V dc -I dc characteristic for voltage droop control with dead band Control Methods Investigated The onshore converters could operate in various control modes, including DC voltage control, constant power control, voltage margin control, standard DC droop control and voltage droop control with dead band. The only limitation is that at least one converter must regulate the DC voltage. A plethora of possible control options therefore exist. The centralised DC slack bus control, voltage margin control and droop control methods are investigated in this chapter with the control permutations shown in Table 8.1. Control Method MMC1 control mode MMC4 control mode Comments Centralised DC slack DC voltage & AC Active power & bus voltage magnitude reactive power P*=500MW Voltage margin control DC voltage & AC voltage magnitude Voltage margin & reactive power V dc-high =620kV, V dc- Low=580kV Droop control 8.3 MTDC System Model Standard droop & AC voltage magnitude Standard droop & reactive power Table 8.1: Control methods investigated Droop gain =- 0.1 The simplified system diagram for the MTDC model is shown in Figure 8.8. The structure, parameters and controls for the four MMCs, onshore AC networks, offshore AC networks and the DC cables are described in Chapter 4 and Chapter

188 Chapter 8 MTDC MMC Modelling 1000MW Windfarm1 X PCC2 T=15% 220kV 370kV I s2(abc) V s2(abc) Y g/d MMC2 I dc2 200km DC cable V dc2 R brak I dc1 MMC1 X T=15% 370kV 410kV D/Y g PCC1 I s1(abc) V s1(abc) Z n SCR=3.5 V n Active and reactive power control AC voltage magnitude and frequency control 130km DC cable 1000MW Windfarm2 X PCC3 T=15% 220kV 370kV I s3(abc) V s3(abc) Y g/d MMC3 I dc3 V dc3 R brak I dc4 MMC4 X T=15% 370kV 410kV D/Y g PCC4 I s4(abc) V s4(abc) Z n SCR=3.5 V n Active and reactive power control AC voltage magnitude and frequency control 125km DC cable Figure 8.8: MTDC test model Windfarm Power Variations At 1s both windfarms are each ordered to inject 500MW of active power. The power order for windfarm 2 is increased to 1GW at 2s and the power order for windfarm 1 is increased to 1GW at 3s. Figure 8.9 shows the system s response to the wind power variations when employing a centralised DC bus. MMC4 is operated in constant power control, with a power order of 500MW, and MMC1 is operated as the DC slack bus. At approximately 2s, the DC slack bus exports the increase in windfarm power to the onshore AC grid and therefore the DC voltage is maintained to close to its nominal value. At 3s, however, the DC slack bus is unable to export all of the additional increase in windfarm power due to the converter reaching its valve current limit. This results in a rise in the DC link voltage to approximately 1.1p.u. (660kV), at which point the DC braking resistors are activated to dissipate the excess wind energy. In order for the DC slack bus to regain control of the DC voltage, the power order for MMC4 must be increased or the windfarm power must be curtailed. The system s response for operating MMC4 in voltage margin control and MMC1 as a DC slack bus is shown in Figure The system s response to the increase in wind power at 2s is effectively the same as the system employing a centralised slack bus. This is because the DC slack bus is able to export the increase in wind power from windfarm 2 and therefore the upper voltage margin control limit is not reached. The upper voltage margin limit is however reached at approximately 3.2s due to the increase in wind power from 188

189 Chapter 8 MTDC MMC Modelling windfarm 1 and the inability of the DC slack bus to export it. This causes MMC4 to operate in DC voltage control as opposed to constant power control. The DC voltage control reference is equal to the upper voltage margin limit (620kV). This simulation result shows that the use of voltage margin control enables the DC link voltage to be controlled without the need for communications or the curtailment of wind power. Figure 8.11 shows the system s response to wind power variations when MMC1 and MMC4 are operating in standard droop control with the same droop characteristic. This figure shows that the onshore converters share the variations in wind power and therefore the burden of continuously balancing the system s power flow is placed on more than one converter. The droop controller is a proportional only controller and therefore some steadystate error is introduced in the DC voltage. This is a disadvantage in comparison to the centralised DC slack bus control strategy and the voltage margin control strategy (when operating within the pre-set voltage limits). The steady-state voltage error can however be minimised via modifying the droop characteristic via a dispatch centre. P* WF2 =1GW P* WF1 =1GW Figure 8.9: MTDC system response to windpower variations when employing a centralised DC slack bus ; x axis time(s) 189

190 Chapter 8 MTDC MMC Modelling P* WF2 =1GW P* WF1 =1GW Figure 8.10: MTDC system response to windpower variations when employing voltage margin control bus ; x axis time(s) P* WF2 =1GW P* WF1 =1GW Figure 8.11: MTDC system response to windpower variations when employing standard droop control bus ; x axis time(s) Three-phase Line-to-Ground Fault at PCC1 Windfarm 1 and windfarm 2 are ordered to inject 500MW and 1GW respectively. A threephase symmetrical fault is applied at PCC1 (Figure 8.8) for 140ms starting at 2s. MMC1 is therefore unable to export any significant quantity of active power during the fault. 190

191 Chapter 8 MTDC MMC Modelling The system s responses to this fault for centralised DC bus control, voltage margin control and droop control are shown in Figure 8.12, Figure 8.13 and Figure 8.14 respectively. These figures show that the three control strategies are able to ride-through the fault in compliance with the GB grid code and without exceeding the maximum instantaneous arm current limit of 3kA or the maximum SM overvoltage limit of 27kV. The system s response to the fault does however differ depending on the control strategy employed. During the fault for the system employing the DC centralised bus, there is a surplus of approximately 1GW which must be dissipated by the DC braking resistor to prevent uncontrollable DC voltage rise. When employing voltage margin control or droop control, MMC4 increases its exported power in response to the increase in DC link voltage. The surplus of active power is therefore reduced to approximately 500MW, which again is dissipated by the DC braking resistor. If the total windfarm power was within the power capability of MMC4 ( 1GW), then the DC voltage could be controlled without the use of the DC braking resistor when employing either voltage margin control or droop control. Comparing Figure 8.13 and Figure 8.14, it is clear that the power response upon fault clearance is more oscillatory for voltage margin control than for droop control. 191

192 Chapter 8 MTDC MMC Modelling Figure 8.12: MTDC system response to a three-phase to ground fault when employing a centralised DC slack bus ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 192

193 Chapter 8 MTDC MMC Modelling Figure 8.13: MTDC system response to a three-phase to ground fault when employing voltage margin control ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 193

194 Chapter 8 MTDC MMC Modelling Figure 8.14: MTDC system response to a three-phase to ground fault when employing standard droop control ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) The phase A upper arm current waveforms from Figure 8.12-Figure 8.14 are plotted on the same graph in Figure This figure shows the significant impact that the MTDC control methods can have on the converter s arm currents. Table 8.2 shows that the maximum current value experienced by the converter arm when employing DC slack bus control is 75% higher than for droop control. This result highlights the importance of modelling MMC converters in detail when comparing MT control methods. 194

195 Current (ka) Chapter 8 MTDC MMC Modelling Droop Margin Slack Time (s) Figure 8.15: Impact of MTDC control methods on the upper arm current for phase A of MMC1 for a three-phase to ground fault Converter Disconnection Indices Droop Margin Slack I ua max (ka) Ratio I ua rms (ka) Ratio Table 8.2: Maximum and rms values for Figure In this section, the control strategies responses to the disconnection of an offshore converter and an onshore converter are investigated. The power order for windfarm 1 and windfarm 2 are 1GW and 500MW respectively. At 2s MMC3 is blocked and at 3s MMC1 is blocked. Their AC circuit breakers are tripped three cycles after their respective blocking commands. The system s response for a centralised DC bus, voltage margin control and droop control are shown in Figure 8.16, Figure 8.17 and Figure 8.18 respectively. 195

196 Chapter 8 MTDC MMC Modelling Figure 8.16: MTDC response for MMC3 disconnected at approximately 2s and for MMC1 disconnected at approximately 3s when employing a centralised DC slack bus ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 196

197 Chapter 8 MTDC MMC Modelling Figure 8.17: MTDC response for MMC3 disconnected at approximately 2s and for MMC1 disconnected at approximately 3s when employing voltage margin control ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 197

198 Chapter 8 MTDC MMC Modelling Figure 8.18: MTDC response for MMC3 disconnected at approximately 2s and for MMC1 disconnected at approximately 3s when employing standard droop control ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) The centralised DC slack bus is able to satisfactorily maintain control of the DC voltage during the disconnection of the offshore converter (MMC3); however, the DC voltage becomes uncontrollable when the onshore converter (MMC1), which is operating as the DC slack bus, is disconnected. The voltage margin control method and the droop control method maintain satisfactory control of the DC voltage for the disconnection of MMC3 and MMC1. The active power response and DC voltage response for the disconnection of 198

199 Chapter 8 MTDC MMC Modelling MMC1 and MMC3 is more oscillatory for the voltage margin controller than for the droop line controller. 8.4 Conclusion In this chapter a MTDC topology based on a segment of a potential connection diagram for the UK s Round 3 windfarms, as outlined in National Grid s 10 year statement, has been developed. The performance of three MTDC control methods, namely, centralised DC slack bus, voltage margin control and droop control, were investigated using a detailed MTDC system model. The controllers response to wind power variations, onshore AC faults and the disconnection of an offshore and an onshore converter were simulated. The simulation results show that the use of a DC centralised bus is not suitable for MTDC systems as the DC voltage becomes uncontrollable if the imbalance in active power is outside of the power capability of the DC slack bus, or if the slack bus converter is disconnected from the system. The voltage margin control method and the droop control method were shown to be able to respond to variations in wind power, to ride-through close-up three-phase AC faults in compliance with the GB grid code, and to maintain grid stability after the disconnection of a converter without exceeding the converter ratings. The droop controller shares power flow more evenly than the voltage margin controller and its response to transient events was shown to be less oscillatory with lower arm currents. The simulation results in this chapter therefore show that the droop controller offers the best overall performance. A key contribution of this chapter was to show that the MT control systems can have a significant impact on the internal MMC quantities, which highlights the importance of high fidelity MMC models when comparing MT control methods. 199

200 Chapter 9 Conclusion and Future Work 9 Conclusion and Future Work 9.1 Conclusion This thesis identified factors which may have a negative impact on the reliability of VSC- HVDC systems and which therefore required further research. These factors broadly fit into three categories; availability analysis, HVDC protection and VSC-HVDC system modelling. To address these factors, the following objectives were identified: 1. Conduct an availability study for a radial VSC-HVDC system and identify the key components which affect the system s overall availability. 2. Identify the key issues in the development of a HVDC breaker and present potential solutions. 3. Develop a high fidelity EMT model of a radial VSC-HVDC system employed for the connection of a typical Round 3 windfarm and compare the leading MMC modelling techniques. 4. Develop a high fidelity EMT model of a MT VSC-HVDC system employed for the connection of a typical Round 3 windfarm and compare the leading cable modelling techniques. All objectives have been met in this thesis, and in some areas further work has been undertaken. The following sub-sections provide further details of the conclusions made in the three main areas Availability Analysis The expected availability of the VSC-HVDC systems which connect the Round 3 offshore windfarms is a key factor in determining if the Round 3 windfarms are technically and economically viable. However, at the time of investigation there were no publications which estimated the expected availability of these systems. In this thesis an availability model of a radial VSC-HVDC system for the connection of a typical Round 3 windfarm was developed and analysed using reliability indices derived from academic papers and industrial documentation. The analysis of this model showed 200

201 Chapter 9 Conclusion and Future Work that the energy availability of the system due to forced outages was approximately 96.5%. It also revealed that the DC submarine cable has the greatest impact on the availability of the transmission scheme, which highlights the importance of protecting the DC cables. An availability model for a MTDC network was also developed and analysed for different levels of additional capacity in the transmission paths back to shore. This analysis showed that the availability of the MTDC network is highly dependent upon the rating of the network s paths back to shore and that grids with additional capacity had a higher availability than equivalent radial systems. Furthermore, a cost-benefit analysis was conducted that showed that the HVDC grids with additional capacity could provide a more cost-effective solution for the connection of offshore windfarms due to the improved energy availability figures. This work was published at an international conference and has contributed to Cigre Working Group B4-60 Designing HVDC Grids for Optimal Reliability and Availability Performance. The reliability indices for the VSC-HVDC components derived in this thesis have also been published in: G. Migliavacca Advanced Technologies for Future Transmission Grids, Springer, HVDC Protection In order for a large HVDC grid to be technically and commercially viable, the ability to isolate parts of the grid due to a fault, or to perform maintenance without de-energising the entire grid, must be achieved. This requires HVDC circuit breakers; however at the time of investigation these were not commercially available. In this thesis the requirements for a HVDC circuit breaker have been identified and potential breaker topologies, including one developed as part of this thesis, have been described and compared. The comparative analysis concluded that arc-less hybrid circuit breakers with an auxiliary circuit breaker are the most suitable type of HVDC circuit breaker for the protection of a HVDC grid. This is predominantly due to their ability to achieve the best balance between operation speed and on-state losses. This type of circuit breaker is being developed commercially and is expected to be available for order in the next one to three years, with delivery in the next five years. This thesis also outlined the key requirements of a DC cable protection system for a HVDC grid and reviewed potential protection strategies to identify and locate a faulty 201

202 Chapter 9 Conclusion and Future Work cable. The review concluded that a protection strategy will most likely be developed based on a combination of traditional techniques used in conjunction with modern techniques for optimum detection and selection. This work resulted in a UK patent application being filed for a hybrid HVDC breaker and has enabled contributions to be made to Cigre Working Group B4-57 Guide for the Development of Models for HVDC Converters in a HVDC Grid. This work has also led to further work being funded (two PhD students) by National Grid, DC Circuit Breaker Technologies ( ) VSC-HVDC System Modelling Simulation models are a vital tool in the research and development of VSC-HVDC systems. Highly accurate models are required in order to give a high degree of confidence in the simulation results and to therefore ensure that the system operates in the expected way. The use of MMC converters in VSC-HVDC systems has presented a number of modelling challenges. Applying traditional modelling techniques to MMC VSC-HVDC systems is computationally intensive and virtually unmanageable in many cases, which has led to the development of new modelling techniques. The published literature validating these techniques are, however, very limited in some areas, and non-existent in others. In this thesis, the three leading detailed MMC modelling techniques, the TDM, the DEM and the AM, were compared in terms of their accuracy and simulation speed. An MMC VSC-HVDC test simulation model was developed in PSCAD for this study. The study found that both the AM and DEM modelling techniques offer a good level of accuracy but that the DEM is generally more accurate than the AM. The AM and DEM models were also shown to simulate significantly faster than the TDM, and the DEM was found to be more computationally efficient than the AM. Furthermore, the AM model was found to have limited performance for certain conditions when the converter is blocked and it was also shown that by modifying the original AM the simulation run time could be improved. The findings of this study were used to propose a set of modelling recommendations which offer technical guidance on the state-of-the-art of detailed MMC modelling. The EMT simulation model for the comparison of MMC modelling techniques was developed further using the DEM modelling technique to produce a detailed EMT model 202

203 Chapter 9 Conclusion and Future Work for a radial VSC-HVDC link for the connection of a typical Round 3 windfarm. Another radial model was also developed for the interconnection of two active networks. The simulation results produced by these models were verified against the theory outlined in the thesis. These models thus provide a high fidelity version of a component level MMC model with detailed parameters and control and can therefore act as a benchmark for lower fidelity models. As an example, the detailed MMC-HVDC model developed in this thesis was used for the verification of an averaged value VSC-HVDC model, which enabled this lower fidelity model to be used for a comprehensive investigation into the limitations imposed on active power controllers. MMC VSC-HVDC systems are set to become a key component of the UK s power system and their ability to ride-through AC system faults is therefore of great importance, however publications in this area were found to be very limited. The models developed in this thesis were used to investigate the links ability to meet the GB grid code requirements for disturbances in the AC grid. The results show that for the tests conducted the models were able to meet AC fault ride-through requirements and reactive power requirements, as well as to comply with the IEEE 519 THD voltage harmonic limits. Furthermore, the results showed that the use of a variable limit DC link voltage controller, proposed as part of this thesis, can improve the system s fault recovery response. The differences between the control and protection of the interconnector, in comparison to the link employed for the connection of a windfarm, were also highlighted. The potential development of HVDC grids has led to the need to produce highly accurate EMT grid models which are valid for a range of studies. The issue of accuracy vs. computational efficiency is of greater concern for grids than radial systems, due to the increased size of the model. In addition to the MMC models, cable models are the other main DC component which may have a significant impact on the overall model s simulation results and simulation time. The fidelity of cable models is of particular importance for HVDC grids due to the need to locate the faulty section of the grid within approximately 1-2ms, which requires accurate representation of the DC quantities. Publications regarding the impact of different cable models in terms of their accuracy and speed for typical VSC-HVDC studies are however very limited. In this thesis a four-terminal EMT VSC-HVDC model was developed based on a subsection of a potential scenario outlined in National Grid s 10 year statement. This 203

204 Chapter 9 Conclusion and Future Work model was used to compare a coupled equivalent PI model, Bergeron model, frequency dependent mode model and a frequency dependent phase model in terms of their accuracy and simulation speed for a wide range of studies. The results showed that the choice of cable model can have a significant impact on the overall model s response for typical VSC-HVDC studies and that the traveling wave cable model s impact on the computational simulation time is insignificant, particularly when the overall model is relatively complex. The findings of this study were used to propose a set of modelling recommendations which offer technical guidance on HVDC cable modelling. Numerous studies have been carried out to assess the performance of MTDC control strategies. These studies have however employed simplified MTDC system models, which cannot accurately represent the MMC dynamics and which may have an impact on the MTDC system s response to transient events, such as the loss of a converter. The simplified models are also unable to simulate the MMC arm currents and SM capacitor voltages which are critical in ensuring that the converter is operating within safe limits during transient events. The performance of three MTDC control methods, namely, centralised DC slack bus, voltage margin control and droop control, were investigated using the developed detailed MTDC system model for a range of studies. The key contribution of this work was to show that the MT control systems can have a significant impact on the internal MMC quantities, which highlights the importance of high fidelity MMC models when comparing MT control methods. This work resulted in two journal papers and the publication of two international conference papers and has enabled contributions to be made to Cigre Working Group B4-57 Guide for the Development of Models for HVDC Converters in a HVDC Grid. 9.2 Future Work Recommendations for future work in the three main areas investigated in this thesis are presented in the following subsections. This work could potentially improve the reliability of VSC-HVDC systems Availability Analysis Availability analysis, independent of methodology, can only ever be as good as the input data. Unfortunately there are no true failure statistics for VSC-HVDC components available in the public domain and therefore many of the reliability indices used for this 204

205 Chapter 9 Conclusion and Future Work thesis were estimated based on data from LCC-HVDC schemes. However, the author understands that the VSC-HVDC owners are now beginning to report failure statistics to the Cigre World HVDC reliability survey. It would therefore be very useful to repeat these studies using this data once it is available in the public domain. Variations in wind energy were not taken into consideration for the availability analysis contained in this thesis. The amount and location of the input energy for a HVDC grid is a key factor in determining the actual amount of energy lost due to a system failure. Incorporating the variations in wind farm energy into the availability analysis would be a useful contribution to the field HVDC Breakers In this thesis a review of HVDC circuit breakers was carried out and a patent application for an arc-less hybrid breaker with auxiliary switch was filed. The review concluded that arc-less hybrid circuit breakers with an auxiliary circuit breaker are currently the most suitable type of HVDC circuit breaker for the protection of a HVDC grid and that this type of breaker is likely to be commercially available for order in the next one to three years. The key component which determines the breaking time for this type of breaker is the opening speed of the fast mechanical switch. However, the performance of mechanical switches received little attention in this thesis due to the lack of publications in this area. Further research into the state-of-the-art of mechanical switches and their limitations is therefore required. One of the key parameters which determines how fast the circuit breaker is required to open is the fault current rate of rise. Increasing the values of DC reactance and installing other fault current limiting devices, such as superconducting fault current limiters, can reduce the fault current rate of rise. However, the potential implications that the DC reactance value and fault current limiting devices can have on system stability and breaker footprint are not well documented and therefore further research is required. This thesis reviewed potential protection strategies for the protection of a HVDC grid. It concluded that although some good preliminary research has been carried out substantially more is required before a HVDC protection strategy could demonstrate all of the necessary requirements. 205

206 Chapter 9 Conclusion and Future Work MMC Modelling The focus of this thesis has been on the MMC-HVDC system and therefore high fidelity models of the converters and the DC system have been developed. However for a more complete model, the simplified models for the AC systems could be replaced with more detailed models. Further work to incorporate more detailed models of the windfarm, AC system and transformer would be a useful contribution. Incorporating such models is likely to result in impractical simulation durations and therefore the use of variable rate and hybrid simulation packages could be investigated. Results presented in this thesis showed that the MT control methods can have a significant influence on the internal MMC quantities and thus showed the importance of detailed MMC models, even when comparing the performance of slower outer loop controllers. However, producing high fidelity MMC models for every converter in a large HVDC grid would result in lengthy simulation durations. Further work could be conducted to investigate the necessary level of converter fidelity for each converter in the grid, depending upon the converter location and the type of study. This work could lead to a set of MTDC modelling recommendations being produced. 206

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214 Chapter 10 References [151] D. Jovcic. (April 2014). Research Council Sponsored Projects. Available: [152] D. Jovcic and B. T. Ooi, "Theoretical aspects of fault isolation on high-power DC lines using resonant DC/DC converters," IET Generation, Transmission and Distribution, [153] V. Lescale, "High Voltage Direct Current Circuit Breaker Arrangement and Method," Patent publication No: WO Filed: November 2008, Published: June [154] U. Astrom, L. Liljestrand, V. Lescale, and M. Man, "A DC Current Breaker," Patent publication No:WO , Filed: June 2008, Published: December [155] G. Asplund, V. Lescale, and C. Solver, "Direct-Current Breaker for High Power for Connection into a Direct-Current Carrying High-Voltage Line," Patent publication No: , Filed: December 1994, Published: May [156] Crown Estate. (May 2011). Round 3 offshore wind farms - Interactive map. Available: [157] G. Bianchi and G. Luoni, "Induced Currents and Losses in Single-Core Submarine Cables," Power Apparatus and Systems, IEEE Transactions on [158] PSCAD, "Ground Plane," On-line help. [159] PSCAD, "Frequency Dependent Line Models," On-line help. 214

215 Appendices A. APPENDICES 215

216 Appendix 1A APPENDIX 1A HVDC TRANSMISSION SYSTEMS 1 HVAC vs. HVDC for Offshore Wind Wind turbines typically generate power at a voltage of up to 1kV AC [133]. A transformer located either in the nacelle, or at the bottom of the tower, steps the voltage up to either 11kV or 33kV [133]. The power from the wind turbines is transmitted to an offshore substation which increases the voltage for transmission to shore. In a HVAC transmission system a typical transmission voltage to shore is 132kV, which can be connected directly to the electricity grid or stepped-up at an onshore substation if it is to be connected at 400kV. Alternatively the AC voltage can be converted to DC by a HVDC converter on the offshore platform and then converted back to AC by a HVDC converter located onshore. Figure A.1 shows a typical HVDC and HVAC connection. Shore AC Rectifier R1 DC Inverter I1 AC Wind Farm 1 AC AC Wind Farm 2 Figure A.1: Overview of a HVDC connection and a HVAC connection A HVDC transmission system typically has much higher investment costs in comparison to a HVAC transmission system, due to the converters. However there are a number of scenarios where HVDC is chosen for technical and/or financial reasons. These include, connecting asynchronous grids, bulk power transmission through a long distance transmission line, bulk power transmission via a submarine cable over a certain length and for other technical advantages such as improved AC system stability. Offshore windfarms are connected to the AC grid using a submarine cable, not a transmission line. The capacitance of a cable is much greater than that of an equivalent line, due to the proximity of the conductor to the grounded sheath and the insulating medium. In an AC system the cable s capacitance must be charged and discharged every 216

217 Appendix 1A cycle, which constitutes a capacitive current flowing through the cable. This capacitive current consumes a proportion of the cable s overall current carrying capability and therefore reduces the cable s useful power transfer capability. However, in a HVDC system once the cable s capacitance is charged, almost the entire capacity is available for active power transmission. Thus VSC-HVDC is typically employed for windfarms located more than km from shore [5]. 2 HVDC Converter Technology A HVDC converter is capable of rectifying AC to DC and inverting DC to AC. The converter must instantaneously match the AC and DC side voltages for stable operation [134]. This is achieved by adding some impedance to the switching circuit to absorb the instantaneous mismatch in AC and DC voltage levels. If this impedance is located exclusively on the AC side, the instantaneous DC voltage is transferred to the AC side and therefore the DC side acts as a voltage source. This type of converter is referred to as a Voltage Source Converter (VSC). If a large smoothing reactor is located exclusively on the DC side, the instantaneous AC voltage is transferred to the DC side, which results in constant pulses of DC current and therefore the DC side acts as a current source. This type of converter is referred to as a Current Source Converter (CSC). CSC-HVDC is based on thyristor technology. Thyristors can be switched-on by issuing a control signal, but can only be switched-off once the current flowing through the thyristors ceases. It is for this reason CSC-HVDC requires a strong AC voltage source to commutate the current between the valves (string of thyristors) in the converter. Therefore the CSC- HVDC converter is also a Line Commuted Converter (LCC) and is sometimes referred to as LCC-HVDC. VSC-HVDC can self-commutate current between the converter valves because the valves consist of IGBTs, which have turn-off capability. Therefore the VSC- HVDC converter is also classified as a Self-commutated Converter (SCC) and maybe referred to as SCC-HVDC although this is not commonly used. 2.1 CSC-HVDC There are several different CSC-HVDC transmission scheme configurations. One of the most common schemes is the monopole HVDC scheme with metallic return as shown in Figure A

218 Appendix 1A DC Smoothing Reactor Transmission Line I dc AC Network 1 AC Network 2 V dcr V dci 6-Pulse Bridge 3-Winding Star/ Star, Star/Delta Transformer I dc Metallic Return Figure A.2: CSC-HVDC monopole scheme with metallic return The heart of the scheme is the six-pulse bridge, or Graetz bridge as it is sometimes known. The six-pulse bridge consists of six valves. Each valve contains a number of seriesconnected thyristors, as shown in Figure A.3. The number of thyristors in each valve is dependent upon the voltage the valve is required to block. V L d I dc Anode I 1 I 3 I 5 T 1 T 3 T 5 V a V b V dc V c T 4 T 6 T 2 I 4 I 6 I 2 I dc Cathode Figure A.3: Six-pulse converter 218

219 Appendix 1A A thyristor is turned-on by issuing a control signal to energise the thyristor s gate terminal when the thyristor is forward biased. The thyristor is turned-off when the external circuit forces the current flowing in the thyristor through zero. The firing angle, also referred to as alpha, is the delay measured in electrical degrees from when the thyristor is forward biased until the gate terminal is energised. A thyristor is essentially a diode if the firing angle is zero degrees. Vdc-a(Blue),Vdc -c(green) and Vdc (Red) against time Voltage T1&T6 T1&T2 T3&T2 T3&T4 T5&T4 T5&T6 T1 T3 T5 T2 T4 T6 Va(Blue),Vb(Green) and Vc(Red) against time Voltage I1(Blue),I3(Green) and I5(Red) against time Current T1 T3 T5 T1 I2(Blue),I4 (Green) and I6(Red) against time Current T6 T2 T4 T6 Time Figure A.4: PSCAD simulation of CSC converter switching waveforms for a firing angle of 0 - indicative waveforms shown, each valve conduction pulse is 120. The waveforms shown in Figure A.4 are for a six-pulse converter with a firing angle of 0. The anode voltage, V dc-a, is the voltage transferred from the AC side, when valves T1, T3 and T5 conduct. Comparing V dc-a, with the phase voltages in the second plot, it can be seen that V c is transferred to V dc-a until V a exceeds V c and then T1 conducts resulting in V a being transferred to V dc-a. The cathode voltage, V dc-c, is the voltage transferred from the AC side when valves T2, T4 and T6 conduct. In this case when the phase voltage is more negative than V dc-c, the valve connected to that phase will conduct. The voltage V dc, is the potential difference between V dc-a and V dc-c. Therefore V dc has a mean voltage of twice V dca, with half the amplitude ripple, at six times the supply frequency. The two bottom plots in 219

220 Appendix 1A Figure A.4 show that when a valve conducts, a constant pulse of current flows due to the large DC smoothing reactor. Each valve conducts for 120 per cycle. The effect of increasing the firing angle is shown in Figure A.5. After a particular phase voltage exceeds the anode voltage there is a delay, in this case 25 or 1.4ms for a 50Hz system, before the valve is fired. This delay causes the DC voltage to decrease and the fundamental phase current to lag the fundamental phase voltage, which results in the converter absorbing reactive power. Vdc-a(Blue),Vdc -c(green) and Vdc (Red) against time Voltage T1&T6 T1&T2 T3&T2 T3&T4 T5&T4 T5&T6 T1 T3 T5 α T2 T4 T6 Va(Blue),Vb(Green) and Vc(Red) against time Voltage I1(Blue),I3(Green) and I5(Red) against time Current T1 T3 T5 T1 I2(Blue),I4 (Green) and I6(Red) against time Current T6 T2 T4 T6 Time Figure A.5: PSCAD simulation of CSC converter switching waveforms for a firing angle of 25 - indicative waveforms shown, each valve conduction pulse is 120. The average DC voltage for the converter is calculated from equation (A.1). V dc 3 2V LL cos( ) (A.1) 220

221 Appendix 1A where: VLL - rms valve line-to-line voltage α firing angle Increasing the firing angle decreases the DC voltage. A firing angle between 0 and 90 results in a positive DC voltage and the converter operating as a rectifier. Increasing the firing angle above 90 results in a negative DC voltage and the converter operating as an inverter. Current can only flow in one direction in a CSC-HVDC scheme. At the rectifier, power is being transferred from the AC side to the DC side (P=V dcr.i dc ) and at the inverter power is transferred from the DC side to the AC side (P=-V dci.i dc ). Therefore power reversal is achieved by changing the voltage polarity at each converter. XLPE cable is not suitable for polarity reversal, due to space charge formation, and therefore massimpregnated cable is used. For more information on space charge formation see [135] The bottom two plots in Figure A.4 and Figure A.5 show that the line current appears to be able to commutate between valves instantaneously. This is because there is no reactance on the AC side in this simulation, as shown in Figure A.3, however in reality there will be some reactance on the AC side not least to limit the valve current during a fault. The most common and predominate source of AC side reactance is leakage reactance from the converter transformer. The leakage reactance reduces the rate of change for the current commutating from one valve to the next, which in the absence of AC side reactance is infinite. The time it takes for the current to commutate from one valve to the next is known as the commutation overlap, µ, and is usually defined in degrees. The commutation overlap reduces the DC voltage, as shown in Figure A.6 and described by the modified mean voltage equation (A.2). where: X c - commutation reactance V dc 3 2V LL 3XI c dc cos( ) (A.2) 221

222 Appendix 1A Vdc-a(Blue),Vdc -c(green) and Vdc (Red) against time Voltage µ I1(Blue),I3(Green) and I5(Red) against time Current Time Figure A.6: PSCAD simulation of switching waveforms for CSC converter with AC side reactance and firing angle of 0 - indicative waveforms shown, each valve conduction pulse is 120. The relationship between the firing angle and commutation overlap on the amount of reactive power the converter absorbs may be described by the Uhlmann approximation given in [30, 134] and shown in equation (A.3). P cos 0.5cos( ) cos( ) (A.3) S This approximation shows that increasing the firing angle, and/or increasing the commutation overlap, results in the converter absorbing more reactive power. A converter operating as an inverter has a large firing angle (>90 ) and it is more common to refer to the extinction angle or gamma, γ, which is mathematically expressed as 180. Therefore the Uhlmann approximation can be re-written for an inverter as in equation (A.4). P cos 0.5cos( ) cos( ) (A.4) S The HVDC scheme controls the active power by essentially controlling the voltage drop across the transmission line/cable. The firing angle affects the voltage drop across the transmission cable and the amount of reactive power the converter absorbs. Therefore, the converter cannot control active and reactive power independently. The reactive power the converter typically absorbs is 60% of the active power [134]. Shunt capacitance, along 222

223 Appendix 1A with AC harmonic filters, are normally required to supply the converter s reactive power requirements. A CSC-HVDC converter, as shown in Figure A.2, contains two six-pulse bridges connected in series on the DC side. The reason for doing this is to reduce the harmonics which are generated by the converter. As shown in the previous section the six-pulse bridge conducts rectangular pulses of current (no leakage reactance) which means the phase current is very non-sinusoidal and therefore has a high harmonic content. In order to reduce the harmonic content, two six-pulse bridges are typically connected in series on the DC side, with one bridge connected to the AC source using a star/star transformer and the other using a star/delta transformer. The effect of the star/delta transformer is that one sixpulse bridge conducts current pulses which are shifted by 30 from the other six-pulse bridge, resulting in phase currents which are more sinusoidal. This is shown in Figure A.7. Figure A.7: PSCAD simulation of phase current for six-pulse converter (left) and twelve-pulse converter (right) Figure A.7 shows that a twelve-pulse converter produces a more sinusoidal phase current in comparison to a six-pulse converter and therefore reduces AC side harmonics. A twelvepulse converter also reduces the DC side harmonics because the ripple voltage is twelve times the fundamental frequency, in comparison to six times the fundamental frequency for a six-pulse converter. Although a twelve-pulse converter improves harmonic content in comparison to a six-pulse converter, it does not reduce the AC and DC side harmonic content to within acceptable levels. Therefore harmonic filters are required. The AC side harmonic filters are tuned at the 11 th and 13 th harmonic with an extra high-pass branch added and typically tuned at the 24 th harmonic [134]. The AC side harmonic filters are also designed to provide reactive power compensation for the converter. The DC side generally has a high-pass filter tuned at the 12 th harmonic [134]. The AC harmonic filters, shunt capacitor bank and the associated AC switchyard account for a large proportion (40-60%) of the overall space required for a CSC-HVDC scheme 223

224 Appendix 1A [111]. The footprint for a typical 1000MW CSC station located onshore is 200m x 175m x 22m with an indicative cost of about 100m [111] 28. Thus the disadvantages of a CSC-HVDC scheme are: LCC requires a strong AC system for stable operation Cannot control active and reactive power independently Large footprint Requires the more expensive and heavier mass-impregnated cable [111] Multi-terminal operation is technically challenging due to the change of DC voltage polarity for power reversal [134] 2.2 VSC-HVDC ABB pioneered VSC-HVDC technology and introduced its 1 st generation of VSC-HVDC technology in 1997, known as HVDC Light. Currently the 3 rd and 4 th generation of HVDC Light is available. Siemens have developed their VSC-HVDC technology under the trade name of HVDC Plus, whilst Alstom Grid has developed its VSC-HVDC technology called HVDC MaxSine. A single line diagram for a typical VSC-HVDC scheme is shown in Figure A.8. Transmission Line I dc AC Network 1 AC Network 2 V dcr V dci I dc Metallic Return Figure A.8: VSC-HVDC scheme As with CSC-HVDC, the converter is the heart of the scheme. There are several VSC converter topologies available. The simplest VSC-HVDC converter is a two-level converter, which is the converter topology used in the 1 st and 3 rd generations of HVDC Light. This converter topology will be used to explain the fundamental principles of VSC- HVDC. A three-phase two-level VSC is shown in Figure A Cost is indicative for a 1000MW, 400kV converter station. 224

225 Appendix 1A +V dc /2 Valve V a V b V c X V sa V sb V sc -V dc /2 Figure A.9: Three-phase two-level voltage source converter Each valve consists of a stack of series and parallel connected Insulated Gate Bipolar Transistors (IGBT) with anti-parallel diodes. The number of devices connected in series and parallel depends upon the voltage and current rating of the valve respectively. Consider the phase A converter voltage, V a. This voltage has two possible values +V dc /2 when the upper valve conducts and V dc /2 when the lower valve conducts. The same applies for the phase converter voltage B, V b, and phase converter voltage C, V c. By applying a Pulse Width Modulation (PWM) control scheme to the converter a sinusoidal voltage of the desired magnitude and phase can be synthesized as shown in Figure A.10. Figure A.10: Sinusoidal voltage synthesised from a two-level converter with PWM (modified from [28]); V d =V dc. The quality of the sinewave synthesised, and therefore the harmonic content as well as the converter losses, is dependent upon the PWM switching frequency. Increasing the switching frequency produces a better quality sinewave and therefore reduces the AC and DC harmonic content but at the expense of increasing the converter losses. The first generation of HVDC Light utilised a switching frequency of 1950Hz [134]. The high switching frequency normally removes the low-order harmonics and therefore filters are 225

226 Appendix 1A only required to absorb the higher harmonics. This greatly reduces the VSC-HVDC footprint in comparison to a CSC-HVDC scheme. Power transfer between the inverter and the AC system for phase A can be described by equations (A.5) and (A.6). VV sa a sin P (A.5) X Vsa ( Va cos Vsa ) Q (A.6) X Active power flows from the inverter into the AC network when the inverter power angle, is positive with respect to that of the AC system. Therefore active power flows from the AC network when the inverter power angle is negative with respect to that of the AC system. The inverter exports reactive power when its voltage magnitude is greater than the AC system and absorbs reactive power when its magnitude if less than the AC system. Since the VSC can control its voltage magnitude and phase independently, it is able to control active and reactive power independently. This is a key advantage over CSC- HVDC. A VSC-HVDC scheme can offer fast reactive power support for the connected AC systems and does not require shunt capacitor banks which further reduces its footprint. The typical footprint for an onshore 1000MW VSC is about 90m x54m x 24m [111]. Power flow reversal in a VSC-HVDC scheme is achieved by reversing the direction of current, not the DC voltage polarity as is the case for CSC-HVDC. This means that the cheaper, lighter and more robust XLPE cable is suitable for VSC-HVDC schemes. The absence of DC voltage polarity reversal also makes MT operation much less challenging. The VSC is a self-commutated converter and therefore does not require an AC voltage source for commutation. It can therefore maintain stable operation when connected to a weak AC system, such as an offshore windfarm. Also CSC converters are generally more expensive than VSC due to their reactive power and harmonic filtering requirements [136]. However, at present VSC schemes have been installed at lower power ratings than CSC and therefore have been more expensive in terms of capital costs per unit of power. ABB modified its converter design from a two-level converter to a three-level diode Neutral Point Clamped (NPC) VSC in their 2 nd generation, as shown in Figure A

227 Appendix 1A +V dc /2 Valve1 Valve2 V a Valve3 -V dc /2 Valve4 Figure A.11: Single phase of a diode neutral clamped voltage source converter The output voltage from the converter is +V dc /2 when the two upper valves (1 and 2) conduct and -V dc /2 when the lower two valves conduct (3 and 4). The NPC can also output 0V when the middle valves (2 and 3) conduct. Positive current flows through the additional upper anti-parallel diode and the upper middle IGBT into the AC network; negative current flows through the lower middle IGBT and the lower additional anti-parallel diode. The sinewave synthesised by this type of converter is shown in Figure A.12. Figure A.12: Sinusoidal voltage synthesised from a three-level converter with PWM (modified from [28]); V d =V dc. The NPC VSC switches between the positive or negative DC link voltage and zero, which halves the dv/dt in comparison to a two-level converter. From the perspective of harmonic content, the effective switching frequency has doubled in comparison to a two-level converter. This allows the switching frequency to be reduced, which decreases converter losses without adversely impacting on the converter output harmonics. The NPC converter topology was used for a back-to back VSC-HVDC scheme in the year 2000 [33]. 227

228 Appendix 1A The NPC converter suffers with unequal distribution of semi-conductor losses [137], due to some of the valves being utilised more than others, leading to said valves experiencing higher junction temperatures. The converter is switching its output voltage between 0V and +V dc /2 for the first half cycle. Providing the inverter is operating at unity power factor, valve 2 will conduct the phase current for the entire half-cycle and valve 1 will conduct the phase current for only a high majority of the half-cycle. Therefore valve 1 will have slightly less conduction losses than valve 2. However, valve 1 also experiences switching losses, which in [137] resulted in the overall losses for valve 1 being approximately double that of valve 2. Since losses are related to switching frequency and phase current, the most stressed valve will limit the permissible phase current and switching frequency for the converter. The NPC VSC can also suffer from valve voltage imbalance, which under certain conditions may cause valves 2 and 3 to experience higher voltages than valves 1 and 4 [138]. These issues may be overcome by using an Active Neutral Point Clamped (ANPC) VSC [137, 138]. The ANPC VSC is a NPC VSC with the addition of an active switch connected in antiparallel with the NPC diodes, as shown in Figure A.13. The addition of the active switches gives more switching states which allows the losses to be distributed more evenly. As an example, for the NPC VSC to go from +V dc /2 to 0V valve 1 must turn-off, whereas the ANPC can switch between +V dc /2 to 0V without switching valve 1 off. This could be achieved by switching valve 2 off, valve 6 and valve 3 on and therefore leaving valve 1 on. The additional switching states, in conjunction with an appropriate control strategy, can more evenly distribute losses and reduce the maximum device junction temperature. This results in a potential increase in converter output power or/and an increase in the switching frequency. In [137] the converter output power rating increased by 20%, or the switching could increase from 1050Hz to 1950Hz for an ANPC VSC compared to a NPC VSC. In a NPC-VSC it is likely that all of the valves will be rated for the maximum stress of the worst valve. It is unlikely that different valves will be designed and built depending on their individual maximum stress rating due to the additional cost and time. HVDC schemes are designed for two-way power transfer, although in many cases the power is predominantly transferred in one direction. Therefore it is likely some valves will be stressed more than others for the high majority of the time. Since the losses in an ANPC 228

229 Appendix 1A VSC are distributed more evenly, the maximum stress that any valve experiences is reduced. Therefore it is likely that the ANPC VSC is more reliable for the same rating. +V dc /2 Valve1 Valve5 Valve2 V a Valve6 Valve3 -V dc /2 Valve4 Figure A.13: Single phase of an active neutral clamped voltage source converter ABB utilised the ANPC VSC on the Murraylink and Cross Sound Cable projects in 2002 [33]. ABB s HVDC Light technology then evolved again to its current 3 rd generation. The third generation of HVDC Light reverts back to the two-level converter but employs a new control strategy known as Optimum PWM (OPWM). OPWM can cancel selective harmonics and therefore the switching frequency can be reduced [87]. The 350MW ±150kV VSC-HVDC scheme between Estonia and Finland, known as Estlink, employs the OPWM at a switching frequency of 1050Hz [139]. This is a reduction of 900Hz in comparison to the first generation of HVDC light used in the Tjaereborg VSC transmission scheme [134]. Siemens VSC-HVDC technology, known as HVDC Plus, is based on a Modular Multi- Level converter (MMC) approach. The MMC, as shown in Figure A.14, consists of six converter arms. Each converter arm comprises a number of Sub-modules, SM, and a reactor connected in series. The SM contains a two-level half-bridge converter with two IGBT s and a parallel capacitor. The SM is also equipped with a bypass switch, to remove the SM from the circuit in the event that an IGBT fails, and a thyristor, to protect the lower diode from overcurrent in the case of a DC side fault. 229

230 Appendix 1A +V dc /2 I dc I ua SM1 SM1 SM1 SMn SMn I la I dc SMn -V dc /2 V ua Arm SM2 SM2 SM2 SM2 SM2 SM2 V la SMn SMn SMn SM1 SM1 SM1 L arm R arm Single IGBT I arm V cap V c V b V a V SM Sub-module Figure A.14: Three-phase MMC Each SM in a MMC is switched at less than three times the fundamental frequency and therefore the converter losses are less than the equivalent two-level and three-level converters by about 1% per converter station [28, 140]. Figure A.15 shows the voltage produced by the converter. The sinewave produced (orange) is very close to the desired waveform, which means that the harmonic content is very low. Increasing the number of voltage steps that are used to produce the desired waveform reduces the harmonic content. The AC converter voltages for a 400MW MMC with 200 modules per arm is shown in Figure A.16 (Trans Bay Cable project) [28]. This figure clearly shows that AC filtering is not required with a high number of SMs per converter arm. Figure A.15: Sinusoidal voltage synthesised from a MMC (modified from [28]) Figure A.16: Sinusoidal voltage synthesised from a 400MW MMC with 200 modules per arm (modified from [28]) 230

231 Appendix 1A The MMC has a much lower voltage step (few kv) in comparison to a two-level and threelevel VSC-HVDC scheme which switches the entire DC voltage or half the DC voltage respectively. This reduces the high frequency noise and component stresses. However, the benefits of the MMC come at the expense of increased valve and control complexity. Siemens have currently commissioned one HVDC Plus project (Trans Bay Cable), which is a 400MW ± 200kV VSC-HVDC transmission scheme between Pittsburg and San Francisco. Siemens have many more orders to use their HVDC Plus technology to connect offshore windfarms such as Helwin1 and Borwin2 [141]. Alstom Grid have developed their VSC-HVDC technology under the trade name of MaxSine, which also employs a MMC very similar to that of HVDC Plus. They have built a 25MW VSC demonstrator in Stafford, UK, and have won a contract to supply a 750MW, 345kV VSC scheme for operation in 2014 [142]. ABB s fourth generation converter is a Cascaded Two-level (CTL) converter topology very similar to that of a MMC, as shown in Figure A.17. Each cell is a half-bridge twolevel converter with two valves and a parallel capacitor. The number of series and parallel connected devices within the valve will depend upon the cell voltage and current respectively. A phase leg consists of two phase arms which contain a number of cells. The main difference between the CTL and MMC converter topologies is that the MMC SM contains two IGBT s whereas the CTL contains two valves (string of IGBTs). The valves are initially blocked; the anti-parallel diodes conduct and the cell capacitance charges-up providing the arm current is positive. The cell capacitor output voltage is inserted into the circuit by switching the lower valve on and the upper valve off, the cell capacitor charges for positive arm current and discharges for negative arm current. The cell capacitor can be bypassed by turning the upper valve on and the lower valve off; hence the cell output voltage is 0V. 231

232 Appendix 1A Figure A.17: Single phase of a two-level cascaded converter (ABB 4 th Gen HVDC light) Each cell is switched at a low frequency which is approximately three times the fundamental frequency (150Hz for a 50Hz system). For a DC bus voltage of ± 320kV about n=38 cells are required per arm, therefore the effective switching frequency of the phase leg is 11.4 khz. This is about 10 times greater than the third generation of HVDC Light, which gives the converter a good dynamic response. The dynamic response for the MMC is however likely to be better. A ±200kV MMC has approximately 200 SMs per arm, which gives a dynamic response of 20kHz for a conservative switching frequency of 50Hz 29. An equivalent voltage rating (± 320kV) would result in more levels and therefore an even better dynamic response. According to [84] the nominal cell voltage for a CTL converter is approximately 18kV, compared to a MMC SM voltage of approximately 2kV 30. The converter voltage for a CTL converter is shown in Figure A The SM switching frequency is quoted as being less than three times the fundamental [140].Therefore the SM switching frequency equal to the fundamental switching is likely to represent the minimum dynamic performance for a converter. 30 Based on ±200kV MMC with 200 SMs per arm. Module voltage = DC voltage/ Number of SMs. 232

233 Appendix 1A Figure A.18: CTL Converter voltage for a fundamental frequency of 50Hz with 17 cells per arm at a nominal cell voltage of 17.6kV and cell switching frequency of 168.5Hz [84]. Due to the MMC having smaller voltage steps in comparison to the CTL converter, it is able to produce a cleaner sinusoidal waveform as seen when comparing Figure A.16 with Figure A.18. Therefore it is likely that the MMC generates a lower harmonic content than the equivalent CTL converter. The MMC is also likely to have slightly lower losses than an equivalent CTL converter due to its apparent lower module switching frequency. However the CTL converter loss is quoted as being roughly 1% per converter [84] which is very similar to the quoted losses of close to 1% per converter station for the MMC [28]. The MMC requires approximately nine times more modules than the equivalent CTLconverter 31, which will result in a higher primary component count (capacitor, bypass switch, thyristor, enclosure). The CTL converter on the other hand will require grading circuits due the string of IGBTs connected within each valve. The MMC control system is challenged with balancing nine times the number of capacitor voltages in comparison to the CTL converter. However the CTL control system is likely to need to switch each cell in and out of circuit at least three times per cycle, compared to possibly twice per cycle for the MMC 32. Currently there is not enough information to conclude whether Siemens HVDC Plus, Alstom Grid MaxSine or 4 th Generation HVDC Light will offer the greatest performance. However with the current information, it is expected that the MMCs are likely to offer the best performance in terms of harmonic content, dynamic response and losses, but at the expense of a more costly and complex valve and control system. There is little information on the size of the HVDC Plus and HVDC Light 4 th generation converter stations. There are example layouts in [28, 44], but they are for very different 31 Based on 2kV SM voltage and an 18kV cell voltage. 32 The module switching frequency is only quoted as being less than three times the fundamental [140]. 233

234 Appendix 1A converter ratings which makes them difficult to compare. However since the MMC has vastly more modules it is likely that the CTL converter will be more compact. Thus-far all of the VSC-HVDC topologies which have been, or are likely to be, in commercial operation in the near future have been discussed. The primary driver behind each evolution of VSC-HVDC technology has been to reduce losses. The VSC losses have been reduced from 3% to about 1%, but are still slightly higher than LCC at 0.8% per converter [134]. Technology Year first scheme commissioned Converter type Typical losses per converter (%) 33 Switching frequency (Hz) 34 Example project HVDC Light 1st Gen HVDC Light 2nd Gen HVDC Light 3rd Gen 1997 Two-Level Gotland Three-level Diode NPC Three-level Active NPC Two-Level with OPWM Eagle Pass Murraylink Estlink HVDC Plus 2010 MMC 1 <150* Trans Bay Cable HVDC MaxSine 2014 MMC 1 <150* SuperStation HVDC Light 2015 CTL 1 150* Dolwin th Gen *switching frequency is for a single module/cell. Table A.1: Evolution of VSC-HVDC technology 33 Losses are indicative of a particular converter type, not specific to a project. The HVDC Light losses are primarily estimated from a graph produced by ABB, which can be found in [44]. The figure for HVDC Plus losses is in [28]. HVDC MaxSine losses are based on the HVDC Plus losses since the converter designs are very similar. 34 Switching frequency for HVDC Light generations 1-3 are for the example projects and can be found in [134, 139]. Switching frequency for HVDC plus is based on [140]. The same value is also used for MaxSine. 35 Dolwin 2 is likely to be the first HVDC Light 4 th generation project based on correspondence with ABB and in [143] its states losses less than 1%, which implies 4 th generation technology will be used. 234

235 Appendix 1A Table A.1 shows that the three main HVDC manufacturers are moving towards a multilevel converter topology. The multi-level converter, as with the other VSCs, has the following advantages in comparison to a CSC-HVDC scheme: Can be connected to weak AC systems Can control active and reactive power independently Smaller footprint Can use the cheaper, lighter and more robust XLPE cable MT operation is less technically challenging 3 Conclusion HVDC tends to be a more favourable transmission technology for offshore windfarms located further than km from shore. This is due to the transmission cable s capacitance which requires charging and discharging every cycle in an AC system. The charging current reduces the cable s useful power transfer capacity. In a HVDC system, once the cable s capacitance is charged, nearly its entire current carrying capability can be used for the transmission of active power. LCC-HVDC is not a suitable technology for the connection of offshore windfarms. This is primarily because LCC-HVDC requires a strong AC network at each end of the link and the converter station is very large, which means the offshore platform is expensive. LCC- HVDC cannot independently control active and reactive power and requires massimpregnated cable to handle the DC polarity reversal. Mass-impregnated cable is expensive and time consuming to install and is not particular suitable for subsea installation because it is heavy and inflexible. The issues of LCC-HVDC can be mitigated, or partially overcome, with VSC-HVDC technology. VSC-HVDC is a self-commutated converter and can therefore be connected to a weak AC network such as an offshore windfarm. The VSC-HVDC footprint is about 40% smaller than the equivalent LCC-HVDC footprint 36, which results in a large cost saving, particularly for offshore schemes. VSC-HVDC can control the output AC voltage magnitude and phase independently which gives independent active and reactive power capability. XLPE cable can be used on VSC-HVDC schemes because it does not change 36 Estimated from a space saving diagram comparing HVDC Plus with LCC-HVDC in [28]. 235

236 Appendix 1A the DC voltage polarity for power reversal. This type of cable is cheaper, lighter and more flexible than mass-impregnated cable. VSC-HVDC was pioneered by ABB in Since then there have been several evolutions of VSC-HVDC technology with the main focus on reducing the losses to similar levels of LCC-HVDC. The three leading manufacturers of HVDC technology have all moved towards a form of multi-level converter topology, which has seen losses reduce to about 1% per converter, which is comparable to the 0.8% per converter for LCC-HVDC. Therefore it is fully expected that multi-level VSC-HVDC will facilitate the transmission of power from the future offshore windfarms which require a HVDC link. 236

237 Appendix 2A APPENDIX 2A COMPONENT RELIABILITY INDICES 1 Introduction Reliability statistics for the components in a VSC-HVDC scheme are extremely sparse. The following papers/reports produced by academic institutions and industry are used as the main basis for the derivation of reliability statistics for the VSC-HVDC scheme used in this thesis: 1. LCC-HVDC data from academic paper [15] [Billinton et al., Reliability Evaluation of an HVDC Transmission System Tapped by a VSC Station"] 2. VSC-HVDC data from academic paper [15] 3. VSC-HVDC data from industrial paper report [144] [Statnett and DNV, Design, operation and availability analysis of a multi-terminal HVDC grid - A case study of a possible Offshore Grid in the Norwegian Sea ] 4. VSC-HVDC data from Cigre paper [16] [ABB and STRI, Reliability study methodology for HVDC grids ] Source 1 and 2 are from a recent IEEE transactions paper produced by respected authors in the area of power systems reliability, including Roy Billinton. The third source is a report produced by Statnett and Det Norske Veritas (DNV). The fourth source is a Cigre paper written by authors from ABB and STRI. Therefore the data from these sources is expected to be credible. Due to the limited data available some degree of estimation is unavoidable. Where this has been done the rational used is explained. 2 Gas-insulated Switchgear (GIS) Failure Statistics Unfortunately sources 1-4 only gave failure statistics for an AC circuit breaker. However since the circuit breaker is the main component of a GIS switchbay, it is worth analysing the failure statistics used in sources 1-4 to give an indication of the failure statistics for the GIS. Table A.2 shows the reliability statistics for AC circuit breakers given in academic and industrial papers. Source MTTF(yr) MTTR(hr) Scheme kV kV kV Offshore >500kV Table A.2: Circuit breaker MTTF and MTTR values given in sources 1 to 4 237

238 Appendix 2A It is clear from Table A.2 that the circuit breaker reliability statistics used for reliability studies in academic and industrial papers vary significantly. Source 3 and 4 reference Cigre publications for their reliability statistics. At the time of investigation, the last known high voltage circuit breaker survey was published by Cigre in This publication presented results from two surveys, one conducted between 1974 and 1977 (all circuit breaker technologies) and the other conducted between 1988 and 1991 (only SF 6 ). Survey Cigre Cigre Voltage(kV) MTTF (yr) MTTR(hr) Table A.3: Cigre high voltage circuit breaker reliability data The MTTF values for the survey conducted in are more than three times higher than the values from the survey. This increase in MTTF for the circuit breakers in the survey is thought to be due to improvements in circuit breaker technology and due to the utilities doing a better job of collecting statistics. The increase in downtime for the MTTR for circuit breakers in the survey was cited as being primarily due to the time taken to obtain a specific spare part for the SF 6 circuit breakers. According to the ODIS 2011 document [14], Gas-insulated Switchgear (GIS) bays will be installed on all offshore platforms, and on onshore platforms located less than 5km from the sea. The final results for two surveys on the reliability of gas-insulated substations have been published. The first international survey was circulated in 1991 and the second survey was circulated in 1996 [27]. The major failure statistics from the 2 nd international survey for GIS commissioned after 1985 are shown in Table A.4. Component MTTF (yr) MTTR(hr) kV GIS kV GIS Table A.4: Failure statistics from the 1996 survey for GIS commissioned after Comparing the values from the Cigre survey in Table A.3 with the values in Table A.4, it is clear that a GIS bay tends to take longer to repair than an AC circuit 37 MTTF is calculated by taking the reciprocal of the failure rate. It is assumed that the failure rate is based on the number of circuit breaker bay-years in service. (I.e. the reciprocal of the failure rate is the MTTF not the MTBF). In any case the difference between MTTF and MTBF will be very small. 238

239 Appendix 2A breaker and that the higher voltage ( kV) GIS has a shorter MTTF than an AC circuit breaker. This is not particularly surprising considering a GIS bay contains an AC circuit breaker as well as other equipment such as disconnectors. The data given in Table A.2, Table A.3 and Table A.4 can be used to estimate the failure statistics for a 220/275kV GIS switchbay and a 400kV switchbay commissioned in It is fair to assume that the MTTF of a GIS switchbay in 2011 would be much higher than a GIS switchbay commissioned between 1985 and The MTTF from the 1996 survey for kV GIS commissioned after 1985 was 45% higher than the GIS commissioned after 1985 from the 1991 survey. The MTTF for AC circuit breakers 1988 survey was more than 300% higher than the values given in the 1974 survey. Therefore, it is justifiable to assume that the MTTF for a 220/275kV GIS switchbay and a 400kV switchbay commissioned in 2011 would be 250 years and 100 years respectively. These figures lie within reasonable ranges as shown by the figures used in academic and industrial papers in Table A.2. It is also worth mentioning that ABB have quoted a Mean Time Between Failure (MTBF) figure of up to 1000 bay-years for their gas-insulated switchgear [145]. Based on the assumption that GIS today would be somewhat easier to fix than years ago, and that the spare parts are more readily available, it is assumed that the MTTR values will be reduced. Furthermore the supply chain is computerised with modern telecoms which would help to improve service levels. Therefore the MTTR for modern GIS is assumed to be 120 hours. As mentioned in the main body access times for offshore platforms vary considerably depending on a number of factors. The 1996 GIS survey stated that about 70% of repairs could be carried out on-site and required a spare part and/or enclosure [27]. It is assumed that the high majority of spare parts could be transported by helicopter. Therefore the time to access the offshore platform to repair a GIS switchbay is taken as 84 hours (70% helicopter, 30% medium vessel). It is estimated that about 20 hours of the offshore access time is spent performing administration related tasks which could be done concurrently with the time spent obtaining spare parts. Therefore the MTTR used for the offshore GIS switchbay is 184 hours. Table A.5 shows the estimated reliability indices for GIS. 239

240 Appendix 2A Component MTTF (yr) MTTR(hr) Offshore switchbay kV onshore switchbay kV onshore switchbay Transformer Failure Statistics Table A.5: Estimated reliability indices for GIS Table A.6 shows the reliability statistics for transformers given in sources 1 to 4. Source MTTF (yr) MTTR (hr) Scheme kV kV kV Offshore >500kV Table A.6: Transformer failure statistics given in sources 1 to 4 The transformers used in LCC-HVDC schemes (source 1) are more complex and experience greater stress than the transformers in the VSC-HVDC schemes (source 2). This would explain the better reliability statistics for the transformer from source 2. The reliability statistics provided by source 4 are from the latest transformer failure statistics survey published by Cigre in 1983 for transformers between kV. After analysing the 1983 report, it is clear that the statistics from source 4 are based on an autotransformer with and without an On-Load Tap-changer (OLTC). Analysis of the 1983 report shows that for an autotransformer with an OLTC, the MTTF is years and for an autotransformer without OLTC the MTTF is 17.2 years 38. This is somewhat surprising and the report noted that the abnormally high failure rate of autotransformers without OLTC could be in part explained by the failure of the transformers belonging to a certain network. In other words, the MTTF of 17.2 years for an autotransformer without OLTC should be used with a degree of caution and therefore the figure with and without OLTC as used in source 4 should also be used with a degree of caution. In any case, HVDC schemes use transformers with an OLTC and tend not to use autotransformers, because they cannot provide galvanic isolation between the AC and DC sides. Therefore, the statistic given in source 4 may not be representative of a transformer used in a HVDC scheme. 38 MTTF is calculated by taking the reciprocal of the failure rate. According to the Cigre report the failure rate is calculated based on the number of transformer-years in service (i.e. the reciprocal of the failure rate is the MTTF not the MTBF). 240

241 Appendix 2A The 1983 Cigre report also gave statistics for substation station transformers. The MTTF for a kV substation transformer with an OLTC and a kV transformer is 62.5 years and years respectively. Considering the survey was conducted more than 30 years ago, it is reasonable to suggest that the MTTF for a modern transformer is much improved. Therefore an estimated MTTF of 95 years for a kV transformer and 80 years for a kV transformer will be used in this availability analysis. These values are still much less than the estimated values given by DNV in source 3. Unfortunately, the 1983 Cigre report did not publish the mean downtime for nonautotransformers in the kV range as it was deemed not significant. However, the mean downtime with a 95% confidence level for a kV transformer with an OLTC was reported as being between 46 and 76 days. The MTTR is taken as the mean, 61 days (1464 hrs). Considering it is now more than 30 years since the survey was conducted, an estimated MTTR value of 42 days (1008 hrs) will be assumed. This figure is based on the assumption that technology today allows a quicker diagnosis and repair of the transformer failure. In the event a transformer fails it is normally shipped back to the factory for repair [146]. There have been situations where it is so difficult to send the transformer back to the factory that a fully equipped workshop has been constructed on-site. It is difficult to send an offshore transformer back to the factory, but due to the lack of space on an offshore platform it would be extremely rare, if not impossible, to construct a workshop on the platform. Therefore in the event a transformer fails it is expected it would need to be shipped back to the factory for repair. In this report, the time it takes to access an offshore platform with a transformer has been estimated at three weeks (504 hours). This figure was based on the transportation of a large item, such as a transformer, to the offshore platform. The offshore access time required for repairing an offshore transformer would be split into two parts. The first part would be to transport the transformer back to shore. The second part would occur once the transformer is repaired and must be transported back to the offshore platform. Therefore the offshore access time for repairing the transformer must at least be greater than three weeks. A significant portion of the three weeks access time would be due to delays in acquiring the large vessel at very short notice. However the vessel could be booked well in advance for returning the transformer back to the offshore platform. Therefore, the access time to 241

242 Appendix 2A transport the transformer to the offshore platform is estimated to be reduced to one week. Therefore the total access time to repair the offshore transformer is estimated to be 4 weeks. It is assumed that one week of the MTTR for the onshore transformer is spent sourcing spare parts. It is feasible that the transformer could be diagnosed using non-invasive tests on the offshore platform [147]. This would allow the spare part to be sourced while the transformer is being transported back to the factory. Therefore the MTTR for the offshore transformer is estimated to be three weeks longer than the MTTR for the onshore transformer. For comparison DNV increased the MTTR for the offshore transformer by three weeks in their availability analysis in source 3. Table A.7 shows the estimated reliability indices for the transformers. Component MTTF(yr) MTTR(hr) Offshore Transformer Onshore Transformer Table A.7: Estimated reliability indices for transformer 4 Converter Reactor Failure Statistics Table A.8 shows the reliability statistics for phase reactors given in sources 1 to 4. Source MTTF (yr) MTTR (hr) Table A.8: Converter reactor reliability values given in sources 1 to 4 Only source 3 has stated reliability values for the converter reactor. Unfortunately, there are no other known author publications which have given reliability values for the converter reactor. It is worth noting that availability statistics for the Murraylink VSC- HVDC scheme have been published by ABB in a Cigre paper [33] as shown in Table A.9. Murraylink Energy Average Total Scheduled Forced Table A.9: Murraylink energy availability The very low availability of the scheme in 2007 was due to a fault in the phase reactor, which was most likely caused by a fault in an external light fitting which led to a fire on 242

243 Appendix 2A the reactor [33]. It was noted that one of the reasons the repair took so long was because the building was not designed to accommodate an easy replacement. That said the Murraylink went into service in 2003 and it is expected that new schemes would be designed to allow easier replacement of components. The values from DNV seem reasonable, after all DNV is a well-respected risk management company and therefore their values are expected to be credible. The only slight concern is that the MTTR values for both the onshore and offshore converters are the same. In the event a converter reactor fails it is assumed it would need to be replaced rather than repaired on-site because it is a single unit and has no moving parts. A converter reactor is too large to be shipped via a helicopter, therefore a medium sized vessel would be required. The offshore access time for the converter reactor is 168 hours. It is expected that a converter reactor is readily available to allow replacement within 24 hours. Since there is no time delay in sourcing the component, the offshore MTTR is equal to the onshore MTTR plus the offshore access time. Table A.10 shows the estimated reliability indices for the converter reactor. Component MTTF (yr) MTTR (hr) Onshore Converter Reactor 7 24 Offshore Converter Reactor Table A.10: Estimated converter reactor reliability indices 5 MMC Failure Statistics Table A.11 shows the reliability statistics for MMCs given in sources 1 to 4. Source MTTF (yr) MTTR (hr) Comment LCC Two-level VSC Two-level VSC VSC* *Value based on LCC and includes the C&P and the DC Table A.11: MMC failure statistics given in sources 1 to 4 It is unclear if sources 1 and 2 have included the Control and Protection (C&P) systems, as well as the cooling and ventilation systems, in the reliability values for the converter. However, it is assumed that they have, since these systems are not considered separately in the sources and the converter would be the most appropriate component in which to 243

244 Appendix 2A include these systems. Sources 2 and 3 do not explicitly state that their reliability statistics are for a two-level VSC converter, however, since both systems include AC filters it is fair to assume that they are for a two-level converter. Source 3 has considered the C&P as well as the cooling and ventilation systems separately. Therefore the values given by source 3 are purely for the IGBT converter system. The reliability statistics given for a VSC in source 4 are based on actual forced outage statistics collected for LCC-HVDC schemes between 2005 and 2006 [16]. However the value for source 4 given in Table A.11 is a combined value for the converter, C&P and DC equipment. Based on the same analysis method used in source 4, the MTTF and MTTR for the converter only are 2.1 years and three hours respectively. These values account for the cooling and ventilation systems, but not the C&P and DC equipment. There has been no actual reliability statistics published for converters used in VSC-HVDC schemes. However based on the values given in Table A.11 it is assumed that the MTTF and MTTR for a two-level VSC are 2 years and 12 hours respectively. The MMC has a significantly higher component count than a two-level VSC, which is likely to reduce the reliability of the converter. However, it does not suffer the high stress of switching all IGBTs in the valve simultaneously. It is reasonable to assume that the MMC at this time will be slightly less reliable than the two-level converter due to the lack of experience with this type of converter in HVDC schemes and the higher component count. Therefore, the MTTF will be reduced to 1.9 years as a placeholder to reflect the expected increase in failure rates for MMC. The MTTR will be kept the same at 12 hours for an onshore converter. The MMC reliability indices account for the cooling and ventilation systems. The failure of a MMC is likely to require the replacement of a SM. It is justifiably assumed that spare SMs would be readily available since they require minimum storage space and are critical for converter operation. SMs are fairly small components and could be transported by a helicopter with the engineer. Since the reliability indices for the MMC includes the cooling and ventilation systems, the size of spare parts for these systems must also be taken into account. The critical components which have high failure rates in a cooling plant are electrical motors. It is expected that electrical motors could be transported by helicopter/small vessel. The offshore access time for such a component has been estimated at 48 hours and as such the MTTR for the offshore converter is 60 hours. Table A.12 shows the estimated MMC reliability indices. 244

245 Appendix 2A Component MTTF (yr) MTTR (hr) MMC Onshore MMC Offshore Table A.12: Estimated MMC reliability indices 6 Control System Table A.13 shows the reliability statistics for the control system given in sources 1 to 4. The reliability statistics from source 3 are a DNV internal estimate for a single VSC control system. The C&P systems for HVDC schemes are normally duplicated [30]. Therefore the availability of the duplicated control system must be calculated, as shown in Table A.14. Source MTTF (yr) MTTR (hr) Table A.13: Control and protection failure statistics given in sources 1 to 4 Capacity Control 1 Control 2 Probability Availability % Table A.14: Availability of DNV duplicated control system Providing the repair time for the DNV duplicated C&P system is fixed at 9 hours the MTTF for the duplicated control system would be approximately 930 years. This value has been calculated in (A.11) by rearranging equation (A.7) for MTTF and substituting the duplicated control system availability values. A MTTF MTTF MTTR (A.7) MTTF MTTF MTTR (A.8) A MTTF (1 A) A MTTR (A.9) A MTTR MTTF (1 A) hrs or 930 yrs ( ) 245 (A.10) (A.11)

246 Appendix 2A The values given in source 4 are from the actual forced outage statistics collected for LCC- HVDC schemes between 2005 and Therefore, the MTTF statistic is actually the mean time to failure of both C&P systems, as the scheme could operate if only one of the two C&P systems failed. Therefore, the availability of the duplicated C&P system is , which is significantly less than the availability of the duplicated control system from the DNV reliability data in source 3. This is further highlighted by the difference between the calculated MTTF value from the DNV data and the MTTF value from source 4. It is expected that the reliability data given in source 4 is more realistic than source 3 since this is actual HVDC C&P failure data. The hardware for the C&P system for a LCC-HVDC system is similar to a MMC VSC- HVDC system. Therefore, the data given in source 4 would provide a good basis for estimating the reliability indices for the MMC VSC-HVDC C&P system. The MMC Valve Based Electronics (VBE), the interface between the C&P system and the converter, is different from that of a LCC-HVDC scheme due to the higher number of levels. The software is also more complex, because the control system must balance the capacitor voltages in the MMC valve and turn each level on and off individually. However it is expected that a modern C&P system would be more reliable than an older C&P system. The World HVDC survey obtains data from many schemes using C&P systems of different ages. Therefore all things considered, a MTTF and MTTR of 1.6 years and 3 hours will be used in this availability analysis. It is assumed that many control system faults could be solved without attending the site (i.e. via remote access). In the event that the problem cannot be solved via remote access an engineer would have to attend site. Spare parts for control systems, such as digital signal processing cards, are very small and therefore access via helicopter is suitable. It is assumed that 30% of faults on the offshore control system require an on-site visit. Therefore the MTTR of the offshore control system is equal to MTTR for the onshore control system plus 30% of the time required to access the offshore platform with a small component (3+48x0.3=17hours). Table A.15 shows the estimated reliability indices for an onshore and offshore control system. 246

247 Appendix 2A Component MTTF (yr) MTTR (hr) Onshore Control System Offshore Control System Table A.15: Estimated control system reliability indices 7 DC Switchyard Table A.16 contains the reliability indices for the DC equipment from sources 1 to 4. Source MTTF (yr) MTTR (hr) Scheme Smoothing Reactor VSC HVDC Switch/breaker HV DC Bus LCC DC Filter VSC DC Filter VSC DC Filter Based on Data from LCC Survey Table A.16: DC equipment failure statistics given in sources 1 to 4 There is significant difference between the DC filter reliability indices between sources 1 and 2. The DC filters are for different schemes but it is unlikely that the VSC DC filter is 400 times more reliable than an LCC filter based on the MTTF. The DNV (source 3) reliability indices for the VSC DC filter appear to be more realistic than source 2. Sources 1-3 appear to have included what they consider the key components for their analysis, whereas source 4 has accounted for an entire DC switchyard. Source 4 has accounted for all the VSC DC equipment by analysing the failure statistics for DC equipment in the World HVDC survey (LCC) published in The major equipment in a MMC DC VSC switchyard consists of HV capacitor banks (if required), line reactors, measurement transducers and switchgear [29]. The major equipment in a LCC DC switchyard consists of DC harmonic filters, smoothing reactors, measurement transducers and switchgear [30]. 247

248 Appendix 2A Figure A.19: Image of a MMC VSC DC switchyard (left, modified from [29]), Image of a LCC DC switchyard (right modified from [31]) Since there is significant similarity between the DC switchyards, the failure statistics from the World HVDC survey (LCC) could be used to estimate the reliability indices for the MMC VSC-HVDC DC switchyard. The latest World HVDC survey was published in 2010 for data collected on LCC-HVDC schemes during Back-to-back HVDC schemes do not normally require smoothing reactors or DC filters [30]. Therefore only the data for transmission schemes should be considered. In the HVDC survey, data was collected from 18 transmission schemes (8 monopole and 10 bipole). Monopole schemes have one DC switchyard at each end of the scheme, whereas bipole schemes have the equivalent of two DC switchyards at each end of the scheme. The failure rate for a single DC switchyard can be calculated by summing the number of failures for the 18 transmission schemes and dividing by the number of DC switchyards (56). The MTTR is obtained by dividing the total number of outage hours by the number of failures. The reciprocal of the failure rate is the Mean Time Between Failures (MTBF). The MTTF is the MTBF minus the MTTR. The average MTTF and MTTR has been calculated and is shown in Table A.17. There is a significant difference between the MTTF and MTTR calculated in Table A.17 and the reliability indices from the survey. However, source 4 calculated the reliability indices for a DC switchyard from both back-to-back and transmission schemes. Source 4 also assumed that 50% of the HVDC schemes in the survey were monopole and 50% were bipole. Since the survey is the most recent, and the analysis of the reliability indices is more accurate for a transmission scheme, these indices will be used in this availability analysis. Line Reactor 248

249 Appendix 2A Parameters Average No of schemes Number of monopoles 9 9 Number of bipoles No of Failures Failure per scheme year Failures per Switchyard MTBF (yr) Repair time (hr) MTTR (hr) MTTF (yr) Table A.17: Analysis of the DC equipment failure statistics from the World HVDC survey It is worth noting that although there are 18 transmission schemes which would normally equate to 56 converters (8x2+4x10) further analysis of the data shows that there are actually 80 converters. This is because a number of schemes contain more than one converter per pole. Nelson River BP 2 for example has 3 six-pulse converters connected in series per pole, giving twelve converters for the bipole instead of the usual four [148]. This is unlikely to affect the reliability indices for DC switchyards as there should still be about the same amount of DC equipment for standard HVDC schemes with one converter per pole. However calculating the reliability indices for the HVDC converters from the World HVDC surveys should take the number of converters per pole into consideration to ensure a high degree of accuracy. In order to adjust the MTTR for the offshore DC switchyard, the most common types of repair and size of spare parts would need to be known. Unfortunately, the HVDC surveys do not give this level of detail. However, by analysing the outage statistics due to DC equipment failures it may be possible to get an indication of the size of component required for the most common failures. In 2007 there were twelve DC equipment failures causing a total of 368 outage hours, of which a single failure accounted for 314 hours [26]. Therefore the MTTR excluding the single major failure was only 4.9 hours. Such a small repair time is likely to indicate that only small parts which were readily available, if any, were required. The 314 hour outage indicates the repair required a large component. The 314 hour outage was due to a smoothing reactor failure [26], which is a large component as shown in Figure A.19. Only five of the 18 failures in 2008 required a repair time in excess of 10 hours. This analysis indicates that the high majority of DC switchyard repairs require a small spare part, if any, and that the spare part is readily available. Therefore it is 249

250 Appendix 2A estimated that 80% of offshore DC switchyard repairs could be carried out via helicopter/small vessel and the remaining 20% via a small vessel 39. Furthermore, since the analysis indicates that the majority of spare parts are readily available it is assumed that very little time could be saved performing parallel tasks and it is therefore neglected. Hence the MTTR for the offshore DC switchyard is the MTTR for the onshore DC switchyard plus the offshore access time for the DC switchyard. The offshore access time to the DC switchyard is estimated to be 72 hours (0.8x48+0.2x168). Table A.18 shows the estimated reliability indices for the DC switchyard. Component MTTF(yr) MTTR(hr) Onshore DC Switchyard Offshore DC Switchyard Table A.18: Estimated reliability indices for DC switchyard 8 DC Cable Only source 3 contained reliability indices for cables as shown in Table A.19. Component Failure rate (occ/yr/100km) MTTR (hr) DC Cable Table A.19: DC cable failure statistics given in sources 1 to 4 The results from the latest reliability survey for cable systems were published by Cigre in 2009 [32]. The survey ended in 2005 and was for a 15 year period. At the end of 2005 approximately 7000 circuit km of submarine cable was identified as being in service. DC-XLPE cable is the type of cable which is most likely to be used for VSC-HVDC schemes. Unfortunately the failure rates for DC-XLPE cables were not given in the report. The failure rate for all submarine cable types, with the exception of DC Self Contained Oil Filled (SCOF) cables, due to internal faults, was zero. Therefore, the failure rate due to internal faults for DC-XLPE cable will be assumed to be zero. The average failure rate for all types of cable technology and voltage ratings due to external/unknown damage gives a failure rate of failures per year per 100km of circuit. Approximately 55% of these submarine cable failures were reported to be at a 39 Based on the assumption that an outage time of less than 10 hours for a single fault indicates a small spare was required. In 2007, 2 of the 12 failures caused outages in excess of 10 hours while in 2008, 5 of the 18 failures caused outages in excess of 10 hours. Therefore approximately 80% of failures required a small part. 250

251 Appendix 2A location where the cable was unprotected 40. Submarine HVDC cables are normally buried at depths of 1m to offer protection [111]. For cable routes where direct burial is unsuitable due to the sea-bed conditions (e.g. solid rock) other protection methods such as concrete mattressing may be employed [111]. Considering that HVDC submarine cables will have installation protection, the failure rate is calculated to be approximately 0.1 failures per year per 100km circuit. This failure rate is nearly double the failure rate used in the DNV report. It is important to note that submarine cable failure rates are very subjective. They are heavily influenced by many factors including, fishing activity, installation protection method, awareness of cable routes, water depth, and hardness of the sea-bed. In this availability analysis it will be assumed that the annual failure rate is 0.07 failures per 100km of circuit. This is a reasonable assumption based on data from the DNV report and the Cigre survey. The offshore converter and onshore converter are located 165km apart. Therefore the total cable length is 330km, but the circuit length/route length is assumed to be 165km 41. The average repair time for submarine cables in the Cigre 2009 was 60 days [32] which is the same as the DNV MTTR. Therefore this availability analysis will assume a MTTR of 60 days (1440hrs) for submarine cables. Table A.20 shows the estimated reliability indices for the submarine cable. Component Failure rate (occ/yr/100km) Circuit Length (km) MTTF (yr) MTTR (hr) DC Cable Table A.20: Estimated reliability indices for submarine cable There were a total of 49 submarine cable failures recorded of which 4 were internal failures. 25 of the 45 external/unknown failures occurred at a location that the cable was unprotected. 17 faults occurred on cables that were protected. It is unclear if the remaining three faults (including two terminal faults) occurred on protected or unprotected cables. The vast majority of the cables surveyed (>80%) employed some form of protection [149]. Therefore by assuming that the smaller number of unprotected cables can be neglected and attributing the three unknown faults to the protected cables, the failure rate of a cable employing some form of protection can be approximately calculated by (20/45)*0.217= The questionnaire for the Cigre survey gives an example of how the circuit length is calculated. A 5 km long double-circuit connection with three phases and two cables per phase should be reported as 10 circuit km even though it has 60 km of cable core. Therefore from this example 330km of core cable has a circuit length of 165km. 42 The reciprocal of the failure rate was assumed to be the MTBF. MTTF=MTBF-MTTR. 251

252 Appendix 2B APPENDIX 2B RELIABILITY CONCEPTS AND DEFINITIONS 1 Reliability Concepts and Definitions Reliability is the probability of a device performing its purpose adequately for the period of time intended under the operating conditions encountered [13]. Maintainability is the probability that a component/device/system will be retained or restored to specified working condition. Mean Time To Failure (MTTF) is the average time from the instance a component/device/system enters a working state until a component/device/system enters a failed state. This may also be defined as the component/device/system s uptime. Mean Time To Repair (MTTR) - is the average time it takes to restore a component/device/system to a specified working condition from the instance the component/device/system failed. This may also be defined at the component/device/system s downtime. Mean Time Between Failures (MTBF) is the average time elapsed between a component/device/system entering a working state until the component/device/system reenters a working state. This may also be defined as the cycle time, which is the uptime plus the downtime. Availability is the probability of finding the component/device/system in the operating state at some time into the future [13]. The availability of a component with two states can be calculated by equation (A.12). A Uptime MTTF MTTF Uptime Downtime MTTF MTTR MTBF (A.12) Failure rate is the number of times a component/device/system is expected to fail per unit of time, or the number of times a component/device/system is expected to fail per unit of time the component/device/system is in a working condition. The failure rate in this report has two definitions because different reliability surveys determine the failure rate from one of two methods. Some surveys record the number of failures for a sample of components for a specified period time without suspending time for a component upon failure, whereas other surveys suspend time when a component enters a failed state. 252

253 Appendix 2B As an example, consider a fictitious reliability survey which collected failure statistics from ten transformers for ten years during their useful life, giving 100 transformer-years of data. The survey concluded that there were four failures in that time and that the average time to repair each failure was three months. The number of times a transformer is expected to fail per unit of time is calculated as follows: ( occ / yr) 1010 (A.13) Equation (A.13) states that the failure rate for a transformer is 0.04 failures per year. However this method for determining the failure rate did not suspend time when each transformer was in a failed condition. The number of times the transformer is expected to fail per unit of time when the transformer is in a working condition is calculated as follows: ( occ / yr) 1010 (43 month) (A.14) Failure rates in this report are assumed to be constant, see Figure A.21. The reciprocal of equation (A.13) is the MTBF, whereas the reciprocal of equation (A.14) is the MTTF. Therefore the MTTF and MTBF can be calculated as follows and their relationship is shown in Figure A.20: 1 MTTF years (A.15) MTBF 25years (A.16) 0.04 MTBF MTTF MTTR months 25years (A.17) 1 MTBF MTTR 0 MTTF time Figure A.20: Relationship between MTBF, MTTF and MTTR 253

254 Appendix 2B Reliability surveys normally specify the failure rate and MTTR. Therefore if the reliability survey has calculated the failure rate for a component without suspending time for failed components, the MTTF may be obtained from equation (A.18). 1 MTTF MTTR (A.18) It is not always clear which method the reliability survey has used to calculate the failure rate. However, in many cases this will not significantly impact on the calculated availability of the component, since the MTTF is typically much greater than the MTTR. The lifecycle of a product can be described by three distinct phases, as shown by the bathtub curve in Figure A.21. The infant mortality phase is characterised by a high failure rate which decreases with time, and could be due to manufacturing errors or improper design. Product failures in the second region (useful life) occur purely by chance and as such the failure rate is constant. The third region (end of life) of the bath-tub curve shows the product is wearing out. Figure A.21: Product lifecycle from [150] The failures rates in this report are assumed to be constant with time (i.e. phase one and three are neglected). This is a fair assumption since components go through an extensive testing process before they are installed at site and it is expected that the life of the product has been designed to be equal to or less than the useful life of the product. In other words, it is expected that manufacturing errors or improper design issues would be discovered in the testing phase and that if a product is expected to be in operation for 25 years the manufacture would have designed the product to have a useful life of at least 25 years. 254

255 Appendix 2B Mean Time to Access Offshore Platform (MTTAOP) is the average estimated time it takes to reach an offshore platform with a component of a particular size. Mean Offshore Access Time (MOAT) is the average estimated offshore access time for a particular component. Mean Time Performing Concurrent Tasks (MTPCT) is the average time spent performing tasks associated with repairing a component located onshore which can be conducted in parallel with tasks related to the MOAT for the component. Example A GIS switchbay located onshore has an estimated MTTR of 120 hours. It is estimated that 70% of GIS failures require a small sized spare part and 30% require a medium sized spare part. MOAT 0.7 MTTAOP( small) 0.3 MTTAOP( medium) MOAT hours (A.19) In addition it is estimated that 20 hours of the MOAT is spent on administration related tasks which can be performed in parallel with the time spent obtaining spare parts (accounted for in the onshore MTTR). MTPCT 20hours (A.20) MTTR MTTR MOAT MTPCT hours (A.21) offshore onshore 255

256 Appendix 2C APPENDIX 2C MTDC GRID ANALYSIS The full truth table for 7 variables is shown below: State OFNA OFNB OFNC C1 C2 Sub 6 Sub

257 Appendix 2C Table A.21: Truth table for the simplified MTDC system 257

258 Appendix 2C The capacity probability table for the HVDC grid with each path to shore rated at 900MW is shown below: State OFNA OFNB OFNC C1 C2 Sub 6 Sub 7 Probability Capacity

259 Appendix 2C Table A.22: Capacity probability tables for MTDC with 900MW paths back to shore 259

260 Appendix 3A APPENDIX 3A HVDC CIRCUIT BREAKER REVIEW The HVDC circuit breaker topologies which were not presented in the main body are described in this appendix. 1 Mechanical breaker with turn-off snubber This DC circuit breaker consists of a fast mechanical switch connected in parallel with two branches [56]. One branch contains a set of anti-parallel thyristors connected in series with a snubber capacitor, and the other branch consists of a surge arrester. This device is shown in Figure A.22. L s I I b S I c C I s SA Figure A.22: Mechanical breaker with turn-off snubber During normal operation, the current flows through the mechanical switch, S. Once the fault is detected and the mechanical switch receives a trip order, it opens its contacts causing the line current to begin to commutate into the thyristor-capacitor branch once the thyristors are turned-on. The line current charges-up the capacitor creating a counter voltage, resulting in a decrease in the rise of fault current. The surge arrester will become highly conductive and de-magnetise the system s inductance at the moment its knee-point voltage is reached. The de-magnetisation of the system s inductance reduces the voltage across the surge arrester (i.e. it becomes less conductive). In the absence of a thyristor this could cause the current to commutate back to the capacitor and ultimately result in oscillations. The thyristor therefore prevents the current from oscillating and hence successful interruption can be achieved. The snubber capacitor must be designed to ensure that the rate of voltage rise across the mechanical switch does not exceed its voltage blocking slew rate capability. This DC breaker is able to reduce the maximum fault current, due to the capacitor gradually reducing the voltage across the system s inductance. It also uses thyristors, instead of semiconductor switches with turn-off capability, which is by far the most cost-efficient device for very high power applications [134]. This may also increase the device s reliability, 260

261 Appendix 3A since no control equipment is required to turn-off the device. A suitable method of discharging the capacitor once the current has been interrupted must however be incorporated into the design. 2 Resonant DC/DC Converter The prospect of incorporating DC/DC converters in MT HVDC grids is being investigated [43, 151]. The proposed DC/DC resonant converters [55, 152] would allow the DC grid to be operated at different voltages levels, which is claimed to optimise costs and losses. They would also enable faulty sections of the grid to be isolated. L 2d I 1 I 2 L 1 V 1+ T3 T1 T4 T2 R g V 2+ C T5 T7 T6 T8 L 2u C V c V 1 - T4 T2 T3 T1 T6 T8 T5 T7 V 2 - L 1 L 2u L 2d Low Voltage Converter High Voltage converter Figure A.23: DC/DC resonance converter The proposed DC/DC resonance converter is also known as a high power bi-directional DC transformer and is shown in Figure A.23. The converter creates two back-to-back LC resonant circuits with a common capacitor, C. In step-up mode, (power transfer from V1 to V2), thyristor pairs T1 and T2 are fired sequentially at a switching frequency with a duty ratio of 50%. This creates a resonance with L 1 and C, increasing voltage, V c, and enabling zero current switching of T1 and T2. The high voltage resonance circuit (L 2u -C) allows the thyristor pairs T5 and T6 to be switched at zero current. This operating principle is similar for the converter operating in step-down mode with thyristor pairs T3 and T4 in the low voltage converter, and thyristor pairs T7 and T8 in the high voltage converter, being utilised. The high voltage converter s switching frequency is synchronised to that of the low voltage converter, but the firing angle is selected depending on the mode of operation (step-up or step-down). The switching frequency is usually varied to control the DC current (I 1 or I 2 ) using a Proportional-integral (PI) feedback controller. 261

262 Appendix 3A The worst case zero-impedance faults, at both high voltage and low voltage converter terminals, are considered. The moment the fault occurs there is an initial transient for one to two cycles, in which the converter components experience peak fault values. Following this the converter finds a new steady-state operating point, if possible, until the controller is able to respond. The controller is assumed to be inactive from the instance that the fault occurs until sometime later, due to the delays in transducers, in processing the data and in firing the thyristors [152]. After this delay, the controller is able to act to reduce the switching frequency or block the firing pulses (for a permanent fault), and to open the offload mechanical switches to provide fault isolation. The time period during which the controller is inactive is said to be the converter s natural response and is dealt with in [152], which refers to the controller s active response documented in [67]. The use of a DC/DC resonance converter as a HVDC breaker is relatively new and there is ongoing work in this area [151]. The addition of DC/DC resonance converters in a DC grid is likely to result in additional costs and losses. 3 Patent Filed by ABB Technology on 26 th November 2008 titled High Voltage Direct Current Circuit Breaker Arrangement and Method. The novel part of this patent is how a number of DC breakers are arranged to enable a larger current to be interrupted than is possible with a single device. The device consists of an interrupter, BRK, connected in parallel with two branches, one containing a series inductor and capacitor, the other a surge arrester [153]. L s I I b BRK I c L C I s SA Figure A.24: HVDC circuit breaker arrangement and method (ABB, Nov 2008) The breaker is only able to interrupt DC circuits up to approximately 5kA, because above this level the arc voltage/current characteristic becomes flat (i.e. for changes in arc current the arc voltage remains constant). 262

263 Appendix 3A Simplistically, connecting DC breakers in parallel will allow the current between the breakers to be shared and therefore will, theoretically speaking, increase the total breaking current capability. The issue, however, is that one breaker will interrupt the current first, causing the current to commutate into the other breaker which will not be able to interrupt the total current. By introducing a single-phase two-winding transformer into the circuit, the problem may be overcome. The first DC breaker is connected to the polarity end of one transformer winding, whilst the second DC breaker is connected to the non-polarity end of the other transformer winding. During steady-state operation, the core magnetic flux produced by the current in one winding will therefore cancel out the core magnetic flux due to the current in the other winding. As an example, if breaker 1, B1, interrupts its current first, its parallel capacitor will begin charging up and will therefore produce an increasing voltage across B1. This voltage will try to commutate the current into the other breaker, B2, meaning that the total line current, I, will now be flowing through the second breaker. This will however not happen due to the action of the transformer, allowing the second breaker to only interrupt half of the line current. This arrangement is shown in Figure A.25. I W W Transformer B2 B1 I2 I1 Figure A.25: Transformer arrangement 4 Patent Filed by ABB Technology on 10 th June 2008 titled A DC Current Breaker. This invention is to improve the existing passive resonance circuit breaker design so that it is capable of breaking DC current in excess of 2500A. The DC breaker design is an interrupter, in parallel with an LC resonance circuit, in parallel with a surge arrester [154]. The acclaimed novel part of this design is the relationship between the values of capacitance and inductance in the LC resonance circuit. There is a known maximum frequency for which the interrupter is capable of extinguishing the arc. Above this frequency the interrupter may no longer be able to cool the arc quickly enough. The resonance frequency is given by equation (A.22). 263

264 Appendix 3A f LC (A.22) According to the patent, the resonance circuit up until now has been designed with a higher value of inductance to reduce the cost of the capacitor. The typical relationship is for the value of capacitance to be a third of the value of inductance. The inventors have however, realised that increasing this relationship is more favourable. This is because the amplitude of the oscillating current is proportional to (C/L) 1/2 and the transient recovery voltage in the interrupter is proportional to 1/C. Increasing the capacitance therefore results in a higher oscillating current, which helps higher currents to be broken. The increased capacitance also reduces the rate of rise of recovery voltage for a specific current. The patent is for the capacitance to inductance value to be equal to or greater than one. There are many embodiments of this invention mentioned in the patent, some of which are outlined below: According to the patent it is possible to break currents exceeding 2500A, for example 5000A, if the said relationship is greater than two. The use of the conductor s self-inductance which therefore requires no separate inductor. Two interrupters connected in series and in parallel with the resonance circuit and surge arrester. This arrangement is more costly but results in a higher total arc voltage which has some benefits. Connecting a switch in series with the resonance circuit. The switch is closed after some delay from when the interrupter contacts open, meaning it is possible to create a well-defined voltage step that efficiently initiates current oscillation. This configuration makes it possible to break currents in the order of 7000A. Application as a Metallic Return Transfer Breaker (MRTB) in a HVDC transmission scheme. 5 Patent Filed by ABB Technology on 5 th December 1994 titled Direct-Current Breaker for High Power for Connection into a Direct-Current Carrying High-Voltage Line. This patent focuses on two DC circuit breaker designs [155]. The first uses a GTO thyristor to divert current from the breaker to allow arc extinction. The second uses an IGBT to 264

265 Appendix 3A initiate current oscillations to create a zero-crossing to allow arc extinction. Considering that this patent expires in 2014 and that these topologies are not known to be in operation on any HVDC scheme it is unlikely that these solutions are cost-effective. 6 GTO Circuit Breaker Figure A.26 shows the circuit diagram of the GTO circuit breaker. Prior to current interruption, both sets of circuit breaker contacts, BC1 and BC2, are closed and the current, I dc, is flowing through the HVDC line via the circuit breaker contacts. The circuit breaker contacts open upon receiving the break command, producing arc voltages, V1 and V2. The arc voltage, V2, charges-up capacitor, C2, whose voltage, V C2, is measured and compared with a reference voltage, V ref, by the voltage level detector, VLD. Once V C2 exceeds V ref a Fire Now (FN) signal is issued to the Pulse Generating Circuit (PGC) and the Time Delay Circuit (TDC). The PGC sends a Firing Signal (FS) to the Gate Turn-off (GTO) thyristor to turn-on. The GTO thyristor enters a conducting state, causing the current flowing through BC2 to commutate via the GTO thyristor, allowing the arc in BC2 to be extinguished. The TDC issues a turn-off signal to the GTO after a predetermined time delay, which is determined to allow the current to commutate from BC2 to the GTO and for BC2 to recover preventing arc re-ignition when the GTO thyristor is switched-off. When the GTO thyristor is switched-off and BC2 is open, the voltage across the contacts, and hence the voltage across the breaker, grows rapidly, causing the current to commutate into C1. The voltage distribution between BC1 and BC2 is determined by the surge arrester connected across BC2, which is used to limit the voltage across the GTO and related control circuitry. This means that the majority of the voltage across the circuit breaker, V t, will be supported by BC1. The total voltage across the breaker, V t, will ramp up due to the capacitor and will oppose the external circuit voltage, causing the line current to decrease. The surge arrester, SA1, will begin to conduct, if V t exceeds the surge arrester knee voltage, until the line current has ceased. 265

266 Appendix 3A V t I s1 I c1 SA1 C1 V 1 V 2 L I dc I brk BC1 BC2 FS TDC SA2 C2 V C2 V ref VLD FN PGC Figure A.26: GTO thyristor circuit breaker The mechanical breaker with turn-off snubber described in Section 1 operates in a similar way to this circuit breaker, by commutating the line current from the breaker to allow arc extinction. This device is however more complex and requires an additional capacitor, C2, surge arrester, SA2, and a breaker with two sets of contacts. The advantage of this topology is that the voltage rating of the power electronics is determined by surge arrester SA2, not SA1. The patent states that SA2 would have a knee-point voltage between 2 and 2.5kV for a system voltage of 500kV. 7 IGBT Circuit Breaker This circuit breaker topology is shown in Figure A.27 and is very similar to the one described in Section 6. This time however, when the contacts open, the arc voltage V2 acts as the supply voltage to the oscillator, OSC, which is designed to generate a train of pulses at the same natural frequency created by the inductor, L1, and capacitor, C1. The square pulses are amplified and are used to control the switching of the IGBT. Controlling the switching of the IGBT in this way causes an oscillation of natural frequency, with growing amplitude, in the circuit consisting of the inductor, L1, capacitor, C1, and breaker contacts, BC1 and BC2. The oscillations generate an alternating current, superimposed on the DC current flowing through the breaker, which will produce a zero crossing. This zero crossing allows the breaker contacts to extinguish the arc. The oscillations can now no longer oscillate back to the breaker contacts and the oscillations cease. The current then commutates into C1 as described in the above breaker topology. The inductor value is chosen to be sufficiently low, to minimise the effect on the circuit. 266

267 Appendix 3A I s1 I c1 SA1 L1 C1 V 1 V 2 L s I dc I brk BC1 BC2 SA2 V 2 OSC AMP Figure A.27: IGBT circuit breaker This circuit breaker topology is comparable to the passive resonance DC Circuit Breaker, with the addition of power electronics to excite the oscillations. The additional components in this topology are likely to increase the cost and to reduce the reliability of the device. 267

268 Appendix 4A APPENDIX 4A SUB-MODULE CAPACITANCE DERIVATION An analytical approach proposed by Marquardt et al. in [85] can be used to calculate the approximate SM capacitance required to give an acceptable ripple voltage for a given converter rating. The converter arms are treated as controllable voltage sources as shown in Figure A.28. I dc V ua (t) I ua (t)=i g +I a (t)/2 V dc /2 V u-g (t) L arm R arm L a R a R arm V a (t) I a (t) V sa (t) V dc /2 V la (t) L arm V l-g (t) I la (t)=i g -I a (t)/2 Figure A.28: Single-phase equivalent circuit for MMC The current flowing through each converter arm contains a sinusoidal component, Ia( t ) / 2 and a DC component, I g as shown in Figure A.28 and described by equation (A.23). where: 1 1 I ( ) ( ) ( ˆ ua t I g Ia t I g Ia sin( t )) (A.23) Iˆ a I g Idc m (A.24) 3 2I Substituting (A.24) into (A.23) gives I ua in terms of I dc, as given by equation(a.25). Where is the phase angle between Va () t and Ia() t. g 1 Iua ( t) Idc(1 msin( t )) (A.25) 3 Neglecting the voltage drop across the arm impedance, each arm of the converter is represented as a controllable voltage source which can be described by equation (A.26). 268

269 Appendix 4A 1 ˆ 1 ˆ 1 Vua ( t) Vdc Va ( t) Vdc Va sin( t) Vdc (1 k sin( t)) (A.26) where: 2Vˆ k a (A.27) V dc The power flow of the upper phase arm, P ua, is given by equation (A.28), using equations (A.25) and (A.26). 1 1 Pua ( t) Vua ( t) Iua ( t) Vdc (1 k sin( t)) Idc(1 msin( t )) (A.28) 2 3 Equation (A.28) can be simplified to give equation (A.29). Vdc Idc Pua( t) (1 k sin( t))(1 msin( t )) (A.29) 6 The relationship between m and k can be obtained by equations (A.30) to (A.34). Iˆ ˆ a Va Pd Vdc Idc 3 cos (A.30) 2 2 Substituting I g for I dc, using (A.24), gives equation (A.31). V I dc g Iˆ ˆ a Va cos (A.31) 2 2 Multiplying each side of equation (A.31) by two gives equation (A.32). 2V I Iˆ Vˆ cos (A.32) dc g a a Equation (A.32) can be rearranged to give equation (A.33). V ˆ dc Ia Vˆ cos 2I a g (A.33) Substituting equations (A.24) and (A.27) into equation (A.33) gives equation (A.34). 2 m k cos (A.34) The variation in stored energy from the upper arm over a half cycle can be found by integrating the equation for P ua (equation (A.29)) between limits x1 and x2 (positive half 269

270 Appendix 4A cycle). The first step of this approach is to put equation (A.29) into an easier format for integration. Multiplying out the brackets gives equation (A.35). Pd Pua ( t) 1 msin( t ) k sin( t) mk sin( t)sin( t ) (A.35) 6 Equation (A.36) can be produced using trigonometric identities. Pd mk mk Pua ( t) 1 msin( t ) k sin( t) cos(2 t ) cos( ) (A.36) This can be re-written as equation (A.37). Pd mk Pd mk Pua ( t) msin( t ) k sin( t) cos(2 t ) 1 cos( ) (A.37) From equation (A.34), mk cos( ) 2. The following term therefore equals 0. Pd mk 1 cos( ) (A.38) Equation (A.37) can thus be reduced to equation (A.39). Pd mk P ua( t) msin( t ) k sin( t) cos(2 t ) 6 2 (A.39) Each term in equation (A.39) can be separately integrated and then added together. Equations (A.40) to (A.44) show the integration for the first term. ut (A.40) du dt (A.41) Using equations (A.40) and (A.41) the integral of the first term can be written as equation (A.42). (A.42) msin( t ) dt m sin( u) du Integrating the right hand side of equation (A.42) gives equation (A.43). du m m sin( u) cos( u) (A.43) 270

271 Appendix 4A Substituting for u gives equation (A.44). mcos( t) msin( t ) dt (A.44) Integrating each term of equation (A.39) in a similar way gives equation (A.45). x2 Pd mcos( t ) k cos( t) mk sin(2 t ) Wua Pua () t 6 4 (A.45) x1 x2 x1 This can be re-written as equation (A.46). x2 Pd mk Wua Pua ( t) mcos( t ) k cos( t) sin(2 t ) 6 4 (A.46) x1 x2 x1 The limits for the half cycle, x 1 and x 2, can be obtained by finding the zero crossings, as shown by equations (A.47) to (A.50). 1 msin( t ) 0 (A.47) 1 1 x1 t arcsin arcsin m m (A.48) Since sin( ) sin( ) : 1 msin( t ) 0 (A.49) 1 x2 t arcsin m (A.50) Substituting limits into equation (A.46) gives equation (A.51). mcos( x2 ) k cos( x2) Pd Wua mk 6 sin( x2 )cos( x2) cos( x2 )sin( x2) 4 Pd mk mcos( x1 ) k cos( x1) sin( x1 )cos( x1) cos( x1 )sin( x1) 6 4 (A.51) Equation (A.52) can be re-written as equation (A.52) by collecting like terms. cos( ) cos( ) cos( ) cos( ) m x x k x x Pd Wua mk sin( x2 )cos( x2) cos( x2 )sin( x2 ) 6 4 sin( x1 )cos( x1 ) cos( x1 )sin( x1) (A.52) Substituting equations (A.53) to (A.56) into equation (A.52) gives equation (A.57). 271

272 Appendix 4A 1 sin( x1 ) m (A.53) 1 sin( x2 ) m (A.54) 2 m 1 1 cos( x1 ) 1 (A.55) 2 m m 1 cos( x2 ) 1 (A.56) 2 m 1 1 m k cos( x2) cos( x1) Pd m m Wua 6 mk cos( x2) 1 sin( x 2 2) cos( x1) 1 sin( x 2 1) 4 m m m m (A.57) Simplifying equation (A.57) gives equation (A.58): 1 m k cos( x2) cos( x1) Pd m Wua 6 mk 1 mk 1 cos( x2) cos( x1) 1 2 sin( x2) sin( x1) 4 m 4 m (A.58) Substituting equations (A.61) and (A.64) into equation (A.58) gives equation (A.65). 1 1 sin( x2) 1 sin( ) cos( ) (A.59) 2 m m 1 1 sin( x1 ) cos( ) 1 sin( ) 2 m m (A.60) 2 sin( x1) sin( x2) cos( ) m (A.61) 1 1 cos( x2) 1 cos( ) sin( ) (A.62) 2 m m 1 1 cos( x1) 1 cos( ) sin( ) (A.63) 2 m m 1 cos( x2) cos( x1) 2 1 cos( ) (A.64) 2 m 272

273 Appendix 4A 1 1 m cos( ) 2 k 2 P m m d Wua 6 mk 1 1 mk cos( ) 1 cos( ) m m 4 m m (A.65) Equation (A.65) can be simplified to equation (A.69), shown by equations (A.66) to (A.69). W ua 1 1 2m 1 2k 1 cos( ) 2 2 P m m d 6 mk 2 1 mk cos( ) 1 cos( ) m m 4 m m (A.66) P d Wua 2m 1 2k 1 cos( ) k 1 cos( ) m m m (A.67) P 6 1 m d W 1 2m k cos( ) (A.68) ua 2 Pd 1 k Wua m 1 1 cos( ) 2 3 m 2m (A.69) 2 Substituting k cos( ) from equation (A.34) into equation (A.69) gives equation (A.70). m Pd 1 2 / m Wua m m 2m (A.70) This can be simplified to give equation (A.71), and further simplified to equation (A.72). The variation in stored energy for the upper arm of the converter is obtained in terms of m. Pd 1 1 Wua m m m (A.71) Pd 1 Wua m m 3/2 (A.72) Equation (A.72) can be re-written in terms of k by substituting equation (A.34). 2 2 P d k cos Wua ( k) 1 3 k cos 2 3/2 (A.73) The variation in energy per SM can be calculated by dividing equation (A.73) by the number SMs in the converter arm, n, as shown in equation (A.74). 273

274 Appendix 4A 2 2 P d k cos WSM ( k) 1 3 nkcos 2 3/2 (A.74) The required capacitance per SM for a ripple voltage factor 0 1 can be determined as follows: 2 WSM WCap 0.5CSM Vcap (A.75) 4 C SM W (A.76) 2V SM 2 Cap This approach which was proposed by Marquardt et al. is widely used [86, 87]. The SM capacitance calculation should only be used as an approximation as it is based on several assumptions, as described in the main body. The control strategy implemented for balancing the capacitor voltages will also have a very significant impact on the capacitor ripple voltage. The SM s capacitance should be calculated based on the converter s operating condition that causes the greatest variation in the capacitor s stored energy. This condition is likely to be when the converter is operating at maximum power. Sub-module capacitance calculation The SM capacitance required to give a 10% capacitor voltage ripple for a 1000MW, ±300kV, 31-level MMC is calculated below: The average SM capacitor voltage can be calculated as follows: V cap Vdc 600kV 20kV (A.77) n 30 The DC current, AC phase voltage and current, and frequency are given in equations (A.78) to (A.81). I I dc a Pd 1000MW 1670A V 600KV (A.78) dc Vˆ 300kV (A.79) a Pd /3 333MW 1570A V 212kV (A.80) a 2 f rads (A.81) 274

275 Appendix 4A The values for I g and m are calculated in equations (A.82) and (A.83) respectively. I g Idc 1670A 557A (A.82) 3 3 Iˆ a m 2 2I 2557 g (A.83) The variation in the upper arm s stored energy is given in equation (A.84) MW 1 Wua MJ /2 (A.84) Based on the assumption that the energy variation is shared equally between all SMs in the converter arm, the required SM capacitance for a voltage ripple of ±5% is calculated in equation (A.85). C SM 1.38 MJ / kV uF (A.85) According to [84] 30-40kJ of stored energy per MVA of converter rating is sufficient to give a ripple voltage of 10% (±5%). Using this approximation the value of SM capacitance can be calculated and compared with the value calculated by equation (A.85). The value of SM capacitance based on 30kJ/MVA is given in (A.87). W SM 30KJ MJ 167kJ (A.86) 6n 180 C SM W 167kJ 835F SM 2 2 V sm kv (A.87) The value of SM capacitance based on 40kJ/MVA is given in (A.89). W SM 40KJ MJ 222kJ (A.88) 6n 180 C SM 222kJ kV F (A.89) The analysis conducted here shows that a value of 40MJ of stored energy for a 1000MVA converter gives a value of SM capacitance similar to the method proposed by Marquardt et al. 275

276 Appendix 4B APPENDIX 4B ARM INDUCTANCE DERIVATION This appendix document derives an expression to approximately calculate the value of arm reactance required for a given value of peak circulating current. This derivation is given in a more condensed form in [89]. In the main body of this thesis, circulating current is denoted by I circ, however in this appendix it is denoted by I 2f. This notation is used as it is in-keeping with the original literature and it has greater meaning for the analysis of circulating currents. Equation (A.90), which describes the instantaneous power of the upper converter arm, P () ua t, is derived in the appendix document entitled Sub-module capacitance derivation (Appendix 4A). Pd Pua( t) (1 k sin( t))(1 msin( t )) (A.90) 6 The equation which describes the instantaneous power of the lower converter arm Pla () t is derived in brief in equations (A.91) to (A.93). 1 Vla ( t) Vdc (1 k sin( t)) (A.91) 2 1 Ila ( t) Idc(1 msin( t )) (A.92) 3 Pd Pla ( t) Vla ( t) Ila ( t) (1 k sin( t))(1 msin( t )) (A.93) 6 K, m and P d are the same as stated in appendix 4A, and are restated in (A.94). 2Vˆ ˆ a Ia 2 k m P V I V 2I k cos d g d dc dc (A.94) Integrating Pua() t and Pla () t with respect to time gives the fluctuations of stored energy in the upper and lower converter arms respectively, as calculated in equations (A.95) and (A.96). Pd sin(2 t) 2cos( t) Wua ( t) Pua ( t) mcos( t ) 6 2cos( ) mcos( ) (A.95) Pd sin(2 t) 2cos( t) Wla ( t) Pla ( t) mcos( t ) 6 2cos( ) mcos( ) (A.96) 276

277 Appendix 4B Summing Wua and W la gives the AC component of the total stored energy in the converter leg, and is shown in equation (A.97). This derivation uses the phase A converter leg as an example. Pd sin(2 t ) Wa ( t) Wua ( t) Wla ( t) (A.97) 6 cos( ) Equation (A.99) is written in terms of apparent power by substituting equation (A.98) into equation (A.97). P Scos( ) (A.98) d Ssin(2 t) Wa () t (A.99) 6 Equation (A.99) shows that the AC component of the stored energy in the converter phase leg varies at twice the fundamental frequency. The energy stored in the converter leg is a function of voltage. A component of the converter leg voltage (upper arm and lower arm) must therefore also vary at twice the fundamental frequency. Equation (A.100) shows the voltage for the phase A converter leg as an example. V ( t) V V V V ˆ sin(2 t ) (A.100) a a _ dc a _ ac dc 2 f The upper and lower arm voltages must be re-written to include the double frequency component, as shown in equations (A.101) and (A.102). 1 Vˆ 2 f Vua ( t) Vdc (1 k sin( t)) sin(2 t ) (A.101) Vˆ 2 f Vla ( t) Vdc (1 k sin( t)) sin(2 t ) (A.102) 2 2 The double fundamental frequency voltage component excites circulating currents, as described by equation (A.103). Vˆ I ( t) sin(2 t ) Iˆ cos(2 t ) (A.103) 2 f 2f 2f 4N Larm 2 Re-writing the arm currents with respect to phase A gives equations (A.104) and (A.105) 1 I ( ) (1 sin( )) ˆ ua t Idc m t I2 f cos(2 t ) (A.104) 3 277

278 Appendix 4B 1 I ( ) (1 sin( )) ˆ la t Idc m t I2 f cos(2 t ) (A.105) 3 The instantaneous power of the upper converter arm P () t is now therefore written as equation (A.106). ua V ˆ dc V V dc 2 f Pua ( t) k sin( t) sin(2 t ) Idc Idc msin( t ) Iˆ 2 f cos(2 t ) 3 3 (A.106) Multiplying out the brackets gives equation (A.107). P ˆ d P Vdc I d 2 f Pua ( t) msin( t ) cos(2 t ) Pd Pd k sin( t) mk sin( t)sin( t ) 6 6 V ˆ ˆ dci2 f V2 f Idc k sin( t) cos(2 t ) sin(2 t ) 2 6 Vˆ ˆ ˆ 2 f Idc V2 f I2 f msin(2 t ) sin( t ) sin(2 t ) cos(2 t ) 6 2 (A.107) This can be re-written as equation (A.108) by collecting like terms. Pd Pua ( t) 1 msin( t ) k sin( t) mk sin( t)sin( t ) 6 V Iˆ cos(2 ) sin( ) cos(2 ) 2 Vˆ I sin(2 ) sin(2 ) sin( ) 6 Vˆ Iˆ sin(2 ) cos(2 ) 2 dc 2 f t k t t 2 f dc t m t t 2 f 2 f t t (A.108) Equation (A.108) can be simplified to equation (A.109) by using trigonometric identities. Pd mk mk Pua ( t) 1 sin( ) sin( ) cos(2 ) cos( ) 6 m t k t t 2 2 V ˆ dci2 f k k cos(2 ) sin(3 ) sin( ) 2 t t t 2 2 Vˆ 2 f Idc m m sin(2 t ) cos( t) cos(3t 2 ) Vˆ ˆ 2 fi2 f sin(4t 2 ) 4 (A.109) Equations (A.110) to (A.113) repeats the same process but for the lower converter arm P () la t from equation (A.93). 278

279 Appendix 4B V ˆ dc V V dc 2 f Pla ( t) k sin( t) sin(2 t ) Idc Idc msin( t ) Iˆ 2 f cos(2 t ) 3 3 (A.110) Multiplying out the brackets gives equation (A.111). P ˆ d P Vdc I d 2 f Pla ( t) msin( t ) cos(2 t ) Pd Pd k sin( t) mk sin( t)sin( t ) 6 6 V ˆ ˆ dci2 f V2 f Idc k sin( t) cos(2 t ) sin(2 t ) 2 6 Vˆ ˆ ˆ 2 f Idc V2 f I2 f msin(2 t ) sin( t ) sin(2 t ) cos(2 t ) 6 2 (A.111) Equation (A.111) can be written as equation (A.112) by collecting like terms. Pd Pla ( t) 1 msin( t ) k sin( t) mk sin( t)sin( t ) 6 V Iˆ cos(2 ) sin( ) cos(2 ) 2 Vˆ I sin(2 ) sin(2 ) sin( ) 6 Vˆ Iˆ sin(2 ) cos(2 ) 2 dc 2 f t k t t 2 f dc t m t t 2 f 2 f t t (A.112) This can be simplified to equation (A.113) by using trigonometric identities. Pd mk mk Pla ( t) 1 sin( ) sin( ) cos(2 ) cos( ) 6 m t k t t 2 2 V ˆ dci2 f k k cos(2 ) sin(3 ) sin( ) 2 t t t 2 2 Vˆ 2 f Idc m m sin(2 t ) cos( t) cos(3t 2 ) Vˆ ˆ 2 fi2 f sin(4t 2 ) 4 (A.113) The instantaneous power of the converter leg is calculated using equation (A.114). P ( t) P ( t) P ( t) (A.114) a ua la Substituting equations (A.109) and (A.113) into equation (A.114) gives (A.115). 279

280 Appendix 4B Pd mk mk P ( ) 1 cos(2 ) cos( ) ˆ a t 2 cos(2 ) 3 t dc f 2 2 V I t Vˆ ˆ ˆ 2 f Idc V2 f I2 f sin(2 t) sin(4t 2 ) 3 2 (A.115) Substituting mk cos( ) 2 from (A.94) into equation (A.115) gives equation (A.116). Pd mk P ˆ a ( t) cos(2 ) 2 cos(2 ) 3 t 2 Vdc I f t Vˆ ˆ ˆ 2 f Idc V2 f I2 f sin(2 t) sin(4t 2 ) 3 2 (A.116) 2 Substituting k mcos( ) from (A.94) into equation (A.116) gives equation (A.117). Pd cos(2 t ) P ( ) ˆ a t Vdc I2 f cos(2 t ) 3 cos( ) Vˆ ˆ ˆ 2 f Idc V2 f I2 f sin(2 t) sin(4t 2 ) 3 2 (A.117) Equation (A.117) can be re-written in terms of apparent power by substituting P Scos( ) from equation (A.98), as shown by equation (A.118). d S P ˆ a ( t) cos(2 t ) Vdc I2 f cos(2 t ) 6 Vˆ ˆ ˆ 2 f Idc V2 f I2 f sin(2 t) sin(4t 2 ) 3 2 (A.118) Integrating equation (A.118) with respect to time produces equation (A.119). S V Iˆ W t P t dt t t 6 2 Vˆ ˆ ˆ 2 f Idc V2 f I2 f cos(2 t) cos(4t 2 ) 6 8 dc 2 f a( ) a( ) sin(2 ) sin(2 ) (A.119) Substituting equation (A.120) into equation (A.119) produces equation (A.121). Iˆ 2 f Vˆ 2 f (A.120) 4L arm S VVˆ W t t t dc 2 f a ( ) sin(2 ) sin(2 ) Larm Vˆ I Vˆ cos(2 ) cos(4t 2 ) 2 2 f dc 2 f t Larm (A.121) 280

281 Appendix 4B It is shown in equations (A.122) to (A.129) that under normal operating conditions for a typical HVDC scheme the third and fourth terms in equation (A.121) are at least one order of magnitude smaller than the second term and that equation (A.121) can therefore be approximated by neglecting the third and fourth terms. According to [89], for a 50Hz system, providing L arm <0.2p.u., the third term in equation (A.121) can be neglected since: V Vˆ Vˆ I Vˆ I 10 (A.122) dc 2 f 2 f dc 2 f dc 2 Larm The maximum value of limb reactor permissible for equation (A.122) to be true can be determined by equations (A.123) to (A.126). VVˆ Vˆ 4 6 dc 2 f 2 L ˆ arm VV dc 2 f Vdc 2 8 ˆ 2 f I L L dc armv2 f I dc armidc (A.123) Substituting X L L arm into equation (A.123) produces equation (A.124) VVˆ dc 2 f 2 8 L arm 0.75V Vˆ X 2 f I dc armi 6 dc dc (A.124) Therefore to ensure VVˆ 8 dc 2 f 2 Larm is at least one order of magnitude greater than L max must be defined by equations (A.125) and (A.126). Vˆ I 2 f dc 6 X arm and X arm V dc (A.125) I dc L max 0.075V dc 2 fi (A.126) dc Equation (A.127) compares the fourth term in equation (A.121) with the second term in equation (A.121): 281

282 Appendix 4B VVˆ dc 2 f 2 2 L ˆ arm VdcV 2 f Larm Vdc ˆ 2 2 ˆ2 V 8 L ˆ 2 f armv 2 f V 2 f 2 L arm (A.127) Therefore to ensure VVˆ 8 dc 2 f 2 Larm must be defined by equation (A.128). is at least one order of magnitude greater than Vˆ f 2 Larm, Vˆ 2 f Vˆ 0.4V (A.128) 2 f dc V ˆ 2 f is significantly less than 0.4V dc in any realistic MMC, hence the fourth term in equation (A.121) can also be neglected. Equation (A.121) is therefore reduced to equation (A.129). W t S VVˆ dc 2 f a( ) sin(2 t ) Larm (A.129) The double fundamental frequency voltage V () 2 t, should distribute between all of the SMs in the converter leg (2n) equally. Therefore the SM capacitor voltage can be described by equation (A.130). f Vˆ 2 f Vcap ( t) Vcap sin(2 t ) (A.130) 2n Vcap is the DC component of the capacitor voltage. The total energy stored in the phase A converter leg can be calculated by equation (A.131) Wa ( t) 2 n CSMV cap( t) ncsmv cap( t) (A.131) 2 Substituting equation (A.130) into (A.131) produces equation (A.132). Vˆ W t nc V t 2n 2 f a( ) SM cap sin(2 ) 2 (A.132) Multiplying out the brackets produces equation (A.133). W () t nc a SM V ˆ 2 capv 2 f V cap sin(2 t) 2n ˆ ˆ2 VcapV2 f V 2 f 2 sin(2 t) sin (2 t) 2 2n 4n (A.133) 282

283 Appendix 4B Equation (A.133) can be simplified to equation (A.134). 2 C ˆ 2 ˆ SMV 2 f 2 Wa ( t) ncsmv cap CSMVcapV 2 f sin(2 t ) sin (2 t ) (A.134) 4n The second term in equation (A.134) is the double frequency component and can be directly compared with equation (A.129), as shown by equation (A.135). S VVˆ C V V t t ˆ 2 2 sin(2 dc f SM cap f ) sin(2 ) L arm (A.135) Equation (A.135) can be simplified to equation (A.136). C V Vˆ S VVˆ dc 2 f SM cap 2 f Larm (A.136) Equation (A.136) can be rearranged for V ˆ 2 f as shown by equations (A.137) to (A.139). C SM V cap V S Vˆ (A.137) dc 2 8 Larm 6 2 f 6V ˆ 2 f 1 S V CSMVcap 8 dc 2 Larm (A.138) Vˆ 2 f C SM V S 6 cap V 8 dc 2 Larm (A.139) The double fundamental frequency current can be calculated by equation (A.140). Iˆ 2 f Vˆ 2 f (A.140) 4L arm Substituting equation (A.139) into equation (A.140) produces equation (A.141). Iˆ 2 f S 6 V dc CSMVcap 2 8 Larm (A.141) 4L arm Equation (A.141) can be simplified by equations (A.142) to (A.144). 283

284 Appendix 4B Iˆ 2 f C SM S 1 6 4L V cap arm V 8 dc 2 Larm (A.142) Iˆ S 1 24 Larm V CSMVcap 8 2 f 2 dc 2 Larm (A.143) Iˆ S LarmC SMVcap Vdc 2 f 2 (A.144) Equation (A.144) can be rearranged for L arm as shown by equations (A.145) to (A.147) Iˆ L C V V S (A.145) f (8 arm SM cap dc ) S 3ˆ I 2 f V 8 L C V (A.146) 2 dc arm SM cap L arm 1 S 2 8 CSMV cap 3ˆ I2 f V dc (A.147) Equation (A.147) allows the required value of arm reactor to be calculated to limit the circulating current for a given system. 284

285 Appendix 4C APPENDIX 4C SHORT-CIRCUIT RATIO CALCULATION The strength of an AC system is often characterised by its Short-Circuit Ratio (SCR), which is defined by equation (A.148). SCL V SCR P P 2 n n (A.148) drated Z drated An AC system with a SCR greater than three is defined as strong [30]. The SCR of the onshore AC system in the models is relatively strong with an SCR of 3.5, hence the AC system impedance can be calculated by equation (A.149). Z n 2 2 Vn 400kV SCR P MVA drated (A.149) The AC network impedance is highly inductive and consequently the AC system impedance is modelled using an X/R ratio of 20. The SCR is implemented in PSCAD using an ideal voltage source connected in series with a resistor and an inductor. The values of resistance and inductance are calculated from equations (A.151) and (A.152). Z R (20 R ) (A.150) 2 2 n n n 2 Zn Rn 2.28 (A.151) R n Ln 0.145H (A.152) 285

286 Appendix 4D APPENDIX 4D ABC TO DQ TRANSFORMATION DERIVATION In matrix form for the three phases: Vcsa Ia V R pl I csb b V csc I c (A.153) Applying the abc to (Clarke) transform as given by equation (A.154) to both sides of equation (A.153) gives equation (A.155): V Va V 0 V b V 0 V c (A.154) V I V R pl I V I 0 0 (A.155) Providing that the three-phase system (abc) is balanced, the three AC quantities are transformed into two ac quantities of equal magnitude separated by 90. The two ac quantities can then be transformed into two dc quantities using the to dq (Park) transform given in equation (A.156). Vd cos sinv V q sin cos V (A.156) Using Euler s rule, as given in equation (A.157), and noting that V lags V by 90 (i.e. V jv ), equation (A.156) may be re-written in vector form as in equation (A.158), with its inverse given in equation (A.159). jx e cos x jsin x (A.157) Vdq (A.158) j V e V j Vdqe (A.159) Using equation (A.159), equation (A.155) can re-written in vector form as in equation (A.160) and equation (A.161). 286

287 Appendix 4D j j V e ( R pl) I e (A.160) dq dq j j j dq dq dq V e RI e Lp I e (A.161) Using partial differentiation and noting that t, equation (A.162) is obtained. p I e e I I e j j j dq dq dq t const t I const j j e pidq ji dqe (A.162) Substituting equation (A.162) into equation (A.161) gives V e RI e L e pi ji e (A.163) j j j j dq dq dq dq Equation (A.163) can be simplified as follows: Or in matrix form: j j j dq dq dq V e RI e e Lp jl I (A.164) dq dq dq V RI Lp jl I (A.165) Vd Id Id 0 1 Id R Lp L V q I q I q 1 0 I q (A.166) Where is the matrix representation of the imaginary unit j. 287

288 Appendix 4E APPENDIX 4E POWER CONTROLLER TRANSFER FUNCTION DERIVATION Equations (A.167) and (A.168) show that the active power is controlled by I d and the reactive power is controlled by I q. The open loop transfer function, G OL, is given by equation (A.169). 3 P V I (A.167) 2 sd d 3 Q V I (A.168) 2 sd q K p K i 1.5Vsd s Ki 1 3 s K p GOL K p V sd s s ic 12 ic s 1 ic (A.169) Setting K K 1 equation (A.169) can be reduced to equation (A.170). i p ic G OL 1.5V sd K p (A.170) s ic The closed loop transfer function, G CL, is given by equation (A.171). G CL 1.5Vsd Kp s 1.5Vsd K ic p 1 1.5Vsd Kp s ic 1.5V sd K p ic 1 s s 1.5V K ic sd p 1 (A.171) The closed loop transfer function is therefore reduced to a first order transfer function with ic a time constant.the bandwidth in radians for a first order system is equal to p 1.5V K sd p 1 rp. Hence equation (A.171) can be re-written as equation (A.172). G CL 1 s / BW 1 p (A.172) The values of K p and equations (A.173) and (A.174) respectively. K i can be calculated for given values of V sd, BW p and BW ic from K p icbwp BWp (A.173) 1.5V 1.5V BW sd sd ic K BW K (A.174) i ic p 288

289 Appendix 4F APPENDIX 4F DC VOLTAGE CONTROLLER TRANSFER FUNCTION DERIVATION V dc MMC I n I dc I PCC c L R C eq V s(abc) V n Figure A.29: DC side plant C eq 3C SM (A.175) n With reference to Figure A.29 the DC link voltage can be described by equation (A.176) and the power balance between the AC and DC system can be described by equation (A.177), assuming no converter losses. Hence: dvdc Ceq In Idc (A.176) dt I V 1.5V I (A.177) dc dc sd sd dvdc In 3V sd I sd (A.178) dt C 2C V eq eq dc Taking partial derivatives gives equation (A.179), where the subscript O denotes operating point: dv 1 3V I 3V I V I (A.179) dt C C V C V dc sdo sdo sdo n 2 dc sd eq 2 eq dco 2 eq dco dvdc Ceq I n 1.5KV KGVdc 1.5KV Isd (A.180) dt where: K V V I sdo sdo KG V dco V (A.181) dco The state feedback system block diagram (SFSB) for the DC voltage control loop is shown in Figure A

290 Appendix 4F V dc* I n I sd * 1 PI Inner I sd V dc - loop 1 1.5Kv - C eq s 1.5K v K G Figure A.30: SFSB for DC voltage control loop The transfer function for the control loop can be derived as follows: 1.5KV ( sk p K ) V i dc s V * 1.5K dc V Ceqs 1.5 KV KG ( sk p Ki ) s (A.182) V 1.5 K ( sk K ) V C s K K K s K K dc V p i 2 dc * eq 1.5 V ( G p ) 1.5 v i (A.183) Typically K G <<K p and hence equation (A.183) can be reduced to equation (A.184): V 1.5 K ( sk K ) V C s K K s K K dc V p i 2 dc * eq (1.5 V p ) 1.5 v i (A.184) Rearranging equation (A.184) and ignoring the sk p term gives equation (A.185): V 1.5K K C V s K K C s K K C dc V i eq 2 dc * 1.5 V p eq 1.5 v i eq (A.185) The natural frequency and damping ratio is given by equations (A.186) and (A.187) 1.5KK v i n (A.186) C eq 1.5KK V p (A.187) 2 C n Hence the K i and K p values for a particular natural frequency and damping ratio can be calculated by equations (A.188) and (A.189). eq 2 n Ceq Ki (A.188) 1.5K V K p 2nCeq (A.189) 1.5K V 290

291 Appendix 4G APPENDIX 4G AC VOLTAGE CONTROL X 1 PCC X 2 I a V na V ca V sa Figure A.31: MMC phase A connection to the AC network with the system resistances neglected V V I X (A.190) sa na a 2 where: I V V X na ca a (A.191) X X1 X 2 (A.192) Substituting equation (A.191) into equation (A.190) and rearranging gives equation (A.193) where: V V (1 k) V k (A.193) sa na ca X 2 k (A.194) X Expanding equation (A.193) into its real and imaginary components gives equation (A.195), noting that c is the power angle for the converter voltage and that the network voltage is taken as the reference ( n 0) V V (1 k) V k cos( ) jv k sin( ) (A.195) sa na ca c ca c Hence, the magnitude of the voltage at the PCC is given by equation (A.196). (1 ) cos( ) sin( ) 2 2 V V k V k V k (A.196) sa na ca c ca c 291

292 Appendix 4H APPENDIX 4H KEY PARAMETERS FOR THE MMC-HVDC LINK Main circuit MMC Onshore MMC transformer Onshore AC system MMC power controllers MMC DC voltage controller AC voltage controllers MMC current controller MMC dq current limits CCSC Windfarm transformer Windfarm power controller Windfarm current controller Windfarm dq current limits Offshore MMC voltage controller Offshore MMC transformer Active power rating P 1000MW Reactive power rating Q ±330MVAr DC voltage V dc 600kV Number of levels NL 31 Number of SMs per arm n 30 SM capacitance C SM 1150µF Arm resistance 1 R arm 0.9Ω Arm inductance L arm 0.045H Leakage reactance X T 0.15p.u. Star Primary winding voltage, L-L V Tp 370kV Delta Secondary winding voltage, L-L V Ts 410kV Apparent power base S base 1000MVA Network voltage, L-L V n 400kV Network resistance R n 2.28Ω Network inductance L n 0.145H Proportional gain K p Integral time constant T i Proportional gain K p Integral time constant T i Proportional gain K p Integral time constant T i 2.39 Proportional gain K p 175 Integral time constant T i Nominal d-axis current limit I dlim ±2.65 Nominal q-axis current limit I qlim ±0.75 Proportional gain K p 8.48 Integral time constant T i Leakage reactance X T 0.15p.u. Star Primary winding voltage, L-L V Tp 33kV Star Secondary winding voltage, L-L V Ts 220kV Proportional gain K p Integral time constant T i Windfarm time constant τ w 0.15s Proportional gain K p Integral time constant T i 0.29 Nominal d-axis current limit I dlim ±40 Nominal q-axis current limit I qlim ±12 Proportional gain K p 0.5 Integral time constant T i Frequency freq 50Hz Leakage reactance X T 0.15p.u. Star Primary winding voltage, L-L V Tp 370kV Delta Secondary winding voltage, L-L V Ts 220kV 1. Value includes the on-state resistance of the semi-conductor devices in each arm. Table A.23: Key parameters for the MMC-HVDC link 292

293 Appendix 5A APPENDIX 5A DC POLE-TO-GROUND FAULT In Figure A.32, the system s response to a DC pole-to-ground fault is shown when employing a star-point reactor between the MMC1 and the transformer. The star-point reactor has a per phase inductance of 50H and a mid-point resistance of 10Ω. Figure A.32: Positive pole-to-ground fault at MMC1 with under voltage protection and a star-point reactor ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 293

294 Appendix 5A The system s response to a DC pole-to-ground fault with surge arresters installed between the poles and ground at the terminals of each converter is shown in Figure A.33. The PSCAD default surge arrester characteristic was used with a nominal voltage rating of 300kV. Figure A.33: Positive pole-to-ground fault at MMC1 with under voltage protection and DC surge arresters (no star-point reactor) ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis time(s) 294

295 Appendix 6A APPENDIX 6A PARAMETERS FOR MMC COMPARISON MODEL MMC Comparison Model Parameters Active power rating P 1000MW Main Circuit Reactive power rating Q ±300MVAr DC voltage V dc 600kV Number of levels NL 31 Number of SMs per arm n 30 SM capacitance C SM 1150uF Arm resistance 1 R MMC arm 0.9Ω Arm inductance L arm 0.085H Capacitor leakage resistance R lc 10MΩ IGBT/diode on- state resistance R on 0.01Ω IGBT/diode off-state resistance R off 1MΩ Leakage reactance X T 0.15pu Transformer Primary winding voltage, L-L V Tp 370kV Secondary winding voltage, L-L V Ts 410kV Network voltage, L-L V n 400kV AC System Network resistance R n 2.28Ω Network inductance L n 0.145H Inner Current loop control Proportional gain K p 36 Integral time constant T i CCSC Proportional gain K p 150 Integral time constant T i CBC Sorting frequency Trig Value includes the on-state resistance of the semi-conductor devices in each arm. Table A.24: Parameters for MMC comparison model 295

296 Appendix 7A APPENDIX 7A HVDC CABLE PARAMETERS, BONDING AND SENSITIVITY ANALYSIS 1 HVDC Cable Parameters 1.1 Core Conductor The current ratings for ABB s HVDC Light 320kV cable are given in Table A.25 and were taken from [34]. The data is for a cable with a copper conductor installed in a moderate climate with close spaced laying. Conductor Area (mm²) Voltage rating (kv) HVDC Light Cable Data Current rating (A) Power rating (MW) Resistance (Ω/km) Diameter over cable (mm) Table A.25: Submarine HVDC Light 320kV cable with copper conductor in a moderate climate with close laying The 1400mm 2 cable has sufficient power rating at ±320kV for a typical connection of a Round 3 windfarm, however, if the same cable was operated at ±300kV then the power rating would be reduced to 956MW 43. The 1600mm 2 cable is considered more appropriate. The core conductor is typically made from strands of wire and therefore the conductor radius, r c cannot be calculated in the normal manner using equation (A.197). r A c c (A.197) The conductor radius of a 1600mm 2 XLPE AC land cable is however given in Table A.26. ABB XLPE Land Cable Systems Data Conductor Radius of Insulation Capcitance Area conductor thickness (mm²) (mm) (mm) (uf/km) Table A.26: XLPE land cable systems 43 It is assumed that the design of a 300kV cable would be very similar to a 320kV cable and therefore the current capacity of both cables would also be very similar. 296

297 Appendix 7A PSCAD assumes that the core conductors are solid and therefore the resistivity of the copper needs to be modified to take into account the stranded nature of the conductor. This is achieved using equation (A.198). 2 R A ( / m) / m (A.198) 1km Lead Sheath The thickness of the lead sheath for a typical single core XLPE submarine cable is approximately 3mm according to ABB s submarine user s guide [115]. The electrical resistivity of lead is given as 2.2x10-7 Ω/m [116]. 1.3 Armour The thickness of the steel armour for a typical submarine cable is assumed to be 5mm [117]. The resistivity of the steel wire is given as 1.8x10-7 Ω/m [116] with a relative permeability of 10 [117]. 1.4 Semi-conducting layers The latest version of PSCAD (X4) allows the conductor and insulator screens to be represented in the cable model. In earlier versions of PSCAD the conductor and insulator screens can be taken into account by modifying the relative permittivity of the insulator [116]. The PSCAD default value for the screen thickness is employed in this work which is 1mm. The resistivity and relative permittivity for the semi-conducting layers cannot be set by the user in PSCAD. It is therefore assumed that the cable parameters sub-routine is using typical values. 1.5 Insulator There is no official documentation regarding the insulation thickness of the HVDC Light cables, however an ABB representative has stated that a 320kV HVDC Light cable has an insulation thickness of about 18mm. The ABB representative also stated that using the electrical parameters from an AC cable of similar thickness would yield similar results. This indicates that the relative permittivity of XLPE and DC-XLPE is similar. The relative permittivity of XLPE is given as 2.5 [114]. 297

298 Appendix 7A 1.6 Polyethylene Inner Jacket The inner jacket is assumed to have a thickness of 5mm [117]. The relative permittivity of polyethylene is given as 2.3 [118]. 1.7 Polypropylene Yarn Outer Cover The outer cover thickness is assumed to be 4mm [117]. The relative permittivity of polypropylene yarn is assumed to be very similar to that of polypropylene, which is 1.5 [118]. 1.8 Horizontal Cable Distance The positive and negative cables may be installed in separate trenches tens of meters apart to prevent a ships anchor from damaging both cables [111, 120]. This is however approximately 40% more expensive than installing both cables in a single trench. The use of a single trench would result in a saving of about 40m for a 100km route [111] and by laying both cables close together it means that their magnetic fields effectively cancel out. Therefore, with the exception of cable routes which have lots of fishing activity, it is more likely that the cables will be buried in a common trench. It has been assumed that the horizontal distance between the two cables would be approximately two cable diameters (0.25m). 1.9 Sea-return Impedance The calculation of the sea-return impedance is complex. In order to calculate the sea-return impedance accurately, accurate values of sea resistivity, sea-bed resistivity, sea depth, cable burial depth and frequency are required. The primary focus of this research is the connection of large offshore windfarms using HVDC technology. Dogger Bank is a potential site for a Round 3 offshore windfarm which has been leased by the Crown Estate to a consortium of developers. The site is situated some km off shore [156], which makes HVDC transmission the only realistic option. The sea depth of the site ranges from approximately 19 to 64 meters [156]. The sea depth around the site is greater than the site and the sea depth will decrease closer to shore. The sea depth along the cable route back to shore will therefore most definitely vary. In addition the sea depth will fluctuate with the tide. The resistivity of sea water varies in the range of Ω/m due to the temperature and the salinity of the water [119], which 298

299 Appendix 7A makes it difficult to obtain an accurate value. Sea-bed resistivity logically speaking will vary with the depth of the sea-bed and possibly along the cable route. Even if all the different variables which affect the sea-return impedance for Dogger Bank could be measured accurately, there is no known model which can factor all of them in to compute the sea-return impedance. Many studies which include submarine cables use the infinite sea model [117, 120], which is based on [157] and assumes that the cable is surrounded by infinite sea in all directions. This model therefore neglects the sea water/air interface and the sea water/seabed interface. A new model proposed in [119] takes into account the sea water/air interface and the sea water/seabed interface, however it assumes that the sea depth and soil resistivity are constant and that the cable is laid on the surface of the seabed. In general this is not the case and the cable will be buried meters beneath the seabed to protect it from anchor strikes [111, 120]. The new model is compared with the infinite sea model in [119], which shows in general that there is little difference between the two models when the skin depth of the sea is much less than the sea depth. If this condition is met, the results from [119] show that the effect of soil resistivity is negligible. This indicates that the sea water/air interface has a greater effect than the sea water/seabed interface. The PSCAD models can only consider the sea water/air interface. PSCAD allows the user to select whether the return impedance is solved using direct numerical integration (Pollaczek) or an analytical approximation (Wedepohl or Saad). The approximation method is normally accurate to within 5% of the exact solution and is much less time consuming [158]. The effect that the sea-return impedance will have for the particular system model and studies should also be considered. As an example, the sea-return impedance will have a greater influence on a HVDC scheme employing a sea-return, than a HVDC scheme with a metallic return. It is however more common to have a metallic return for environmental reasons and due to the additional maintenance required for sea electrodes [30]. In summary the analytical approximation in PSCAD for the sea-return impedance will be sufficient for the majority of simulation studies required for this research. The sea resistivity and the vertical location of the cable are assumed to be of 1Ω/m and 50m below the sea surface respectively. 299

300 Appendix 7A 1.10 Cable Bonding For safety reasons cable sheaths must be bonded to ground. In the event that the cable sheath is not bonded to ground, it could operate at a very large potential above ground. This could make the cable sheath dangerous to touch and could cause damage to the layers of the cable between the sheath and the ground. In three-phase systems the main types of bonding arrangement are: single-point bonding, solid bonding and cross bonding. Single-point bonding is where the sheath is bonded at one end of the cable. This type of bonding removes the considerable heating effect from circulating currents, but voltages will be induced along the length of cable, which increases with the cable length and conductor current. Care must be taken to protect the free end of the cable from excessive voltage, which is normally achieved using a surge voltage limiter. The acceptable screen voltage potential normally limits the length of cable for which single-point bonding can be used. Another disadvantage of single-point bonded systems is that in the event of a phase to ground fault, the sheath is unable to carry the fault current. Solid bonding is where the cable sheaths are bonded to ground at both ends of the cable. This removes the problem of induced voltages but provides a path for circulating currents to flow, which increases cable losses and therefore reduces the ampacity of the cable. Cross-bonding avoids sheath circulating currents and excessive sheath voltages. This is achieved by dividing the cable route into three equal lengths and cross-connecting the sheaths of each phase. The voltage induced in the sheath of the cable within one section is equal in magnitude but 120 out of phase. Therefore by cross-connecting the sheath, the net voltage induced in each of the sheaths over the length of the cable is ideally zero. Although cross-bonding increases the ampacity of the cable it can be expensive and is impractical for submarine cables. For more information on bonding configurations see [113]. In a HVDC system at steady-state there is no time-varying magnetic flux and therefore no voltage induced in the sheath of the cable and no capacitive current. Therefore at steadystate in a HVDC system the only current flowing in the sheath is due to the imperfections in the cable s insulation. A submarine HVDC cable could be single-point bonded, but this makes little sense since there is no circulating current to affect the ampacity of the cable. In addition for single-point bonded systems the sheath is unable to carry the fault current 300

301 Appendix 7A during a phase-to-ground fault. Therefore solid-bonding is considered to be the ideal bonding arrangement for submarine HVDC cables. 2 Cable Parameters Sensitivity The effect of variations in the cable parameters on the cable s transient voltage response are assessed using the test model shown in Figure A.34. Figure A.34: Cable parameter sensitivity test model The cable is modelled using PSCAD s frequency dependent phase cable model, which is said to be the most accurate cable model commercially available [159]. The sheath and armour in the submarine cable are usually bonded to ground at both ends of the cable [120]. In this case the submarine cable s sheath will be bonded to ground at both ends of the cable through a small resistor. PSCAD gives the option to ground the last metallic layer (armour in a submarine cable), which eliminates this layer from the impedance matrix. Grounding the last metallic layer physically means that the layer is connected to ground along its entire length. This is often a valid assumption for a submarine cable, where the armour is a semi-wet construction which allows water to penetrate [117]. The sending end voltage source is initially set to 600kV and the load is modelled as a 350Ω resistor; hence the load is dissipating approximately 1GW. At 0.3s the sending end voltage is increased to 605kV and the receiving end pole-to-pole voltage is measured. The effect of varying the cable s parameters on its transient voltage response is shown in the following plots. Increasing the thickness of the semi-conductor screen reduces the propagation velocity as shown in Figure A.35. This is because increasing the screen thickness increases the effective relative permittivity of the material between the core conductor and sheath. 301